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annotate test/CodeGen/Hexagon/common-gep-icm.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -O2 -march=hexagon < %s | FileCheck %s
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2 ; Rely on the comments generated by llc. Make sure there are no add/addasl
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3 ; instructions in while.body13 (before the loads).
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4 ; CHECK: while.body13
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5 ; CHECK-NOT: add
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6 ; CHECK: memw
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7
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8 %struct.1 = type { i32, i32 }
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9 %struct.2 = type { [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [3 x i32], [24 x i32], [8 x %struct.1], [5 x i32] }
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10
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11 @A1 = global i64 zeroinitializer
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12 @A2 = global i64 zeroinitializer
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13 @B1 = global i32 zeroinitializer
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14 @B2 = global i32 zeroinitializer
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15 @C1 = global i8 zeroinitializer
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16
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17 declare i32 @llvm.hexagon.S2.cl0(i32) nounwind readnone
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18 declare i32 @llvm.hexagon.S2.setbit.r(i32, i32) nounwind readnone
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19 declare i64 @llvm.hexagon.M2.vmpy2s.s0(i32, i32) nounwind readnone
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20 declare i64 @llvm.hexagon.M2.vmac2s.s0(i64, i32, i32) nounwind readnone
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21 declare i64 @llvm.hexagon.A2.vaddws(i64, i64) nounwind readnone
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22 declare i64 @llvm.hexagon.A2.vsubws(i64, i64) nounwind readnone
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23 declare i32 @llvm.hexagon.A4.modwrapu(i32, i32) nounwind readnone
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24
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25 define void @foo(i32 %n) nounwind {
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26 entry:
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27 br label %while.body
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28
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29 while.body:
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30 %count = phi i32 [ 0, %entry ], [ %next, %while.end ]
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31 %idx = phi i32 [ 0, %entry ], [ %15, %while.end ]
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32 %0 = load i32, i32* @B1, align 4
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33 %1 = load i32, i32* @B2, align 8
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34 %2 = and i32 %1, %0
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35 br label %while.body13
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36
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37 while.body13: ; preds = %while.body, %if.end
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38 %3 = phi i64 [ %13, %if.end ], [ 0, %while.body ]
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39 %4 = phi i64 [ %14, %if.end ], [ 0, %while.body ]
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40 %m = phi i32 [ %6, %if.end ], [ %2, %while.body ]
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41 %5 = tail call i32 @llvm.hexagon.S2.cl0(i32 %m)
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42 %6 = tail call i32 @llvm.hexagon.S2.setbit.r(i32 %m, i32 %5)
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43 %cgep85 = getelementptr [10 x %struct.2], [10 x %struct.2]* inttoptr (i32 -121502345 to [10 x %struct.2]*), i32 0, i32 %idx
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44 %cgep90 = getelementptr %struct.2, %struct.2* %cgep85, i32 0, i32 12, i32 %5
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45 %7 = load i32, i32* %cgep90, align 4
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46 %8 = tail call i64 @llvm.hexagon.M2.vmpy2s.s0(i32 %7, i32 %7)
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47 %cgep91 = getelementptr %struct.2, %struct.2* %cgep85, i32 0, i32 13, i32 %5
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48 %9 = load i32, i32* %cgep91, align 4
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49 %10 = tail call i64 @llvm.hexagon.M2.vmac2s.s0(i64 %8, i32 %9, i32 %9)
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50 %11 = load i8, i8* @C1, align 1
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51 %and24 = and i8 %11, 1
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52 %cmp = icmp eq i8 %and24, 0
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53 br i1 %cmp, label %if.then, label %if.end
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54
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55 if.then: ; preds = %while.body13
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56 %12 = tail call i64 @llvm.hexagon.A2.vaddws(i64 %3, i64 %10)
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57 store i64 %12, i64* @A1, align 8
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58 br label %if.end
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59
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60 if.end: ; preds = %if.then, %while.body13
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61 %13 = phi i64 [ %12, %if.then ], [ %3, %while.body13 ]
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62 %14 = tail call i64 @llvm.hexagon.A2.vsubws(i64 %4, i64 %10)
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63 %tobool12 = icmp eq i32 %6, 0
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64 br i1 %tobool12, label %while.end, label %while.body13
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65
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66 while.end:
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67 %add40 = add i32 %idx, 1
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68 %15 = tail call i32 @llvm.hexagon.A4.modwrapu(i32 %add40, i32 10) nounwind
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69 %next = add i32 %count, 1
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70 %cc = icmp eq i32 %next, %n
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71 br i1 %cc, label %end, label %while.body
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72
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73 end:
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74 store i64 %10, i64* @A2, align 8
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75 ret void
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76 }