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annotate test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children
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1 ; RUN: llc -O3 < %s | FileCheck %s
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2 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
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3 target triple = "thumbv7-apple-darwin10"
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5 ; This test should not produce any spills, even when tail duplication creates lots of phi nodes.
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6 ; CHECK-NOT: push
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7 ; CHECK-NOT: pop
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8 ; CHECK: bx lr
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10 @codetable.2928 = internal constant [5 x i8*] [i8* blockaddress(@interpret_threaded, %RETURN), i8* blockaddress(@interpret_threaded, %INCREMENT), i8* blockaddress(@interpret_threaded, %DECREMENT), i8* blockaddress(@interpret_threaded, %DOUBLE), i8* blockaddress(@interpret_threaded, %SWAPWORD)] ; <[5 x i8*]*> [#uses=5]
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11 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i8*)* @interpret_threaded to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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12
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13 define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize {
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14 entry:
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15 %0 = load i8, i8* %opcodes, align 1 ; <i8> [#uses=1]
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16 %1 = zext i8 %0 to i32 ; <i32> [#uses=1]
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17 %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1]
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18 br label %bb
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19
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20 bb: ; preds = %bb.backedge, %entry
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21 %indvar = phi i32 [ %phitmp, %bb.backedge ], [ 1, %entry ] ; <i32> [#uses=2]
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22 %gotovar.22.0.in = phi i8** [ %gotovar.22.0.in.be, %bb.backedge ], [ %2, %entry ] ; <i8**> [#uses=1]
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23 %result.0 = phi i32 [ %result.0.be, %bb.backedge ], [ 0, %entry ] ; <i32> [#uses=6]
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24 %opcodes_addr.0 = getelementptr i8, i8* %opcodes, i32 %indvar ; <i8*> [#uses=4]
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25 %gotovar.22.0 = load i8*, i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1]
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26 indirectbr i8* %gotovar.22.0, [label %RETURN, label %INCREMENT, label %DECREMENT, label %DOUBLE, label %SWAPWORD]
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27
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28 RETURN: ; preds = %bb
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29 ret i32 %result.0
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30
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31 INCREMENT: ; preds = %bb
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32 %3 = add nsw i32 %result.0, 1 ; <i32> [#uses=1]
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33 %4 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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34 %5 = zext i8 %4 to i32 ; <i32> [#uses=1]
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35 %6 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1]
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36 br label %bb.backedge
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38 bb.backedge: ; preds = %SWAPWORD, %DOUBLE, %DECREMENT, %INCREMENT
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39 %gotovar.22.0.in.be = phi i8** [ %20, %SWAPWORD ], [ %14, %DOUBLE ], [ %10, %DECREMENT ], [ %6, %INCREMENT ] ; <i8**> [#uses=1]
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40 %result.0.be = phi i32 [ %17, %SWAPWORD ], [ %11, %DOUBLE ], [ %7, %DECREMENT ], [ %3, %INCREMENT ] ; <i32> [#uses=1]
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41 %phitmp = add i32 %indvar, 1 ; <i32> [#uses=1]
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42 br label %bb
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43
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44 DECREMENT: ; preds = %bb
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45 %7 = add i32 %result.0, -1 ; <i32> [#uses=1]
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46 %8 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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47 %9 = zext i8 %8 to i32 ; <i32> [#uses=1]
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48 %10 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1]
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49 br label %bb.backedge
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51 DOUBLE: ; preds = %bb
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52 %11 = shl i32 %result.0, 1 ; <i32> [#uses=1]
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53 %12 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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54 %13 = zext i8 %12 to i32 ; <i32> [#uses=1]
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55 %14 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1]
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56 br label %bb.backedge
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57
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58 SWAPWORD: ; preds = %bb
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59 %15 = shl i32 %result.0, 16 ; <i32> [#uses=1]
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60 %16 = ashr i32 %result.0, 16 ; <i32> [#uses=1]
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61 %17 = or i32 %15, %16 ; <i32> [#uses=1]
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62 %18 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1]
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63 %19 = zext i8 %18 to i32 ; <i32> [#uses=1]
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64 %20 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1]
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65 br label %bb.backedge
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66 }