annotate test/CodeGen/X86/2009-09-10-SpillComments.ll @ 95:afa8332a0e37 LLVM3.8

LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children
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1 ; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s
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2
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3 ; This test shouldn't require spills.
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4
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5 ; CHECK: pushq
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6 ; CHECK-NOT: $rsp
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7 ; CHECK: popq
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8
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9 %struct..0anon = type { i32 }
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10 %struct.rtvec_def = type { i32, [1 x %struct..0anon] }
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11 %struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
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12 @rtx_format = external global [116 x i8*] ; <[116 x i8*]*> [#uses=1]
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13 @rtx_length = external global [117 x i32] ; <[117 x i32]*> [#uses=1]
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15 declare %struct.rtx_def* @fixup_memory_subreg(%struct.rtx_def*, %struct.rtx_def*, i32)
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16
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17 define %struct.rtx_def* @walk_fixup_memory_subreg(%struct.rtx_def* %x, %struct.rtx_def* %insn) {
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18 entry:
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19 %tmp2 = icmp eq %struct.rtx_def* %x, null ; <i1> [#uses=1]
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20 br i1 %tmp2, label %UnifiedReturnBlock, label %cond_next
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21
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22 cond_next: ; preds = %entry
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23 %tmp6 = getelementptr %struct.rtx_def, %struct.rtx_def* %x, i32 0, i32 0 ; <i16*> [#uses=1]
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24 %tmp7 = load i16, i16* %tmp6 ; <i16> [#uses=2]
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25 %tmp78 = zext i16 %tmp7 to i32 ; <i32> [#uses=2]
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26 %tmp10 = icmp eq i16 %tmp7, 54 ; <i1> [#uses=1]
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27 br i1 %tmp10, label %cond_true13, label %cond_next32
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29 cond_true13: ; preds = %cond_next
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30 %tmp15 = getelementptr %struct.rtx_def, %struct.rtx_def* %x, i32 0, i32 3 ; <[1 x %struct..0anon]*> [#uses=1]
0
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31 %tmp1718 = bitcast [1 x %struct..0anon]* %tmp15 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1]
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32 %tmp19 = load %struct.rtx_def*, %struct.rtx_def** %tmp1718 ; <%struct.rtx_def*> [#uses=1]
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33 %tmp20 = getelementptr %struct.rtx_def, %struct.rtx_def* %tmp19, i32 0, i32 0 ; <i16*> [#uses=1]
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34 %tmp21 = load i16, i16* %tmp20 ; <i16> [#uses=1]
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35 %tmp22 = icmp eq i16 %tmp21, 57 ; <i1> [#uses=1]
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36 br i1 %tmp22, label %cond_true25, label %cond_next32
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37
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38 cond_true25: ; preds = %cond_true13
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39 %tmp29 = tail call %struct.rtx_def* @fixup_memory_subreg( %struct.rtx_def* %x, %struct.rtx_def* %insn, i32 1 ) nounwind ; <%struct.rtx_def*> [#uses=1]
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40 ret %struct.rtx_def* %tmp29
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41
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42 cond_next32: ; preds = %cond_true13, %cond_next
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43 %tmp34 = getelementptr [116 x i8*], [116 x i8*]* @rtx_format, i32 0, i32 %tmp78 ; <i8**> [#uses=1]
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44 %tmp35 = load i8*, i8** %tmp34, align 4 ; <i8*> [#uses=1]
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45 %tmp37 = getelementptr [117 x i32], [117 x i32]* @rtx_length, i32 0, i32 %tmp78 ; <i32*> [#uses=1]
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46 %tmp38 = load i32, i32* %tmp37, align 4 ; <i32> [#uses=1]
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47 %i.011 = add i32 %tmp38, -1 ; <i32> [#uses=2]
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48 %tmp12513 = icmp sgt i32 %i.011, -1 ; <i1> [#uses=1]
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49 br i1 %tmp12513, label %bb, label %UnifiedReturnBlock
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51 bb: ; preds = %bb123, %cond_next32
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52 %indvar = phi i32 [ %indvar.next26, %bb123 ], [ 0, %cond_next32 ] ; <i32> [#uses=2]
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53 %i.01.0 = sub i32 %i.011, %indvar ; <i32> [#uses=5]
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54 %tmp42 = getelementptr i8, i8* %tmp35, i32 %i.01.0 ; <i8*> [#uses=2]
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55 %tmp43 = load i8, i8* %tmp42 ; <i8> [#uses=1]
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56 switch i8 %tmp43, label %bb123 [
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57 i8 101, label %cond_true47
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58 i8 69, label %bb105.preheader
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59 ]
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61 cond_true47: ; preds = %bb
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62 %tmp52 = getelementptr %struct.rtx_def, %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0 ; <%struct..0anon*> [#uses=1]
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63 %tmp5354 = bitcast %struct..0anon* %tmp52 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1]
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64 %tmp55 = load %struct.rtx_def*, %struct.rtx_def** %tmp5354 ; <%struct.rtx_def*> [#uses=1]
0
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65 %tmp58 = tail call %struct.rtx_def* @walk_fixup_memory_subreg( %struct.rtx_def* %tmp55, %struct.rtx_def* %insn ) nounwind ; <%struct.rtx_def*> [#uses=1]
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66 %tmp62 = getelementptr %struct.rtx_def, %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0, i32 0 ; <i32*> [#uses=1]
0
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67 %tmp58.c = ptrtoint %struct.rtx_def* %tmp58 to i32 ; <i32> [#uses=1]
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68 store i32 %tmp58.c, i32* %tmp62
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69 %tmp6816 = load i8, i8* %tmp42 ; <i8> [#uses=1]
0
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70 %tmp6917 = icmp eq i8 %tmp6816, 69 ; <i1> [#uses=1]
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71 br i1 %tmp6917, label %bb105.preheader, label %bb123
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72
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73 bb105.preheader: ; preds = %cond_true47, %bb
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74 %tmp11020 = getelementptr %struct.rtx_def, %struct.rtx_def* %x, i32 0, i32 3, i32 %i.01.0 ; <%struct..0anon*> [#uses=1]
0
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75 %tmp11111221 = bitcast %struct..0anon* %tmp11020 to %struct.rtvec_def** ; <%struct.rtvec_def**> [#uses=3]
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76 %tmp11322 = load %struct.rtvec_def*, %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=1]
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77 %tmp11423 = getelementptr %struct.rtvec_def, %struct.rtvec_def* %tmp11322, i32 0, i32 0 ; <i32*> [#uses=1]
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78 %tmp11524 = load i32, i32* %tmp11423 ; <i32> [#uses=1]
0
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79 %tmp11625 = icmp eq i32 %tmp11524, 0 ; <i1> [#uses=1]
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80 br i1 %tmp11625, label %bb123, label %bb73
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81
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82 bb73: ; preds = %bb73, %bb105.preheader
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83 %j.019 = phi i32 [ %tmp104, %bb73 ], [ 0, %bb105.preheader ] ; <i32> [#uses=3]
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84 %tmp81 = load %struct.rtvec_def*, %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=2]
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85 %tmp92 = getelementptr %struct.rtvec_def, %struct.rtvec_def* %tmp81, i32 0, i32 1, i32 %j.019 ; <%struct..0anon*> [#uses=1]
0
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86 %tmp9394 = bitcast %struct..0anon* %tmp92 to %struct.rtx_def** ; <%struct.rtx_def**> [#uses=1]
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87 %tmp95 = load %struct.rtx_def*, %struct.rtx_def** %tmp9394 ; <%struct.rtx_def*> [#uses=1]
0
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88 %tmp98 = tail call %struct.rtx_def* @walk_fixup_memory_subreg( %struct.rtx_def* %tmp95, %struct.rtx_def* %insn ) nounwind ; <%struct.rtx_def*> [#uses=1]
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89 %tmp101 = getelementptr %struct.rtvec_def, %struct.rtvec_def* %tmp81, i32 0, i32 1, i32 %j.019, i32 0 ; <i32*> [#uses=1]
0
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90 %tmp98.c = ptrtoint %struct.rtx_def* %tmp98 to i32 ; <i32> [#uses=1]
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91 store i32 %tmp98.c, i32* %tmp101
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92 %tmp104 = add i32 %j.019, 1 ; <i32> [#uses=2]
95
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93 %tmp113 = load %struct.rtvec_def*, %struct.rtvec_def** %tmp11111221 ; <%struct.rtvec_def*> [#uses=1]
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94 %tmp114 = getelementptr %struct.rtvec_def, %struct.rtvec_def* %tmp113, i32 0, i32 0 ; <i32*> [#uses=1]
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95 %tmp115 = load i32, i32* %tmp114 ; <i32> [#uses=1]
0
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96 %tmp116 = icmp ult i32 %tmp104, %tmp115 ; <i1> [#uses=1]
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97 br i1 %tmp116, label %bb73, label %bb123
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98
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99 bb123: ; preds = %bb73, %bb105.preheader, %cond_true47, %bb
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100 %i.0 = add i32 %i.01.0, -1 ; <i32> [#uses=1]
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101 %tmp125 = icmp sgt i32 %i.0, -1 ; <i1> [#uses=1]
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102 %indvar.next26 = add i32 %indvar, 1 ; <i32> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
103 br i1 %tmp125, label %bb, label %UnifiedReturnBlock
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
104
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
105 UnifiedReturnBlock: ; preds = %bb123, %cond_next32, %entry
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
106 %UnifiedRetVal = phi %struct.rtx_def* [ null, %entry ], [ %x, %cond_next32 ], [ %x, %bb123 ] ; <%struct.rtx_def*> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
107 ret %struct.rtx_def* %UnifiedRetVal
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
108 }