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annotate test/CodeGen/X86/avx512cdvl-intrinsics.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents
children 7d135dc70f03
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95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd -mattr=+avx512vl| FileCheck %s
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2
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3 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readonly
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4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 declare <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32>, <4 x i32>, i8)
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6
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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7 define <4 x i32>@test_int_x86_avx512_mask_vplzcnt_d_128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 ; CHECK-LABEL: test_int_x86_avx512_mask_vplzcnt_d_128:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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9 ; CHECK: ## BB#0:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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10 ; CHECK-NEXT: movzbl %dil, %eax
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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11 ; CHECK-NEXT: kmovw %eax, %k1
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
12 ; CHECK-NEXT: vplzcntd %xmm0, %xmm1 {%k1}
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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13 ; CHECK-NEXT: vplzcntd %xmm0, %xmm2 {%k1} {z}
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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14 ; CHECK-NEXT: vplzcntd %xmm0, %xmm0
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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15 ; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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16 ; CHECK-NEXT: vpaddd %xmm2, %xmm0, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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17 ; CHECK-NEXT: retq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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18 %res = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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19 %res1 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 -1)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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20 %res3 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> zeroinitializer, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 %res2 = add <4 x i32> %res, %res1
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22 %res4 = add <4 x i32> %res2, %res3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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23 ret <4 x i32> %res4
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24 }
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25
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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26 declare <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32>, <8 x i32>, i8)
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27
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28 define <8 x i32>@test_int_x86_avx512_mask_vplzcnt_d_256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2) {
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29 ; CHECK-LABEL: test_int_x86_avx512_mask_vplzcnt_d_256:
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30 ; CHECK: ## BB#0:
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31 ; CHECK-NEXT: movzbl %dil, %eax
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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32 ; CHECK-NEXT: kmovw %eax, %k1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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33 ; CHECK-NEXT: vplzcntd %ymm0, %ymm1 {%k1}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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34 ; CHECK-NEXT: vplzcntd %ymm0, %ymm0
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35 ; CHECK-NEXT: vpaddd %ymm0, %ymm1, %ymm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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36 ; CHECK-NEXT: retq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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37 %res = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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38 %res1 = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 -1)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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39 %res2 = add <8 x i32> %res, %res1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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40 ret <8 x i32> %res2
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41 }
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42
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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43 declare <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64>, <2 x i64>, i8)
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44
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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45 define <2 x i64>@test_int_x86_avx512_mask_vplzcnt_q_128(<2 x i64> %x0, <2 x i64> %x1, i8 %x2) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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46 ; CHECK-LABEL: test_int_x86_avx512_mask_vplzcnt_q_128:
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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47 ; CHECK: ## BB#0:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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48 ; CHECK-NEXT: movzbl %dil, %eax
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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49 ; CHECK-NEXT: kmovw %eax, %k1
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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50 ; CHECK-NEXT: vplzcntq %xmm0, %xmm1 {%k1}
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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51 ; CHECK-NEXT: vplzcntq %xmm0, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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52 ; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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53 ; CHECK-NEXT: retq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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54 %res = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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55 %res1 = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 -1)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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56 %res2 = add <2 x i64> %res, %res1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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57 ret <2 x i64> %res2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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58 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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59
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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60 declare <4 x i64> @llvm.x86.avx512.mask.lzcnt.q.256(<4 x i64>, <4 x i64>, i8)
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61
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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62 define <4 x i64>@test_int_x86_avx512_mask_vplzcnt_q_256(<4 x i64> %x0, <4 x i64> %x1, i8 %x2) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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63 ; CHECK-LABEL: test_int_x86_avx512_mask_vplzcnt_q_256:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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64 ; CHECK: ## BB#0:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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65 ; CHECK-NEXT: movzbl %dil, %eax
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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66 ; CHECK-NEXT: kmovw %eax, %k1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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67 ; CHECK-NEXT: vplzcntq %ymm0, %ymm1 {%k1}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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68 ; CHECK-NEXT: vplzcntq %ymm0, %ymm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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69 ; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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70 ; CHECK-NEXT: retq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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71 %res = call <4 x i64> @llvm.x86.avx512.mask.lzcnt.q.256(<4 x i64> %x0, <4 x i64> %x1, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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72 %res1 = call <4 x i64> @llvm.x86.avx512.mask.lzcnt.q.256(<4 x i64> %x0, <4 x i64> %x1, i8 -1)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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73 %res2 = add <4 x i64> %res, %res1
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74 ret <4 x i64> %res2
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parents:
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75 }
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76
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77 declare <4 x i32> @llvm.x86.avx512.mask.conflict.d.128(<4 x i32>, <4 x i32>, i8)
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parents:
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78
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79 define <4 x i32>@test_int_x86_avx512_mask_vpconflict_d_128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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80 ; CHECK-LABEL: test_int_x86_avx512_mask_vpconflict_d_128:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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81 ; CHECK: ## BB#0:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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82 ; CHECK-NEXT: movzbl %dil, %eax
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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83 ; CHECK-NEXT: kmovw %eax, %k1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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84 ; CHECK-NEXT: vpconflictd %xmm0, %xmm1 {%k1}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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85 ; CHECK-NEXT: vpconflictd %xmm0, %xmm2 {%k1} {z}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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86 ; CHECK-NEXT: vpconflictd %xmm0, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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87 ; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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88 ; CHECK-NEXT: vpaddd %xmm2, %xmm0, %xmm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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89 ; CHECK-NEXT: retq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
90 %res = call <4 x i32> @llvm.x86.avx512.mask.conflict.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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91 %res1 = call <4 x i32> @llvm.x86.avx512.mask.conflict.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 -1)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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92 %res3 = call <4 x i32> @llvm.x86.avx512.mask.conflict.d.128(<4 x i32> %x0, <4 x i32> zeroinitializer, i8 %x2)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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93 %res2 = add <4 x i32> %res, %res1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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94 %res4 = add <4 x i32> %res2, %res3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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95 ret <4 x i32> %res4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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96 }
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parents:
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97
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98 declare <8 x i32> @llvm.x86.avx512.mask.conflict.d.256(<8 x i32>, <8 x i32>, i8)
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parents:
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99
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parents:
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100 define <8 x i32>@test_int_x86_avx512_mask_vpconflict_d_256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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101 ; CHECK-LABEL: test_int_x86_avx512_mask_vpconflict_d_256:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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102 ; CHECK: ## BB#0:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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103 ; CHECK-NEXT: movzbl %dil, %eax
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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104 ; CHECK-NEXT: kmovw %eax, %k1
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
105 ; CHECK-NEXT: vpconflictd %ymm0, %ymm1 {%k1}
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
106 ; CHECK-NEXT: vpconflictd %ymm0, %ymm0
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
107 ; CHECK-NEXT: vpaddd %ymm0, %ymm1, %ymm0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
108 ; CHECK-NEXT: retq
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109 %res = call <8 x i32> @llvm.x86.avx512.mask.conflict.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2)
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110 %res1 = call <8 x i32> @llvm.x86.avx512.mask.conflict.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 -1)
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111 %res2 = add <8 x i32> %res, %res1
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112 ret <8 x i32> %res2
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113 }
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114
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115 declare <2 x i64> @llvm.x86.avx512.mask.conflict.q.128(<2 x i64>, <2 x i64>, i8)
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116
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117 define <2 x i64>@test_int_x86_avx512_mask_vpconflict_q_128(<2 x i64> %x0, <2 x i64> %x1, i8 %x2) {
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118 ; CHECK-LABEL: test_int_x86_avx512_mask_vpconflict_q_128:
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119 ; CHECK: ## BB#0:
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120 ; CHECK-NEXT: movzbl %dil, %eax
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121 ; CHECK-NEXT: kmovw %eax, %k1
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122 ; CHECK-NEXT: vpconflictq %xmm0, %xmm1 {%k1}
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123 ; CHECK-NEXT: vpconflictq %xmm0, %xmm0
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124 ; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0
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125 ; CHECK-NEXT: retq
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126 %res = call <2 x i64> @llvm.x86.avx512.mask.conflict.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 %x2)
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127 %res1 = call <2 x i64> @llvm.x86.avx512.mask.conflict.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 -1)
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128 %res2 = add <2 x i64> %res, %res1
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129 ret <2 x i64> %res2
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130 }
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131
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132 declare <4 x i64> @llvm.x86.avx512.mask.conflict.q.256(<4 x i64>, <4 x i64>, i8)
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133
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134 define <4 x i64>@test_int_x86_avx512_mask_vpconflict_q_256(<4 x i64> %x0, <4 x i64> %x1, i8 %x2) {
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135 ; CHECK-LABEL: test_int_x86_avx512_mask_vpconflict_q_256:
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136 ; CHECK: ## BB#0:
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137 ; CHECK-NEXT: movzbl %dil, %eax
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138 ; CHECK-NEXT: kmovw %eax, %k1
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parents:
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139 ; CHECK-NEXT: vpconflictq %ymm0, %ymm1 {%k1}
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parents:
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140 ; CHECK-NEXT: vpconflictq %ymm0, %ymm0
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parents:
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141 ; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
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142 ; CHECK-NEXT: retq
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143 %res = call <4 x i64> @llvm.x86.avx512.mask.conflict.q.256(<4 x i64> %x0, <4 x i64> %x1, i8 %x2)
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parents:
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144 %res1 = call <4 x i64> @llvm.x86.avx512.mask.conflict.q.256(<4 x i64> %x0, <4 x i64> %x1, i8 -1)
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parents:
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145 %res2 = add <4 x i64> %res, %res1
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diff changeset
146 ret <4 x i64> %res2
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147 }
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parents:
diff changeset
148