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1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=FAST32
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2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=SLOW32
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3
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4 define <4 x float> @merge_2_floats(float* nocapture %p) nounwind readonly {
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95
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5 %tmp1 = load float, float* %p
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83
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6 %vecins = insertelement <4 x float> undef, float %tmp1, i32 0
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95
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7 %add.ptr = getelementptr float, float* %p, i32 1
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8 %tmp5 = load float, float* %add.ptr
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9 %vecins7 = insertelement <4 x float> %vecins, float %tmp5, i32 1
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10 ret <4 x float> %vecins7
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11
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12 ; ALL-LABEL: merge_2_floats
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13 ; ALL: vmovq
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14 ; ALL-NEXT: retq
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15 }
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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16
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83
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17 ; Test-case generated due to a crash when trying to treat loading the first
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18 ; two i64s of a <4 x i64> as a load of two i32s.
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19 define <4 x i64> @merge_2_floats_into_4() {
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20 %1 = load i64*, i64** undef, align 8
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21 %2 = getelementptr inbounds i64, i64* %1, i64 0
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22 %3 = load i64, i64* %2
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23 %4 = insertelement <4 x i64> undef, i64 %3, i32 0
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24 %5 = load i64*, i64** undef, align 8
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25 %6 = getelementptr inbounds i64, i64* %5, i64 1
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26 %7 = load i64, i64* %6
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27 %8 = insertelement <4 x i64> %4, i64 %7, i32 1
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28 %9 = shufflevector <4 x i64> %8, <4 x i64> undef, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
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29 ret <4 x i64> %9
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30
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31 ; ALL-LABEL: merge_2_floats_into_4
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32 ; ALL: vmovups
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33 ; ALL-NEXT: retq
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34 }
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35
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36 define <4 x float> @merge_4_floats(float* %ptr) {
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37 %a = load float, float* %ptr, align 8
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38 %vec = insertelement <4 x float> undef, float %a, i32 0
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39 %idx1 = getelementptr inbounds float, float* %ptr, i64 1
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40 %b = load float, float* %idx1, align 8
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41 %vec2 = insertelement <4 x float> %vec, float %b, i32 1
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42 %idx3 = getelementptr inbounds float, float* %ptr, i64 2
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43 %c = load float, float* %idx3, align 8
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44 %vec4 = insertelement <4 x float> %vec2, float %c, i32 2
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45 %idx5 = getelementptr inbounds float, float* %ptr, i64 3
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46 %d = load float, float* %idx5, align 8
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47 %vec6 = insertelement <4 x float> %vec4, float %d, i32 3
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48 ret <4 x float> %vec6
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49
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50 ; ALL-LABEL: merge_4_floats
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51 ; ALL: vmovups
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52 ; ALL-NEXT: retq
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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53 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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54
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55 ; PR21710 ( http://llvm.org/bugs/show_bug.cgi?id=21710 )
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56 ; Make sure that 32-byte vectors are handled efficiently.
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57 ; If the target has slow 32-byte accesses, we should still generate
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58 ; 16-byte loads.
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59
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60 define <8 x float> @merge_8_floats(float* %ptr) {
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61 %a = load float, float* %ptr, align 4
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62 %vec = insertelement <8 x float> undef, float %a, i32 0
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63 %idx1 = getelementptr inbounds float, float* %ptr, i64 1
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64 %b = load float, float* %idx1, align 4
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65 %vec2 = insertelement <8 x float> %vec, float %b, i32 1
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66 %idx3 = getelementptr inbounds float, float* %ptr, i64 2
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67 %c = load float, float* %idx3, align 4
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68 %vec4 = insertelement <8 x float> %vec2, float %c, i32 2
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69 %idx5 = getelementptr inbounds float, float* %ptr, i64 3
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70 %d = load float, float* %idx5, align 4
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71 %vec6 = insertelement <8 x float> %vec4, float %d, i32 3
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72 %idx7 = getelementptr inbounds float, float* %ptr, i64 4
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73 %e = load float, float* %idx7, align 4
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74 %vec8 = insertelement <8 x float> %vec6, float %e, i32 4
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75 %idx9 = getelementptr inbounds float, float* %ptr, i64 5
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76 %f = load float, float* %idx9, align 4
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77 %vec10 = insertelement <8 x float> %vec8, float %f, i32 5
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78 %idx11 = getelementptr inbounds float, float* %ptr, i64 6
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79 %g = load float, float* %idx11, align 4
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80 %vec12 = insertelement <8 x float> %vec10, float %g, i32 6
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81 %idx13 = getelementptr inbounds float, float* %ptr, i64 7
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82 %h = load float, float* %idx13, align 4
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83
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83 %vec14 = insertelement <8 x float> %vec12, float %h, i32 7
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84 ret <8 x float> %vec14
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85
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86 ; ALL-LABEL: merge_8_floats
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87
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88 ; FAST32: vmovups
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89 ; FAST32-NEXT: retq
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90
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91 ; SLOW32: vmovups
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92 ; SLOW32-NEXT: vinsertf128
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93 ; SLOW32-NEXT: retq
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94 }
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95
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96 define <4 x double> @merge_4_doubles(double* %ptr) {
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97 %a = load double, double* %ptr, align 8
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98 %vec = insertelement <4 x double> undef, double %a, i32 0
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99 %idx1 = getelementptr inbounds double, double* %ptr, i64 1
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100 %b = load double, double* %idx1, align 8
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101 %vec2 = insertelement <4 x double> %vec, double %b, i32 1
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102 %idx3 = getelementptr inbounds double, double* %ptr, i64 2
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103 %c = load double, double* %idx3, align 8
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104 %vec4 = insertelement <4 x double> %vec2, double %c, i32 2
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105 %idx5 = getelementptr inbounds double, double* %ptr, i64 3
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106 %d = load double, double* %idx5, align 8
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107 %vec6 = insertelement <4 x double> %vec4, double %d, i32 3
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108 ret <4 x double> %vec6
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109
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110 ; ALL-LABEL: merge_4_doubles
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111 ; FAST32: vmovups
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112 ; FAST32-NEXT: retq
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113
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114 ; SLOW32: vmovups
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115 ; SLOW32-NEXT: vinsertf128
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116 ; SLOW32-NEXT: retq
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117 }
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118
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119 ; PR21771 ( http://llvm.org/bugs/show_bug.cgi?id=21771 )
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120 ; Recognize and combine consecutive loads even when the
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121 ; first of the combined loads is offset from the base address.
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122 define <4 x double> @merge_4_doubles_offset(double* %ptr) {
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123 %arrayidx4 = getelementptr inbounds double, double* %ptr, i64 4
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124 %arrayidx5 = getelementptr inbounds double, double* %ptr, i64 5
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125 %arrayidx6 = getelementptr inbounds double, double* %ptr, i64 6
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126 %arrayidx7 = getelementptr inbounds double, double* %ptr, i64 7
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127 %e = load double, double* %arrayidx4, align 8
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128 %f = load double, double* %arrayidx5, align 8
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129 %g = load double, double* %arrayidx6, align 8
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130 %h = load double, double* %arrayidx7, align 8
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131 %vecinit4 = insertelement <4 x double> undef, double %e, i32 0
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132 %vecinit5 = insertelement <4 x double> %vecinit4, double %f, i32 1
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133 %vecinit6 = insertelement <4 x double> %vecinit5, double %g, i32 2
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134 %vecinit7 = insertelement <4 x double> %vecinit6, double %h, i32 3
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135 ret <4 x double> %vecinit7
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136
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137 ; ALL-LABEL: merge_4_doubles_offset
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138 ; FAST32: vmovups
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139 ; FAST32-NEXT: retq
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140
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141 ; SLOW32: vmovups
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142 ; SLOW32-NEXT: vinsertf128
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143 ; SLOW32-NEXT: retq
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144 }
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145
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