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annotate lib/Target/Sparc/SparcInstrVIS.td @ 147:c2174574ed3a

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LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents 54457678186b
children
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1 //===---- SparcInstrVIS.td - Visual Instruction Set extensions (VIS) -----===//
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2 //
147
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // This file contains instruction formats, definitions and patterns needed for
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10 // VIS, VIS II, VIS II instructions on SPARC.
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11 //===----------------------------------------------------------------------===//
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12
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13 // VIS Instruction Format.
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14 class VISInstFormat<bits<9> opfval, dag outs, dag ins, string asmstr,
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15 list<dag> pattern>
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16 : F3_3<0b10, 0b110110, opfval, outs, ins, asmstr, pattern>;
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17
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18 class VISInst<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
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19 : VISInstFormat<opfval,
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20 (outs RC:$rd), (ins RC:$rs1, RC:$rs2),
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21 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
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22
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23 // VIS Instruction with integer destination register.
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24 class VISInstID<bits<9> opfval, string OpcStr>
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25 : VISInstFormat<opfval,
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26 (outs I64Regs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
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27 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
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28
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29 // For VIS Instructions with no operand.
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30 let rd = 0, rs1 = 0, rs2 = 0 in
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31 class VISInst0<bits<9> opfval, string asmstr>
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32 : VISInstFormat<opfval, (outs), (ins), asmstr, []>;
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33
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34 // For VIS Instructions with only rs1, rd operands.
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35 let rs2 = 0 in
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36 class VISInst1<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
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37 : VISInstFormat<opfval,
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38 (outs RC:$rd), (ins RC:$rs1),
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39 !strconcat(OpcStr, " $rs1, $rd"), []>;
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40
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41 // For VIS Instructions with only rs2, rd operands.
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42 let rs1 = 0 in
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43 class VISInst2<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
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44 : VISInstFormat<opfval,
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45 (outs RC:$rd), (ins RC:$rs2),
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46 !strconcat(OpcStr, " $rs2, $rd"), []>;
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47
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48 // For VIS Instructions with only rd operand.
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49 let Constraints = "$rd = $f", rs1 = 0, rs2 = 0 in
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50 class VISInstD<bits<9> opfval, string OpcStr, RegisterClass RC = DFPRegs>
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51 : VISInstFormat<opfval,
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52 (outs RC:$rd), (ins RC:$f),
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53 !strconcat(OpcStr, " $rd"), []>;
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54
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55 // VIS 1 Instructions
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56 let Predicates = [HasVIS] in {
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57
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58 def FPADD16 : VISInst<0b001010000, "fpadd16">;
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59 def FPADD16S : VISInst<0b001010001, "fpadd16s">;
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60 def FPADD32 : VISInst<0b001010010, "fpadd32">;
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61 def FPADD32S : VISInst<0b001010011, "fpadd32s">;
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62 def FPSUB16 : VISInst<0b001010100, "fpsub16">;
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63 def FPSUB16S : VISInst<0b001010101, "fpsub16S">;
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64 def FPSUB32 : VISInst<0b001010110, "fpsub32">;
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65 def FPSUB32S : VISInst<0b001010111, "fpsub32S">;
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66
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67 def FPACK16 : VISInst2<0b000111011, "fpack16">;
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68 def FPACK32 : VISInst <0b000111010, "fpack32">;
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69 def FPACKFIX : VISInst2<0b000111101, "fpackfix">;
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70 def FEXPAND : VISInst2<0b001001101, "fexpand">;
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71 def FPMERGE : VISInst <0b001001011, "fpmerge">;
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72
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73 def FMUL8X16 : VISInst<0b000110001, "fmul8x16">;
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74 def FMUL8X16AU : VISInst<0b000110011, "fmul8x16au">;
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75 def FMUL8X16AL : VISInst<0b000110101, "fmul8x16al">;
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76 def FMUL8SUX16 : VISInst<0b000110110, "fmul8sux16">;
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77 def FMUL8ULX16 : VISInst<0b000110111, "fmul8ulx16">;
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78 def FMULD8SUX16 : VISInst<0b000111000, "fmuld8sux16">;
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79 def FMULD8ULX16 : VISInst<0b000111001, "fmuld8ulx16">;
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80
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81 def ALIGNADDR : VISInst<0b000011000, "alignaddr", I64Regs>;
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82 def ALIGNADDRL : VISInst<0b000011010, "alignaddrl", I64Regs>;
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83 def FALIGNADATA : VISInst<0b001001000, "faligndata">;
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84
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85 def FZERO : VISInstD<0b001100000, "fzero">;
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86 def FZEROS : VISInstD<0b001100001, "fzeros", FPRegs>;
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87 def FONE : VISInstD<0b001111110, "fone">;
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88 def FONES : VISInstD<0b001111111, "fones", FPRegs>;
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89 def FSRC1 : VISInst1<0b001110100, "fsrc1">;
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90 def FSRC1S : VISInst1<0b001110101, "fsrc1s", FPRegs>;
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91 def FSRC2 : VISInst2<0b001111000, "fsrc2">;
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92 def FSRC2S : VISInst2<0b001111001, "fsrc2s", FPRegs>;
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93 def FNOT1 : VISInst1<0b001101010, "fnot1">;
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94 def FNOT1S : VISInst1<0b001101011, "fnot1s", FPRegs>;
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95 def FNOT2 : VISInst2<0b001100110, "fnot2">;
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96 def FNOT2S : VISInst2<0b001100111, "fnot2s", FPRegs>;
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97 def FOR : VISInst<0b001111100, "for">;
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98 def FORS : VISInst<0b001111101, "fors", FPRegs>;
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99 def FNOR : VISInst<0b001100010, "fnor">;
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100 def FNORS : VISInst<0b001100011, "fnors", FPRegs>;
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101 def FAND : VISInst<0b001110000, "fand">;
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102 def FANDS : VISInst<0b001110001, "fands", FPRegs>;
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103 def FNAND : VISInst<0b001101110, "fnand">;
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104 def FNANDS : VISInst<0b001101111, "fnands", FPRegs>;
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105 def FXOR : VISInst<0b001101100, "fxor">;
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106 def FXORS : VISInst<0b001101101, "fxors", FPRegs>;
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107 def FXNOR : VISInst<0b001110010, "fxnor">;
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108 def FXNORS : VISInst<0b001110011, "fxnors", FPRegs>;
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109
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110 def FORNOT1 : VISInst<0b001111010, "fornot1">;
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111 def FORNOT1S : VISInst<0b001111011, "fornot1s", FPRegs>;
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112 def FORNOT2 : VISInst<0b001110110, "fornot2">;
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113 def FORNOT2S : VISInst<0b001110111, "fornot2s", FPRegs>;
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114 def FANDNOT1 : VISInst<0b001101000, "fandnot1">;
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115 def FANDNOT1S : VISInst<0b001101001, "fandnot1s", FPRegs>;
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116 def FANDNOT2 : VISInst<0b001100100, "fandnot2">;
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117 def FANDNOT2S : VISInst<0b001100101, "fandnot2s", FPRegs>;
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118
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119 def FCMPGT16 : VISInstID<0b000101000, "fcmpgt16">;
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parents:
diff changeset
120 def FCMPGT32 : VISInstID<0b000101100, "fcmpgt32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
121 def FCMPLE16 : VISInstID<0b000100000, "fcmple16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
122 def FCMPLE32 : VISInstID<0b000100100, "fcmple32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
123 def FCMPNE16 : VISInstID<0b000100010, "fcmpne16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
124 def FCMPNE32 : VISInstID<0b000100110, "fcmpne32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
125 def FCMPEQ16 : VISInstID<0b000101010, "fcmpeq16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
126 def FCMPEQ32 : VISInstID<0b000101110, "fcmpeq32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
127
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
128
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
129 def EDGE8 : VISInst<0b000000000, "edge8", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130 def EDGE8L : VISInst<0b000000010, "edge8l", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 def EDGE16 : VISInst<0b000000100, "edge16", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 def EDGE16L : VISInst<0b000000110, "edge16l", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 def EDGE32 : VISInst<0b000001000, "edge32", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 def EDGE32L : VISInst<0b000001010, "edge32l", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 def PDIST : VISInst<0b000111110, "pdist">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 def ARRAY8 : VISInst<0b000010000, "array8", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 def ARRAY16 : VISInst<0b000010010, "array16", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 def ARRAY32 : VISInst<0b000010100, "array32", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 def SHUTDOWN : VISInst0<0b010000000, "shutdown">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 } // Predicates = [HasVIS]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 // VIS 2 Instructions.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 let Predicates = [HasVIS2] in {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 def BMASK : VISInst<0b000011001, "bmask", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 def BSHUFFLE : VISInst<0b000011100, "bshuffle">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153 def SIAM : VISInst0<0b010000001, "siam">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 def EDGE8N : VISInst<0b000000001, "edge8n", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 def EDGE8LN : VISInst<0b000000011, "edge8ln", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 def EDGE16N : VISInst<0b000000101, "edge16n", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 def EDGE16LN : VISInst<0b000000111, "edge16ln", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 def EDGE32N : VISInst<0b000001001, "edge32n", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 def EDGE32LN : VISInst<0b000001011, "edge32ln", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 } // Predicates = [HasVIS2]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 // VIS 3 Instructions.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 let Predicates = [HasVIS3] in {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 let Uses = [ICC] in
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 def ADDXC : VISInst<0b000010001, "addxc", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 let Defs = [ICC], Uses = [ICC] in
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 def ADDXCCC : VISInst<0b000010011, "addxccc", I64Regs>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 let rd = 0, rs1 = 0 in {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 def CMASK8 : VISInstFormat<0b000011011, (outs), (ins I64Regs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 "cmask8 $rs2", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 def CMASK16 : VISInstFormat<0b000011101, (outs), (ins I64Regs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 "cmask16 $rs2", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178 def CMASK32 : VISInstFormat<0b000011111, (outs), (ins I64Regs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 "cmask32 $rs2", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 def FCHKSM16 : VISInst<0b001000100, "fchksm16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 def FHADDS : F3_3<0b10, 0b110100, 0b001100001,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 "fhadds $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 def FHADDD : F3_3<0b10, 0b110100, 0b001100010,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 "fhaddd $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 def FHSUBS : F3_3<0b10, 0b110100, 0b001100101,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 "fhsubs $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 def FHSUBD : F3_3<0b10, 0b110100, 0b001100110,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 "fhsubd $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 def FLCMPS : VISInstFormat<0b101010001, (outs FCCRegs:$rd),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 "flcmps $rd, $rs1, $rs2", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 def FLCMPD : VISInstFormat<0b101010010, (outs FCCRegs:$rd),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 "flcmpd $rd, $rs1, $rs2", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 def FMEAN16 : VISInst<0b001000000, "fmean16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 def FNADDS : F3_3<0b10, 0b110100, 0b001010001,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 "fnadds $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 def FNADDD : F3_3<0b10, 0b110100, 0b001010010,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 "fnaddd $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 def FNHADDS : F3_3<0b10, 0b110100, 0b001110001,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 "fnhadds $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 def FNHADDD : F3_3<0b10, 0b110100, 0b001110010,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 "fnhaddd $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 def FNMULS : F3_3<0b10, 0b110100, 0b001011001,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 "fnhadds $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 def FNMULD : F3_3<0b10, 0b110100, 0b001011010,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
224 "fnhaddd $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 def FNSMULD : F3_3<0b10, 0b110100, 0b001111001,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 (outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 "fnhadds $rs1, $rs2, $rd", []>;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 def FPADD64 : VISInst<0b001000010, "fpadd64">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 def FSLL16 : VISInst<0b000100001, "fsll16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 def FSRL16 : VISInst<0b000100011, "fsrl16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 def FSLL32 : VISInst<0b000100101, "fsll32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 def FSRL32 : VISInst<0b000100111, "fsrl32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235 def FSLAS16 : VISInst<0b000101001, "fslas16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 def FSRA16 : VISInst<0b000101011, "fsra16">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 def FSLAS32 : VISInst<0b000101101, "fslas32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 def FSRA32 : VISInst<0b000101111, "fsra32">;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 let rs1 = 0 in
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 def LZCNT : VISInstFormat<0b000010111, (outs I64Regs:$rd),
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 (ins I64Regs:$rs2), "lzcnt $rs2, $rd", []>;
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243
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244 let rs1 = 0 in {
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245 def MOVSTOSW : VISInstFormat<0b100010011, (outs I64Regs:$rd),
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246 (ins DFPRegs:$rs2), "movstosw $rs2, $rd", []>;
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247 def MOVSTOUW : VISInstFormat<0b100010001, (outs I64Regs:$rd),
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248 (ins DFPRegs:$rs2), "movstouw $rs2, $rd", []>;
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249 def MOVDTOX : VISInstFormat<0b100010000, (outs I64Regs:$rd),
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250 (ins DFPRegs:$rs2), "movdtox $rs2, $rd", []>;
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251 def MOVWTOS : VISInstFormat<0b100011001, (outs DFPRegs:$rd),
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252 (ins I64Regs:$rs2), "movdtox $rs2, $rd", []>;
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253 def MOVXTOD : VISInstFormat<0b100011000, (outs DFPRegs:$rd),
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254 (ins I64Regs:$rs2), "movdtox $rs2, $rd", []>;
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255 }
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256
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257 def PDISTN : VISInst<0b000111111, "pdistn">;
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258
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259 def UMULXHI : VISInst<0b000010110, "umulxhi", I64Regs>;
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260 def XMULX : VISInst<0b100010101, "xmulx", I64Regs>;
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261 def XMULXHI : VISInst<0b100010111, "xmulxhi", I64Regs>;
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262 } // Predicates = [IsVIS3]