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annotate test/MC/AMDGPU/vop2-err.s @ 147:c2174574ed3a

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LLVM 10
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 14 Aug 2019 16:55:33 +0900
parents 803732b1fca8
children
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1 // RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
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2 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s
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4 //===----------------------------------------------------------------------===//
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5 // Generic checks
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6 //===----------------------------------------------------------------------===//
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7
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8 v_mul_i32_i24 v1, v2, 100
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9 // CHECK: error: invalid literal operand
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10
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11 //===----------------------------------------------------------------------===//
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12 // _e32 checks
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13 //===----------------------------------------------------------------------===//
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14
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15 // Immediate src1
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16 v_mul_i32_i24_e32 v1, v2, 100
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17 // CHECK: error: invalid operand for instruction
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18
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19 // sgpr src1
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20 v_mul_i32_i24_e32 v1, v2, s3
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21 // CHECK: error: invalid operand for instruction
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22
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23 v_cndmask_b32_e32 v1, v2, v3, s[0:1]
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24 // CHECK: error: invalid operand for instruction
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25
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26 //===----------------------------------------------------------------------===//
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27 // _e64 checks
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28 //===----------------------------------------------------------------------===//
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29
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30 // Immediate src0
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31 v_mul_i32_i24_e64 v1, 100, v3
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32 // CHECK: error: invalid literal operand
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33
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34 // Immediate src1
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35 v_mul_i32_i24_e64 v1, v2, 100
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36 // CHECK: error: invalid literal operand
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37
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38 v_add_i32_e32 v1, s[0:1], v2, v3
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39 // CHECK: error: invalid operand for instruction
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40
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41 v_addc_u32_e32 v1, vcc, v2, v3, s[2:3]
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42 // CHECK: error: invalid operand for instruction
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43
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44 v_addc_u32_e32 v1, s[0:1], v2, v3, s[2:3]
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45 // CHECK: error: invalid operand for instruction
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46
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47 v_addc_u32_e32 v1, vcc, v2, v3, -1
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48 // CHECK: error: invalid operand for instruction
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49
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50 v_addc_u32_e32 v1, vcc, v2, v3, 123
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51 // CHECK: error: invalid operand for instruction
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52
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53 v_addc_u32_e32 v1, vcc, v2, v3, s0
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54 // CHECK: error: invalid operand for instruction
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55
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56 v_addc_u32_e32 v1, -1, v2, v3, s0
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57 // CHECK: error: invalid operand for instruction
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58
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59 v_addc_u32_e64 v1, s[0:1], v2, v3, 123
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60 // CHECK: error: invalid operand for instruction
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61
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62 v_addc_u32 v1, s[0:1], v2, v3, 123
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63 // CHECK: error: invalid operand for instruction
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64
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65 // TODO: Constant bus restrictions