annotate clang/test/CodeGenCUDA/managed-var.cu @ 236:c4bab56944e8 llvm-original

LLVM 16
author kono
date Wed, 09 Nov 2022 17:45:10 +0900
parents 5f17cb93ff66
children 1f2b6ac9f198
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 // RUN: %clang_cc1 -no-opaque-pointers -triple amdgcn-amd-amdhsa -fcuda-is-device -std=c++11 \
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2 // RUN: -emit-llvm -o - -x hip %s | FileCheck \
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3 // RUN: -check-prefixes=COMMON,DEV,NORDC-D %s
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4
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5 // RUN: %clang_cc1 -no-opaque-pointers -triple amdgcn-amd-amdhsa -fcuda-is-device -std=c++11 \
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6 // RUN: -emit-llvm -fgpu-rdc -cuid=abc -o - -x hip %s > %t.dev
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7 // RUN: cat %t.dev | FileCheck -check-prefixes=COMMON,DEV,RDC-D %s
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8
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9 // RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-gnu-linux -std=c++11 \
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10 // RUN: -emit-llvm -o - -x hip %s | FileCheck \
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11 // RUN: -check-prefixes=COMMON,HOST,NORDC %s
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12
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13 // RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-gnu-linux -std=c++11 \
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14 // RUN: -emit-llvm -fgpu-rdc -cuid=abc -o - -x hip %s > %t.host
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15 // RUN: cat %t.host | FileCheck -check-prefixes=COMMON,HOST,RDC %s
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16
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17 // Check device and host compilation use the same postfix for static
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18 // variable name.
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19
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20 // RUN: cat %t.dev %t.host | FileCheck -check-prefix=POSTFIX %s
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21
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22 #include "Inputs/cuda.h"
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23
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24 struct vec {
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25 float x,y,z;
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26 };
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27
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28 // DEV-DAG: @x.managed = addrspace(1) externally_initialized global i32 1, align 4
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29 // DEV-DAG: @x = addrspace(1) externally_initialized global i32 addrspace(1)* null
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30 // NORDC-DAG: @x.managed = internal global i32 1
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31 // RDC-DAG: @x.managed = global i32 1
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32 // NORDC-DAG: @x = internal externally_initialized global i32* null
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33 // RDC-DAG: @x = externally_initialized global i32* null
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34 // HOST-DAG: @[[DEVNAMEX:[0-9]+]] = {{.*}}c"x\00"
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35 __managed__ int x = 1;
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36
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37 // DEV-DAG: @v.managed = addrspace(1) externally_initialized global [100 x %struct.vec] zeroinitializer, align 4
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38 // DEV-DAG: @v = addrspace(1) externally_initialized global [100 x %struct.vec] addrspace(1)* null
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39 __managed__ vec v[100];
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40
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41 // DEV-DAG: @v2.managed = addrspace(1) externally_initialized global <{ %struct.vec, [99 x %struct.vec] }> <{ %struct.vec { float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 }, [99 x %struct.vec] zeroinitializer }>, align 4
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42 // DEV-DAG: @v2 = addrspace(1) externally_initialized global <{ %struct.vec, [99 x %struct.vec] }> addrspace(1)* null
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43 __managed__ vec v2[100] = {{1, 1, 1}};
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44
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45 // DEV-DAG: @ex.managed = external addrspace(1) global i32, align 4
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46 // DEV-DAG: @ex = external addrspace(1) externally_initialized global i32 addrspace(1)*
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47 // HOST-DAG: @ex.managed = external global i32
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48 // HOST-DAG: @ex = external externally_initialized global i32*
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49 extern __managed__ int ex;
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50
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51 // NORDC-D-DAG: @_ZL2sx.managed = addrspace(1) externally_initialized global i32 1, align 4
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52 // NORDC-D-DAG: @_ZL2sx = addrspace(1) externally_initialized global i32 addrspace(1)* null
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53 // RDC-D-DAG: @_ZL2sx.static.[[HASH:.*]].managed = addrspace(1) externally_initialized global i32 1, align 4
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54 // RDC-D-DAG: @_ZL2sx.static.[[HASH]] = addrspace(1) externally_initialized global i32 addrspace(1)* null
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55 // HOST-DAG: @_ZL2sx.managed = internal global i32 1
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56 // HOST-DAG: @_ZL2sx = internal externally_initialized global i32* null
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57 // NORDC-DAG: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx\00"
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58 // RDC-DAG: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx.static.[[HASH:.*]]\00"
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59
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60 // POSTFIX: @_ZL2sx.static.[[HASH:.*]] = addrspace(1) externally_initialized global i32 addrspace(1)* null
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61 // POSTFIX: @[[DEVNAMESX:[0-9]+]] = {{.*}}c"_ZL2sx.static.[[HASH]]\00"
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62 static __managed__ int sx = 1;
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63
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64 // DEV-DAG: @llvm.compiler.used
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65 // DEV-SAME-DAG: @x.managed
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66 // DEV-SAME-DAG: @x
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67 // DEV-SAME-DAG: @v.managed
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68 // DEV-SAME-DAG: @v
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69 // DEV-SAME-DAG: @_ZL2sx.managed
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70 // DEV-SAME-DAG: @_ZL2sx
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71
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72 // Force ex and sx mitted in device compilation.
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73 __global__ void foo(int *z) {
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74 *z = x + ex + sx;
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75 v[1].x = 2;
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76 }
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77
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78 // Force ex and sx emitted in host compilatioin.
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79 int foo2() {
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80 return ex + sx;
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81 }
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82
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83 // COMMON-LABEL: define {{.*}}@_Z4loadv()
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84 // DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @x, align 4
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85 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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86 // DEV: %1 = load i32, i32* %0, align 4
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87 // DEV: ret i32 %1
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88 // HOST: %ld.managed = load i32*, i32** @x, align 4
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89 // HOST: %0 = load i32, i32* %ld.managed, align 4
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90 // HOST: ret i32 %0
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91 __device__ __host__ int load() {
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92 return x;
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93 }
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94
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95 // COMMON-LABEL: define {{.*}}@_Z5storev()
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96 // DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @x, align 4
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97 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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98 // DEV: store i32 2, i32* %0, align 4
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99 // HOST: %ld.managed = load i32*, i32** @x, align 4
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100 // HOST: store i32 2, i32* %ld.managed, align 4
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101 __device__ __host__ void store() {
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102 x = 2;
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103 }
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104
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105 // COMMON-LABEL: define {{.*}}@_Z10addr_takenv()
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106 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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107 // DEV: store i32* %0, i32** %p.ascast, align 8
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108 // DEV: %1 = load i32*, i32** %p.ascast, align 8
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109 // DEV: store i32 3, i32* %1, align 4
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110 // HOST: %ld.managed = load i32*, i32** @x, align 4
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111 // HOST: store i32* %ld.managed, i32** %p, align 8
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112 // HOST: %0 = load i32*, i32** %p, align 8
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113 // HOST: store i32 3, i32* %0, align 4
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114 __device__ __host__ void addr_taken() {
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115 int *p = &x;
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116 *p = 3;
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117 }
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118
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119 // HOST-LABEL: define {{.*}}@_Z5load2v()
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120 // HOST: %ld.managed = load [100 x %struct.vec]*, [100 x %struct.vec]** @v, align 16
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121 // HOST: %0 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %ld.managed, i64 0, i64 1, i32 0
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122 // HOST: %1 = load float, float* %0, align 4
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123 // HOST: ret float %1
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124 __device__ __host__ float load2() {
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125 return v[1].x;
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126 }
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127
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128 // HOST-LABEL: define {{.*}}@_Z5load3v()
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129 // HOST: %ld.managed = load <{ %struct.vec, [99 x %struct.vec] }>*, <{ %struct.vec, [99 x %struct.vec] }>** @v2, align 16
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130 // HOST: %0 = bitcast <{ %struct.vec, [99 x %struct.vec] }>* %ld.managed to [100 x %struct.vec]*
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131 // HOST: %1 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %0, i64 0, i64 1, i32 1
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132 // HOST: %2 = load float, float* %1, align 4
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133 // HOST: ret float %2
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134 float load3() {
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135 return v2[1].y;
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136 }
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137
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138 // HOST-LABEL: define {{.*}}@_Z11addr_taken2v()
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139 // HOST: %ld.managed = load [100 x %struct.vec]*, [100 x %struct.vec]** @v, align 16
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140 // HOST: %0 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %ld.managed, i64 0, i64 1, i32 0
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141 // HOST: %1 = ptrtoint float* %0 to i64
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142 // HOST: %ld.managed1 = load <{ %struct.vec, [99 x %struct.vec] }>*, <{ %struct.vec, [99 x %struct.vec] }>** @v2, align 16
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143 // HOST: %2 = bitcast <{ %struct.vec, [99 x %struct.vec] }>* %ld.managed1 to [100 x %struct.vec]*
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144 // HOST: %3 = getelementptr inbounds [100 x %struct.vec], [100 x %struct.vec]* %2, i64 0, i64 1, i32 1
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145 // HOST: %4 = ptrtoint float* %3 to i64
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146 // HOST: %5 = sub i64 %4, %1
236
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147 // HOST: %sub.ptr.div = sdiv exact i64 %5, 4
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148 // HOST: %conv = sitofp i64 %sub.ptr.div to float
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149 // HOST: ret float %conv
221
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150 float addr_taken2() {
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151 return (float)reinterpret_cast<long>(&(v2[1].y)-&(v[1].x));
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152 }
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153
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154 // COMMON-LABEL: define {{.*}}@_Z5load4v()
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155 // DEV: %ld.managed = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @ex, align 4
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156 // DEV: %0 = addrspacecast i32 addrspace(1)* %ld.managed to i32*
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157 // DEV: %1 = load i32, i32* %0, align 4
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158 // DEV: ret i32 %1
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159 // HOST: %ld.managed = load i32*, i32** @ex, align 4
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160 // HOST: %0 = load i32, i32* %ld.managed, align 4
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161 // HOST: ret i32 %0
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162 __device__ __host__ int load4() {
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163 return ex;
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164 }
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165
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166 // HOST-DAG: __hipRegisterManagedVar({{.*}}@x {{.*}}@x.managed {{.*}}@[[DEVNAMEX]]{{.*}}, i64 4, i32 4)
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167 // HOST-DAG: __hipRegisterManagedVar({{.*}}@_ZL2sx {{.*}}@_ZL2sx.managed {{.*}}@[[DEVNAMESX]]
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168 // HOST-NOT: __hipRegisterManagedVar({{.*}}@ex {{.*}}@ex.managed
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169 // HOST-DAG: declare void @__hipRegisterManagedVar(i8**, i8*, i8*, i8*, i64, i32)