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150
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1 //===- Relocations.cpp ----------------------------------------------------===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // This file contains platform-independent functions to process relocations.
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10 // I'll describe the overview of this file here.
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11 //
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12 // Simple relocations are easy to handle for the linker. For example,
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13 // for R_X86_64_PC64 relocs, the linker just has to fix up locations
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14 // with the relative offsets to the target symbols. It would just be
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15 // reading records from relocation sections and applying them to output.
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16 //
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17 // But not all relocations are that easy to handle. For example, for
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18 // R_386_GOTOFF relocs, the linker has to create new GOT entries for
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19 // symbols if they don't exist, and fix up locations with GOT entry
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20 // offsets from the beginning of GOT section. So there is more than
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21 // fixing addresses in relocation processing.
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22 //
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23 // ELF defines a large number of complex relocations.
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24 //
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25 // The functions in this file analyze relocations and do whatever needs
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26 // to be done. It includes, but not limited to, the following.
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27 //
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28 // - create GOT/PLT entries
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29 // - create new relocations in .dynsym to let the dynamic linker resolve
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30 // them at runtime (since ELF supports dynamic linking, not all
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31 // relocations can be resolved at link-time)
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32 // - create COPY relocs and reserve space in .bss
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33 // - replace expensive relocs (in terms of runtime cost) with cheap ones
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34 // - error out infeasible combinations such as PIC and non-relative relocs
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35 //
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36 // Note that the functions in this file don't actually apply relocations
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37 // because it doesn't know about the output file nor the output file buffer.
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38 // It instead stores Relocation objects to InputSection's Relocations
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39 // vector to let it apply later in InputSection::writeTo.
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40 //
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41 //===----------------------------------------------------------------------===//
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42
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43 #include "Relocations.h"
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44 #include "Config.h"
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236
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45 #include "InputFiles.h"
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150
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46 #include "LinkerScript.h"
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47 #include "OutputSections.h"
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48 #include "SymbolTable.h"
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49 #include "Symbols.h"
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50 #include "SyntheticSections.h"
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51 #include "Target.h"
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52 #include "Thunks.h"
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53 #include "lld/Common/ErrorHandler.h"
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54 #include "lld/Common/Memory.h"
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55 #include "llvm/ADT/SmallSet.h"
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56 #include "llvm/Demangle/Demangle.h"
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57 #include "llvm/Support/Endian.h"
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58 #include <algorithm>
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59
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60 using namespace llvm;
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61 using namespace llvm::ELF;
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62 using namespace llvm::object;
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63 using namespace llvm::support::endian;
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173
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64 using namespace lld;
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65 using namespace lld::elf;
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150
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66
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67 static Optional<std::string> getLinkerScriptLocation(const Symbol &sym) {
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236
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68 for (SectionCommand *cmd : script->sectionCommands)
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69 if (auto *assign = dyn_cast<SymbolAssignment>(cmd))
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70 if (assign->sym == &sym)
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71 return assign->location;
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150
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72 return None;
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73 }
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74
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75 static std::string getDefinedLocation(const Symbol &sym) {
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221
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76 const char msg[] = "\n>>> defined in ";
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150
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77 if (sym.file)
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221
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78 return msg + toString(sym.file);
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79 if (Optional<std::string> loc = getLinkerScriptLocation(sym))
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80 return msg + *loc;
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81 return "";
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150
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82 }
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83
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84 // Construct a message in the following format.
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85 //
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86 // >>> defined in /home/alice/src/foo.o
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87 // >>> referenced by bar.c:12 (/home/alice/src/bar.c:12)
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88 // >>> /home/alice/src/bar.o:(.text+0x1)
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89 static std::string getLocation(InputSectionBase &s, const Symbol &sym,
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90 uint64_t off) {
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91 std::string msg = getDefinedLocation(sym) + "\n>>> referenced by ";
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92 std::string src = s.getSrcMsg(sym, off);
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93 if (!src.empty())
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94 msg += src + "\n>>> ";
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95 return msg + s.getObjMsg(off);
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96 }
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97
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173
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98 void elf::reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v,
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99 int64_t min, uint64_t max) {
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150
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100 ErrorPlace errPlace = getErrorPlace(loc);
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101 std::string hint;
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236
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102 if (rel.sym && !rel.sym->isSection())
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103 hint = "; references " + lld::toString(*rel.sym);
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104 if (!errPlace.srcLoc.empty())
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105 hint += "\n>>> referenced by " + errPlace.srcLoc;
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106 if (rel.sym && !rel.sym->isSection())
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107 hint += getDefinedLocation(*rel.sym);
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150
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108
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109 if (errPlace.isec && errPlace.isec->name.startswith(".debug"))
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110 hint += "; consider recompiling with -fdebug-types-section to reduce size "
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111 "of debug sections";
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112
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113 errorOrWarn(errPlace.loc + "relocation " + lld::toString(rel.type) +
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114 " out of range: " + v.str() + " is not in [" + Twine(min).str() +
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115 ", " + Twine(max).str() + "]" + hint);
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116 }
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117
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221
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118 void elf::reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym,
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119 const Twine &msg) {
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120 ErrorPlace errPlace = getErrorPlace(loc);
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121 std::string hint;
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122 if (!sym.getName().empty())
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123 hint = "; references " + lld::toString(sym) + getDefinedLocation(sym);
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124 errorOrWarn(errPlace.loc + msg + " is out of range: " + Twine(v) +
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125 " is not in [" + Twine(llvm::minIntN(n)) + ", " +
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126 Twine(llvm::maxIntN(n)) + "]" + hint);
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127 }
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128
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236
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129 // Build a bitmask with one bit set for each 64 subset of RelExpr.
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130 static constexpr uint64_t buildMask() { return 0; }
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150
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131
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236
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132 template <typename... Tails>
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133 static constexpr uint64_t buildMask(int head, Tails... tails) {
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134 return (0 <= head && head < 64 ? uint64_t(1) << head : 0) |
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135 buildMask(tails...);
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150
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136 }
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137
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236
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138 // Return true if `Expr` is one of `Exprs`.
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139 // There are more than 64 but less than 128 RelExprs, so we divide the set of
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140 // exprs into [0, 64) and [64, 128) and represent each range as a constant
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141 // 64-bit mask. Then we decide which mask to test depending on the value of
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142 // expr and use a simple shift and bitwise-and to test for membership.
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143 template <RelExpr... Exprs> static bool oneof(RelExpr expr) {
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144 assert(0 <= expr && (int)expr < 128 &&
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145 "RelExpr is too large for 128-bit mask!");
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150
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146
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236
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147 if (expr >= 64)
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148 return (uint64_t(1) << (expr - 64)) & buildMask((Exprs - 64)...);
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149 return (uint64_t(1) << expr) & buildMask(Exprs...);
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150
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150 }
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151
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152 static RelType getMipsPairType(RelType type, bool isLocal) {
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153 switch (type) {
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154 case R_MIPS_HI16:
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155 return R_MIPS_LO16;
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156 case R_MIPS_GOT16:
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157 // In case of global symbol, the R_MIPS_GOT16 relocation does not
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158 // have a pair. Each global symbol has a unique entry in the GOT
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159 // and a corresponding instruction with help of the R_MIPS_GOT16
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160 // relocation loads an address of the symbol. In case of local
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161 // symbol, the R_MIPS_GOT16 relocation creates a GOT entry to hold
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162 // the high 16 bits of the symbol's value. A paired R_MIPS_LO16
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163 // relocations handle low 16 bits of the address. That allows
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164 // to allocate only one GOT entry for every 64 KBytes of local data.
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165 return isLocal ? R_MIPS_LO16 : R_MIPS_NONE;
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166 case R_MICROMIPS_GOT16:
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167 return isLocal ? R_MICROMIPS_LO16 : R_MIPS_NONE;
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168 case R_MIPS_PCHI16:
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169 return R_MIPS_PCLO16;
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170 case R_MICROMIPS_HI16:
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171 return R_MICROMIPS_LO16;
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172 default:
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173 return R_MIPS_NONE;
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174 }
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175 }
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176
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177 // True if non-preemptable symbol always has the same value regardless of where
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178 // the DSO is loaded.
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179 static bool isAbsolute(const Symbol &sym) {
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180 if (sym.isUndefWeak())
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181 return true;
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182 if (const auto *dr = dyn_cast<Defined>(&sym))
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183 return dr->section == nullptr; // Absolute symbol.
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184 return false;
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185 }
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186
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187 static bool isAbsoluteValue(const Symbol &sym) {
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188 return isAbsolute(sym) || sym.isTls();
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189 }
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190
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191 // Returns true if Expr refers a PLT entry.
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192 static bool needsPlt(RelExpr expr) {
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236
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193 return oneof<R_PLT, R_PLT_PC, R_PLT_GOTPLT, R_PPC32_PLTREL, R_PPC64_CALL_PLT>(
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194 expr);
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150
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195 }
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196
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197 // Returns true if Expr refers a GOT entry. Note that this function
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198 // returns false for TLS variables even though they need GOT, because
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199 // TLS variables uses GOT differently than the regular variables.
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200 static bool needsGot(RelExpr expr) {
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201 return oneof<R_GOT, R_GOT_OFF, R_MIPS_GOT_LOCAL_PAGE, R_MIPS_GOT_OFF,
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221
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202 R_MIPS_GOT_OFF32, R_AARCH64_GOT_PAGE_PC, R_GOT_PC, R_GOTPLT,
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203 R_AARCH64_GOT_PAGE>(expr);
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150
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204 }
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205
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206 // True if this expression is of the form Sym - X, where X is a position in the
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207 // file (PC, or GOT for example).
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208 static bool isRelExpr(RelExpr expr) {
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209 return oneof<R_PC, R_GOTREL, R_GOTPLTREL, R_MIPS_GOTREL, R_PPC64_CALL,
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210 R_PPC64_RELAX_TOC, R_AARCH64_PAGE_PC, R_RELAX_GOT_PC,
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221
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211 R_RISCV_PC_INDIRECT, R_PPC64_RELAX_GOT_PC>(expr);
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150
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212 }
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213
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214
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215 static RelExpr toPlt(RelExpr expr) {
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216 switch (expr) {
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217 case R_PPC64_CALL:
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218 return R_PPC64_CALL_PLT;
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219 case R_PC:
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220 return R_PLT_PC;
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221 case R_ABS:
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222 return R_PLT;
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223 default:
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224 return expr;
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225 }
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226 }
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227
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228 static RelExpr fromPlt(RelExpr expr) {
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229 // We decided not to use a plt. Optimize a reference to the plt to a
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230 // reference to the symbol itself.
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231 switch (expr) {
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232 case R_PLT_PC:
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233 case R_PPC32_PLTREL:
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234 return R_PC;
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235 case R_PPC64_CALL_PLT:
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236 return R_PPC64_CALL;
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237 case R_PLT:
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238 return R_ABS;
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236
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239 case R_PLT_GOTPLT:
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240 return R_GOTPLTREL;
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150
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241 default:
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242 return expr;
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243 }
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244 }
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245
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246 // Returns true if a given shared symbol is in a read-only segment in a DSO.
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247 template <class ELFT> static bool isReadOnly(SharedSymbol &ss) {
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248 using Elf_Phdr = typename ELFT::Phdr;
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249
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250 // Determine if the symbol is read-only by scanning the DSO's program headers.
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236
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251 const auto &file = cast<SharedFile>(*ss.file);
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150
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252 for (const Elf_Phdr &phdr :
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253 check(file.template getObj<ELFT>().program_headers()))
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254 if ((phdr.p_type == ELF::PT_LOAD || phdr.p_type == ELF::PT_GNU_RELRO) &&
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255 !(phdr.p_flags & ELF::PF_W) && ss.value >= phdr.p_vaddr &&
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256 ss.value < phdr.p_vaddr + phdr.p_memsz)
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257 return true;
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258 return false;
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259 }
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260
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261 // Returns symbols at the same offset as a given symbol, including SS itself.
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262 //
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263 // If two or more symbols are at the same offset, and at least one of
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264 // them are copied by a copy relocation, all of them need to be copied.
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265 // Otherwise, they would refer to different places at runtime.
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266 template <class ELFT>
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267 static SmallSet<SharedSymbol *, 4> getSymbolsAt(SharedSymbol &ss) {
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268 using Elf_Sym = typename ELFT::Sym;
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269
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236
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270 const auto &file = cast<SharedFile>(*ss.file);
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150
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271
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272 SmallSet<SharedSymbol *, 4> ret;
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273 for (const Elf_Sym &s : file.template getGlobalELFSyms<ELFT>()) {
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274 if (s.st_shndx == SHN_UNDEF || s.st_shndx == SHN_ABS ||
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275 s.getType() == STT_TLS || s.st_value != ss.value)
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276 continue;
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277 StringRef name = check(s.getName(file.getStringTable()));
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236
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278 Symbol *sym = symtab.find(name);
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150
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279 if (auto *alias = dyn_cast_or_null<SharedSymbol>(sym))
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280 ret.insert(alias);
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281 }
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236
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282
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283 // The loop does not check SHT_GNU_verneed, so ret does not contain
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284 // non-default version symbols. If ss has a non-default version, ret won't
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285 // contain ss. Just add ss unconditionally. If a non-default version alias is
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286 // separately copy relocated, it and ss will have different addresses.
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287 // Fortunately this case is impractical and fails with GNU ld as well.
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288 ret.insert(&ss);
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150
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289 return ret;
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290 }
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291
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292 // When a symbol is copy relocated or we create a canonical plt entry, it is
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293 // effectively a defined symbol. In the case of copy relocation the symbol is
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294 // in .bss and in the case of a canonical plt entry it is in .plt. This function
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295 // replaces the existing symbol with a Defined pointing to the appropriate
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296 // location.
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236
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297 static void replaceWithDefined(Symbol &sym, SectionBase &sec, uint64_t value,
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150
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298 uint64_t size) {
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299 Symbol old = sym;
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236
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300 Defined(sym.file, StringRef(), sym.binding, sym.stOther, sym.type, value,
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301 size, &sec)
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302 .overwrite(sym);
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150
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303
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304 sym.verdefIndex = old.verdefIndex;
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305 sym.exportDynamic = true;
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306 sym.isUsedInRegularObj = true;
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236
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307 // A copy relocated alias may need a GOT entry.
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308 sym.flags.store(old.flags.load(std::memory_order_relaxed) & NEEDS_GOT,
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309 std::memory_order_relaxed);
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150
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310 }
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311
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312 // Reserve space in .bss or .bss.rel.ro for copy relocation.
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313 //
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314 // The copy relocation is pretty much a hack. If you use a copy relocation
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315 // in your program, not only the symbol name but the symbol's size, RW/RO
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316 // bit and alignment become part of the ABI. In addition to that, if the
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317 // symbol has aliases, the aliases become part of the ABI. That's subtle,
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318 // but if you violate that implicit ABI, that can cause very counter-
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319 // intuitive consequences.
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320 //
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321 // So, what is the copy relocation? It's for linking non-position
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322 // independent code to DSOs. In an ideal world, all references to data
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323 // exported by DSOs should go indirectly through GOT. But if object files
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324 // are compiled as non-PIC, all data references are direct. There is no
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325 // way for the linker to transform the code to use GOT, as machine
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326 // instructions are already set in stone in object files. This is where
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327 // the copy relocation takes a role.
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328 //
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329 // A copy relocation instructs the dynamic linker to copy data from a DSO
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330 // to a specified address (which is usually in .bss) at load-time. If the
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331 // static linker (that's us) finds a direct data reference to a DSO
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332 // symbol, it creates a copy relocation, so that the symbol can be
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333 // resolved as if it were in .bss rather than in a DSO.
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334 //
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335 // As you can see in this function, we create a copy relocation for the
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336 // dynamic linker, and the relocation contains not only symbol name but
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337 // various other information about the symbol. So, such attributes become a
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338 // part of the ABI.
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339 //
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340 // Note for application developers: I can give you a piece of advice if
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341 // you are writing a shared library. You probably should export only
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342 // functions from your library. You shouldn't export variables.
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343 //
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344 // As an example what can happen when you export variables without knowing
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345 // the semantics of copy relocations, assume that you have an exported
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346 // variable of type T. It is an ABI-breaking change to add new members at
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347 // end of T even though doing that doesn't change the layout of the
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348 // existing members. That's because the space for the new members are not
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349 // reserved in .bss unless you recompile the main program. That means they
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350 // are likely to overlap with other data that happens to be laid out next
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351 // to the variable in .bss. This kind of issue is sometimes very hard to
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352 // debug. What's a solution? Instead of exporting a variable V from a DSO,
|
|
|
353 // define an accessor getV().
|
|
|
354 template <class ELFT> static void addCopyRelSymbol(SharedSymbol &ss) {
|
|
|
355 // Copy relocation against zero-sized symbol doesn't make sense.
|
|
|
356 uint64_t symSize = ss.getSize();
|
|
|
357 if (symSize == 0 || ss.alignment == 0)
|
|
|
358 fatal("cannot create a copy relocation for symbol " + toString(ss));
|
|
|
359
|
|
|
360 // See if this symbol is in a read-only segment. If so, preserve the symbol's
|
|
|
361 // memory protection by reserving space in the .bss.rel.ro section.
|
|
|
362 bool isRO = isReadOnly<ELFT>(ss);
|
|
|
363 BssSection *sec =
|
|
|
364 make<BssSection>(isRO ? ".bss.rel.ro" : ".bss", symSize, ss.alignment);
|
|
|
365 OutputSection *osec = (isRO ? in.bssRelRo : in.bss)->getParent();
|
|
|
366
|
|
|
367 // At this point, sectionBases has been migrated to sections. Append sec to
|
|
|
368 // sections.
|
|
236
|
369 if (osec->commands.empty() ||
|
|
|
370 !isa<InputSectionDescription>(osec->commands.back()))
|
|
|
371 osec->commands.push_back(make<InputSectionDescription>(""));
|
|
|
372 auto *isd = cast<InputSectionDescription>(osec->commands.back());
|
|
150
|
373 isd->sections.push_back(sec);
|
|
|
374 osec->commitSection(sec);
|
|
|
375
|
|
|
376 // Look through the DSO's dynamic symbol table for aliases and create a
|
|
|
377 // dynamic symbol for each one. This causes the copy relocation to correctly
|
|
|
378 // interpose any aliases.
|
|
|
379 for (SharedSymbol *sym : getSymbolsAt<ELFT>(ss))
|
|
236
|
380 replaceWithDefined(*sym, *sec, 0, sym->size);
|
|
|
381
|
|
|
382 mainPart->relaDyn->addSymbolReloc(target->copyRel, *sec, 0, ss);
|
|
|
383 }
|
|
|
384
|
|
|
385 // .eh_frame sections are mergeable input sections, so their input
|
|
|
386 // offsets are not linearly mapped to output section. For each input
|
|
|
387 // offset, we need to find a section piece containing the offset and
|
|
|
388 // add the piece's base address to the input offset to compute the
|
|
|
389 // output offset. That isn't cheap.
|
|
|
390 //
|
|
|
391 // This class is to speed up the offset computation. When we process
|
|
|
392 // relocations, we access offsets in the monotonically increasing
|
|
|
393 // order. So we can optimize for that access pattern.
|
|
|
394 //
|
|
|
395 // For sections other than .eh_frame, this class doesn't do anything.
|
|
|
396 namespace {
|
|
|
397 class OffsetGetter {
|
|
|
398 public:
|
|
|
399 OffsetGetter() = default;
|
|
|
400 explicit OffsetGetter(InputSectionBase &sec) {
|
|
|
401 if (auto *eh = dyn_cast<EhInputSection>(&sec)) {
|
|
|
402 cies = eh->cies;
|
|
|
403 fdes = eh->fdes;
|
|
|
404 i = cies.begin();
|
|
|
405 j = fdes.begin();
|
|
|
406 }
|
|
|
407 }
|
|
|
408
|
|
|
409 // Translates offsets in input sections to offsets in output sections.
|
|
|
410 // Given offset must increase monotonically. We assume that Piece is
|
|
|
411 // sorted by inputOff.
|
|
|
412 uint64_t get(uint64_t off) {
|
|
|
413 if (cies.empty())
|
|
|
414 return off;
|
|
150
|
415
|
|
236
|
416 while (j != fdes.end() && j->inputOff <= off)
|
|
|
417 ++j;
|
|
|
418 auto it = j;
|
|
|
419 if (j == fdes.begin() || j[-1].inputOff + j[-1].size <= off) {
|
|
|
420 while (i != cies.end() && i->inputOff <= off)
|
|
|
421 ++i;
|
|
|
422 if (i == cies.begin() || i[-1].inputOff + i[-1].size <= off)
|
|
|
423 fatal(".eh_frame: relocation is not in any piece");
|
|
|
424 it = i;
|
|
|
425 }
|
|
|
426
|
|
|
427 // Offset -1 means that the piece is dead (i.e. garbage collected).
|
|
|
428 if (it[-1].outputOff == -1)
|
|
|
429 return -1;
|
|
|
430 return it[-1].outputOff + (off - it[-1].inputOff);
|
|
|
431 }
|
|
|
432
|
|
|
433 private:
|
|
|
434 ArrayRef<EhSectionPiece> cies, fdes;
|
|
|
435 ArrayRef<EhSectionPiece>::iterator i, j;
|
|
|
436 };
|
|
|
437
|
|
|
438 // This class encapsulates states needed to scan relocations for one
|
|
|
439 // InputSectionBase.
|
|
|
440 class RelocationScanner {
|
|
|
441 public:
|
|
|
442 template <class ELFT> void scanSection(InputSectionBase &s);
|
|
|
443
|
|
|
444 private:
|
|
|
445 InputSectionBase *sec;
|
|
|
446 OffsetGetter getter;
|
|
|
447
|
|
|
448 // End of relocations, used by Mips/PPC64.
|
|
|
449 const void *end = nullptr;
|
|
|
450
|
|
|
451 template <class RelTy> RelType getMipsN32RelType(RelTy *&rel) const;
|
|
|
452 template <class ELFT, class RelTy>
|
|
|
453 int64_t computeMipsAddend(const RelTy &rel, RelExpr expr, bool isLocal) const;
|
|
|
454 bool isStaticLinkTimeConstant(RelExpr e, RelType type, const Symbol &sym,
|
|
|
455 uint64_t relOff) const;
|
|
|
456 void processAux(RelExpr expr, RelType type, uint64_t offset, Symbol &sym,
|
|
|
457 int64_t addend) const;
|
|
|
458 template <class ELFT, class RelTy> void scanOne(RelTy *&i);
|
|
|
459 template <class ELFT, class RelTy> void scan(ArrayRef<RelTy> rels);
|
|
|
460 };
|
|
|
461 } // namespace
|
|
150
|
462
|
|
|
463 // MIPS has an odd notion of "paired" relocations to calculate addends.
|
|
|
464 // For example, if a relocation is of R_MIPS_HI16, there must be a
|
|
|
465 // R_MIPS_LO16 relocation after that, and an addend is calculated using
|
|
|
466 // the two relocations.
|
|
|
467 template <class ELFT, class RelTy>
|
|
236
|
468 int64_t RelocationScanner::computeMipsAddend(const RelTy &rel, RelExpr expr,
|
|
|
469 bool isLocal) const {
|
|
150
|
470 if (expr == R_MIPS_GOTREL && isLocal)
|
|
236
|
471 return sec->getFile<ELFT>()->mipsGp0;
|
|
150
|
472
|
|
|
473 // The ABI says that the paired relocation is used only for REL.
|
|
|
474 // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
|
|
|
475 if (RelTy::IsRela)
|
|
|
476 return 0;
|
|
|
477
|
|
|
478 RelType type = rel.getType(config->isMips64EL);
|
|
|
479 uint32_t pairTy = getMipsPairType(type, isLocal);
|
|
|
480 if (pairTy == R_MIPS_NONE)
|
|
|
481 return 0;
|
|
|
482
|
|
236
|
483 const uint8_t *buf = sec->rawData.data();
|
|
150
|
484 uint32_t symIndex = rel.getSymbol(config->isMips64EL);
|
|
|
485
|
|
|
486 // To make things worse, paired relocations might not be contiguous in
|
|
|
487 // the relocation table, so we need to do linear search. *sigh*
|
|
236
|
488 for (const RelTy *ri = &rel; ri != static_cast<const RelTy *>(end); ++ri)
|
|
150
|
489 if (ri->getType(config->isMips64EL) == pairTy &&
|
|
|
490 ri->getSymbol(config->isMips64EL) == symIndex)
|
|
|
491 return target->getImplicitAddend(buf + ri->r_offset, pairTy);
|
|
|
492
|
|
|
493 warn("can't find matching " + toString(pairTy) + " relocation for " +
|
|
|
494 toString(type));
|
|
|
495 return 0;
|
|
|
496 }
|
|
|
497
|
|
|
498 // Custom error message if Sym is defined in a discarded section.
|
|
|
499 template <class ELFT>
|
|
|
500 static std::string maybeReportDiscarded(Undefined &sym) {
|
|
|
501 auto *file = dyn_cast_or_null<ObjFile<ELFT>>(sym.file);
|
|
|
502 if (!file || !sym.discardedSecIdx ||
|
|
|
503 file->getSections()[sym.discardedSecIdx] != &InputSection::discarded)
|
|
|
504 return "";
|
|
236
|
505 ArrayRef<typename ELFT::Shdr> objSections =
|
|
|
506 file->template getELFShdrs<ELFT>();
|
|
150
|
507
|
|
|
508 std::string msg;
|
|
|
509 if (sym.type == ELF::STT_SECTION) {
|
|
|
510 msg = "relocation refers to a discarded section: ";
|
|
|
511 msg += CHECK(
|
|
221
|
512 file->getObj().getSectionName(objSections[sym.discardedSecIdx]), file);
|
|
150
|
513 } else {
|
|
|
514 msg = "relocation refers to a symbol in a discarded section: " +
|
|
|
515 toString(sym);
|
|
|
516 }
|
|
|
517 msg += "\n>>> defined in " + toString(file);
|
|
|
518
|
|
|
519 Elf_Shdr_Impl<ELFT> elfSec = objSections[sym.discardedSecIdx - 1];
|
|
|
520 if (elfSec.sh_type != SHT_GROUP)
|
|
|
521 return msg;
|
|
|
522
|
|
|
523 // If the discarded section is a COMDAT.
|
|
|
524 StringRef signature = file->getShtGroupSignature(objSections, elfSec);
|
|
|
525 if (const InputFile *prevailing =
|
|
236
|
526 symtab.comdatGroups.lookup(CachedHashStringRef(signature))) {
|
|
150
|
527 msg += "\n>>> section group signature: " + signature.str() +
|
|
|
528 "\n>>> prevailing definition is in " + toString(prevailing);
|
|
236
|
529 if (sym.nonPrevailing) {
|
|
|
530 msg += "\n>>> or the symbol in the prevailing group had STB_WEAK "
|
|
|
531 "binding and the symbol in a non-prevailing group had STB_GLOBAL "
|
|
|
532 "binding. Mixing groups with STB_WEAK and STB_GLOBAL binding "
|
|
|
533 "signature is not supported";
|
|
|
534 }
|
|
|
535 }
|
|
150
|
536 return msg;
|
|
|
537 }
|
|
|
538
|
|
236
|
539 namespace {
|
|
150
|
540 // Undefined diagnostics are collected in a vector and emitted once all of
|
|
|
541 // them are known, so that some postprocessing on the list of undefined symbols
|
|
|
542 // can happen before lld emits diagnostics.
|
|
|
543 struct UndefinedDiag {
|
|
236
|
544 Undefined *sym;
|
|
150
|
545 struct Loc {
|
|
|
546 InputSectionBase *sec;
|
|
|
547 uint64_t offset;
|
|
|
548 };
|
|
|
549 std::vector<Loc> locs;
|
|
|
550 bool isWarning;
|
|
|
551 };
|
|
|
552
|
|
236
|
553 std::vector<UndefinedDiag> undefs;
|
|
|
554 std::mutex relocMutex;
|
|
|
555 }
|
|
150
|
556
|
|
|
557 // Check whether the definition name def is a mangled function name that matches
|
|
|
558 // the reference name ref.
|
|
|
559 static bool canSuggestExternCForCXX(StringRef ref, StringRef def) {
|
|
|
560 llvm::ItaniumPartialDemangler d;
|
|
|
561 std::string name = def.str();
|
|
|
562 if (d.partialDemangle(name.c_str()))
|
|
|
563 return false;
|
|
|
564 char *buf = d.getFunctionName(nullptr, nullptr);
|
|
|
565 if (!buf)
|
|
|
566 return false;
|
|
|
567 bool ret = ref == buf;
|
|
|
568 free(buf);
|
|
|
569 return ret;
|
|
|
570 }
|
|
|
571
|
|
|
572 // Suggest an alternative spelling of an "undefined symbol" diagnostic. Returns
|
|
|
573 // the suggested symbol, which is either in the symbol table, or in the same
|
|
|
574 // file of sym.
|
|
|
575 static const Symbol *getAlternativeSpelling(const Undefined &sym,
|
|
|
576 std::string &pre_hint,
|
|
|
577 std::string &post_hint) {
|
|
|
578 DenseMap<StringRef, const Symbol *> map;
|
|
236
|
579 if (sym.file && sym.file->kind() == InputFile::ObjKind) {
|
|
|
580 auto *file = cast<ELFFileBase>(sym.file);
|
|
150
|
581 // If sym is a symbol defined in a discarded section, maybeReportDiscarded()
|
|
|
582 // will give an error. Don't suggest an alternative spelling.
|
|
|
583 if (file && sym.discardedSecIdx != 0 &&
|
|
|
584 file->getSections()[sym.discardedSecIdx] == &InputSection::discarded)
|
|
|
585 return nullptr;
|
|
|
586
|
|
|
587 // Build a map of local defined symbols.
|
|
|
588 for (const Symbol *s : sym.file->getSymbols())
|
|
221
|
589 if (s->isLocal() && s->isDefined() && !s->getName().empty())
|
|
150
|
590 map.try_emplace(s->getName(), s);
|
|
|
591 }
|
|
|
592
|
|
|
593 auto suggest = [&](StringRef newName) -> const Symbol * {
|
|
|
594 // If defined locally.
|
|
|
595 if (const Symbol *s = map.lookup(newName))
|
|
|
596 return s;
|
|
|
597
|
|
|
598 // If in the symbol table and not undefined.
|
|
236
|
599 if (const Symbol *s = symtab.find(newName))
|
|
150
|
600 if (!s->isUndefined())
|
|
|
601 return s;
|
|
|
602
|
|
|
603 return nullptr;
|
|
|
604 };
|
|
|
605
|
|
|
606 // This loop enumerates all strings of Levenshtein distance 1 as typo
|
|
|
607 // correction candidates and suggests the one that exists as a non-undefined
|
|
|
608 // symbol.
|
|
|
609 StringRef name = sym.getName();
|
|
|
610 for (size_t i = 0, e = name.size(); i != e + 1; ++i) {
|
|
|
611 // Insert a character before name[i].
|
|
|
612 std::string newName = (name.substr(0, i) + "0" + name.substr(i)).str();
|
|
|
613 for (char c = '0'; c <= 'z'; ++c) {
|
|
|
614 newName[i] = c;
|
|
|
615 if (const Symbol *s = suggest(newName))
|
|
|
616 return s;
|
|
|
617 }
|
|
|
618 if (i == e)
|
|
|
619 break;
|
|
|
620
|
|
|
621 // Substitute name[i].
|
|
|
622 newName = std::string(name);
|
|
|
623 for (char c = '0'; c <= 'z'; ++c) {
|
|
|
624 newName[i] = c;
|
|
|
625 if (const Symbol *s = suggest(newName))
|
|
|
626 return s;
|
|
|
627 }
|
|
|
628
|
|
|
629 // Transpose name[i] and name[i+1]. This is of edit distance 2 but it is
|
|
|
630 // common.
|
|
|
631 if (i + 1 < e) {
|
|
|
632 newName[i] = name[i + 1];
|
|
|
633 newName[i + 1] = name[i];
|
|
|
634 if (const Symbol *s = suggest(newName))
|
|
|
635 return s;
|
|
|
636 }
|
|
|
637
|
|
|
638 // Delete name[i].
|
|
|
639 newName = (name.substr(0, i) + name.substr(i + 1)).str();
|
|
|
640 if (const Symbol *s = suggest(newName))
|
|
|
641 return s;
|
|
|
642 }
|
|
|
643
|
|
|
644 // Case mismatch, e.g. Foo vs FOO.
|
|
|
645 for (auto &it : map)
|
|
223
|
646 if (name.equals_insensitive(it.first))
|
|
150
|
647 return it.second;
|
|
236
|
648 for (Symbol *sym : symtab.getSymbols())
|
|
223
|
649 if (!sym->isUndefined() && name.equals_insensitive(sym->getName()))
|
|
150
|
650 return sym;
|
|
|
651
|
|
|
652 // The reference may be a mangled name while the definition is not. Suggest a
|
|
|
653 // missing extern "C".
|
|
|
654 if (name.startswith("_Z")) {
|
|
|
655 std::string buf = name.str();
|
|
|
656 llvm::ItaniumPartialDemangler d;
|
|
|
657 if (!d.partialDemangle(buf.c_str()))
|
|
|
658 if (char *buf = d.getFunctionName(nullptr, nullptr)) {
|
|
|
659 const Symbol *s = suggest(buf);
|
|
|
660 free(buf);
|
|
|
661 if (s) {
|
|
|
662 pre_hint = ": extern \"C\" ";
|
|
|
663 return s;
|
|
|
664 }
|
|
|
665 }
|
|
|
666 } else {
|
|
|
667 const Symbol *s = nullptr;
|
|
|
668 for (auto &it : map)
|
|
|
669 if (canSuggestExternCForCXX(name, it.first)) {
|
|
|
670 s = it.second;
|
|
|
671 break;
|
|
|
672 }
|
|
|
673 if (!s)
|
|
236
|
674 for (Symbol *sym : symtab.getSymbols())
|
|
150
|
675 if (canSuggestExternCForCXX(name, sym->getName())) {
|
|
|
676 s = sym;
|
|
|
677 break;
|
|
|
678 }
|
|
|
679 if (s) {
|
|
|
680 pre_hint = " to declare ";
|
|
|
681 post_hint = " as extern \"C\"?";
|
|
|
682 return s;
|
|
|
683 }
|
|
|
684 }
|
|
|
685
|
|
|
686 return nullptr;
|
|
|
687 }
|
|
|
688
|
|
|
689 static void reportUndefinedSymbol(const UndefinedDiag &undef,
|
|
|
690 bool correctSpelling) {
|
|
236
|
691 Undefined &sym = *undef.sym;
|
|
150
|
692
|
|
|
693 auto visibility = [&]() -> std::string {
|
|
236
|
694 switch (sym.visibility()) {
|
|
150
|
695 case STV_INTERNAL:
|
|
|
696 return "internal ";
|
|
|
697 case STV_HIDDEN:
|
|
|
698 return "hidden ";
|
|
|
699 case STV_PROTECTED:
|
|
|
700 return "protected ";
|
|
|
701 default:
|
|
|
702 return "";
|
|
|
703 }
|
|
|
704 };
|
|
|
705
|
|
236
|
706 std::string msg;
|
|
|
707 switch (config->ekind) {
|
|
|
708 case ELF32LEKind:
|
|
|
709 msg = maybeReportDiscarded<ELF32LE>(sym);
|
|
|
710 break;
|
|
|
711 case ELF32BEKind:
|
|
|
712 msg = maybeReportDiscarded<ELF32BE>(sym);
|
|
|
713 break;
|
|
|
714 case ELF64LEKind:
|
|
|
715 msg = maybeReportDiscarded<ELF64LE>(sym);
|
|
|
716 break;
|
|
|
717 case ELF64BEKind:
|
|
|
718 msg = maybeReportDiscarded<ELF64BE>(sym);
|
|
|
719 break;
|
|
|
720 default:
|
|
|
721 llvm_unreachable("");
|
|
|
722 }
|
|
150
|
723 if (msg.empty())
|
|
|
724 msg = "undefined " + visibility() + "symbol: " + toString(sym);
|
|
|
725
|
|
173
|
726 const size_t maxUndefReferences = 3;
|
|
150
|
727 size_t i = 0;
|
|
|
728 for (UndefinedDiag::Loc l : undef.locs) {
|
|
|
729 if (i >= maxUndefReferences)
|
|
|
730 break;
|
|
|
731 InputSectionBase &sec = *l.sec;
|
|
|
732 uint64_t offset = l.offset;
|
|
|
733
|
|
|
734 msg += "\n>>> referenced by ";
|
|
|
735 std::string src = sec.getSrcMsg(sym, offset);
|
|
|
736 if (!src.empty())
|
|
|
737 msg += src + "\n>>> ";
|
|
|
738 msg += sec.getObjMsg(offset);
|
|
|
739 i++;
|
|
|
740 }
|
|
|
741
|
|
|
742 if (i < undef.locs.size())
|
|
|
743 msg += ("\n>>> referenced " + Twine(undef.locs.size() - i) + " more times")
|
|
|
744 .str();
|
|
|
745
|
|
|
746 if (correctSpelling) {
|
|
|
747 std::string pre_hint = ": ", post_hint;
|
|
236
|
748 if (const Symbol *corrected =
|
|
|
749 getAlternativeSpelling(sym, pre_hint, post_hint)) {
|
|
150
|
750 msg += "\n>>> did you mean" + pre_hint + toString(*corrected) + post_hint;
|
|
|
751 if (corrected->file)
|
|
|
752 msg += "\n>>> defined in: " + toString(corrected->file);
|
|
|
753 }
|
|
|
754 }
|
|
|
755
|
|
|
756 if (sym.getName().startswith("_ZTV"))
|
|
173
|
757 msg +=
|
|
|
758 "\n>>> the vtable symbol may be undefined because the class is missing "
|
|
|
759 "its key function (see https://lld.llvm.org/missingkeyfunction)";
|
|
236
|
760 if (config->gcSections && config->zStartStopGC &&
|
|
|
761 sym.getName().startswith("__start_")) {
|
|
|
762 msg += "\n>>> the encapsulation symbol needs to be retained under "
|
|
|
763 "--gc-sections properly; consider -z nostart-stop-gc "
|
|
|
764 "(see https://lld.llvm.org/ELF/start-stop-gc)";
|
|
|
765 }
|
|
150
|
766
|
|
|
767 if (undef.isWarning)
|
|
|
768 warn(msg);
|
|
|
769 else
|
|
221
|
770 error(msg, ErrorTag::SymbolNotFound, {sym.getName()});
|
|
150
|
771 }
|
|
|
772
|
|
236
|
773 void elf::reportUndefinedSymbols() {
|
|
150
|
774 // Find the first "undefined symbol" diagnostic for each diagnostic, and
|
|
|
775 // collect all "referenced from" lines at the first diagnostic.
|
|
|
776 DenseMap<Symbol *, UndefinedDiag *> firstRef;
|
|
|
777 for (UndefinedDiag &undef : undefs) {
|
|
|
778 assert(undef.locs.size() == 1);
|
|
|
779 if (UndefinedDiag *canon = firstRef.lookup(undef.sym)) {
|
|
|
780 canon->locs.push_back(undef.locs[0]);
|
|
|
781 undef.locs.clear();
|
|
|
782 } else
|
|
|
783 firstRef[undef.sym] = &undef;
|
|
|
784 }
|
|
|
785
|
|
|
786 // Enable spell corrector for the first 2 diagnostics.
|
|
236
|
787 for (const auto &[i, undef] : llvm::enumerate(undefs))
|
|
|
788 if (!undef.locs.empty())
|
|
|
789 reportUndefinedSymbol(undef, i < 2);
|
|
150
|
790 undefs.clear();
|
|
|
791 }
|
|
|
792
|
|
|
793 // Report an undefined symbol if necessary.
|
|
|
794 // Returns true if the undefined symbol will produce an error message.
|
|
236
|
795 static bool maybeReportUndefined(Undefined &sym, InputSectionBase &sec,
|
|
150
|
796 uint64_t offset) {
|
|
236
|
797 std::lock_guard<std::mutex> lock(relocMutex);
|
|
221
|
798 // If versioned, issue an error (even if the symbol is weak) because we don't
|
|
|
799 // know the defining filename which is required to construct a Verneed entry.
|
|
236
|
800 if (sym.hasVersionSuffix) {
|
|
221
|
801 undefs.push_back({&sym, {{&sec, offset}}, false});
|
|
|
802 return true;
|
|
|
803 }
|
|
|
804 if (sym.isWeak())
|
|
150
|
805 return false;
|
|
|
806
|
|
236
|
807 bool canBeExternal = !sym.isLocal() && sym.visibility() == STV_DEFAULT;
|
|
150
|
808 if (config->unresolvedSymbols == UnresolvedPolicy::Ignore && canBeExternal)
|
|
|
809 return false;
|
|
|
810
|
|
|
811 // clang (as of 2019-06-12) / gcc (as of 8.2.1) PPC64 may emit a .rela.toc
|
|
|
812 // which references a switch table in a discarded .rodata/.text section. The
|
|
|
813 // .toc and the .rela.toc are incorrectly not placed in the comdat. The ELF
|
|
|
814 // spec says references from outside the group to a STB_LOCAL symbol are not
|
|
|
815 // allowed. Work around the bug.
|
|
173
|
816 //
|
|
|
817 // PPC32 .got2 is similar but cannot be fixed. Multiple .got2 is infeasible
|
|
|
818 // because .LC0-.LTOC is not representable if the two labels are in different
|
|
|
819 // .got2
|
|
236
|
820 if (sym.discardedSecIdx != 0 && (sec.name == ".got2" || sec.name == ".toc"))
|
|
150
|
821 return false;
|
|
|
822
|
|
|
823 bool isWarning =
|
|
|
824 (config->unresolvedSymbols == UnresolvedPolicy::Warn && canBeExternal) ||
|
|
|
825 config->noinhibitExec;
|
|
|
826 undefs.push_back({&sym, {{&sec, offset}}, isWarning});
|
|
|
827 return !isWarning;
|
|
|
828 }
|
|
|
829
|
|
|
830 // MIPS N32 ABI treats series of successive relocations with the same offset
|
|
|
831 // as a single relocation. The similar approach used by N64 ABI, but this ABI
|
|
|
832 // packs all relocations into the single relocation record. Here we emulate
|
|
|
833 // this for the N32 ABI. Iterate over relocation with the same offset and put
|
|
|
834 // theirs types into the single bit-set.
|
|
236
|
835 template <class RelTy>
|
|
|
836 RelType RelocationScanner::getMipsN32RelType(RelTy *&rel) const {
|
|
150
|
837 RelType type = 0;
|
|
|
838 uint64_t offset = rel->r_offset;
|
|
|
839
|
|
|
840 int n = 0;
|
|
236
|
841 while (rel != static_cast<const RelTy *>(end) && rel->r_offset == offset)
|
|
150
|
842 type |= (rel++)->getType(config->isMips64EL) << (8 * n++);
|
|
|
843 return type;
|
|
|
844 }
|
|
|
845
|
|
236
|
846 template <bool shard = false>
|
|
|
847 static void addRelativeReloc(InputSectionBase &isec, uint64_t offsetInSec,
|
|
223
|
848 Symbol &sym, int64_t addend, RelExpr expr,
|
|
150
|
849 RelType type) {
|
|
236
|
850 Partition &part = isec.getPartition();
|
|
150
|
851
|
|
|
852 // Add a relative relocation. If relrDyn section is enabled, and the
|
|
|
853 // relocation offset is guaranteed to be even, add the relocation to
|
|
|
854 // the relrDyn section, otherwise add it to the relaDyn section.
|
|
|
855 // relrDyn sections don't support odd offsets. Also, relrDyn sections
|
|
|
856 // don't store the addend values, so we must write it to the relocated
|
|
|
857 // address.
|
|
236
|
858 if (part.relrDyn && isec.alignment >= 2 && offsetInSec % 2 == 0) {
|
|
|
859 isec.relocations.push_back({expr, type, offsetInSec, addend, &sym});
|
|
|
860 if (shard)
|
|
|
861 part.relrDyn->relocsVec[parallel::getThreadIndex()].push_back(
|
|
|
862 {&isec, offsetInSec});
|
|
|
863 else
|
|
|
864 part.relrDyn->relocs.push_back({&isec, offsetInSec});
|
|
150
|
865 return;
|
|
|
866 }
|
|
236
|
867 part.relaDyn->addRelativeReloc<shard>(target->relativeRel, isec, offsetInSec,
|
|
|
868 sym, addend, type, expr);
|
|
150
|
869 }
|
|
|
870
|
|
|
871 template <class PltSection, class GotPltSection>
|
|
236
|
872 static void addPltEntry(PltSection &plt, GotPltSection &gotPlt,
|
|
|
873 RelocationBaseSection &rel, RelType type, Symbol &sym) {
|
|
|
874 plt.addEntry(sym);
|
|
|
875 gotPlt.addEntry(sym);
|
|
|
876 rel.addReloc({type, &gotPlt, sym.getGotPltOffset(),
|
|
|
877 sym.isPreemptible ? DynamicReloc::AgainstSymbol
|
|
|
878 : DynamicReloc::AddendOnlyWithTargetVA,
|
|
|
879 sym, 0, R_ABS});
|
|
150
|
880 }
|
|
|
881
|
|
|
882 static void addGotEntry(Symbol &sym) {
|
|
|
883 in.got->addEntry(sym);
|
|
|
884 uint64_t off = sym.getGotOffset();
|
|
|
885
|
|
236
|
886 // If preemptible, emit a GLOB_DAT relocation.
|
|
|
887 if (sym.isPreemptible) {
|
|
|
888 mainPart->relaDyn->addReloc({target->gotRel, in.got.get(), off,
|
|
|
889 DynamicReloc::AgainstSymbol, sym, 0, R_ABS});
|
|
150
|
890 return;
|
|
|
891 }
|
|
|
892
|
|
236
|
893 // Otherwise, the value is either a link-time constant or the load base
|
|
|
894 // plus a constant.
|
|
|
895 if (!config->isPic || isAbsolute(sym))
|
|
|
896 in.got->relocations.push_back({R_ABS, target->symbolicRel, off, 0, &sym});
|
|
|
897 else
|
|
|
898 addRelativeReloc(*in.got, off, sym, 0, R_ABS, target->symbolicRel);
|
|
|
899 }
|
|
|
900
|
|
|
901 static void addTpOffsetGotEntry(Symbol &sym) {
|
|
|
902 in.got->addEntry(sym);
|
|
|
903 uint64_t off = sym.getGotOffset();
|
|
|
904 if (!sym.isPreemptible && !config->isPic) {
|
|
|
905 in.got->relocations.push_back({R_TPREL, target->symbolicRel, off, 0, &sym});
|
|
150
|
906 return;
|
|
|
907 }
|
|
223
|
908 mainPart->relaDyn->addAddendOnlyRelocIfNonPreemptible(
|
|
236
|
909 target->tlsGotRel, *in.got, off, sym, target->symbolicRel);
|
|
150
|
910 }
|
|
|
911
|
|
|
912 // Return true if we can define a symbol in the executable that
|
|
|
913 // contains the value/function of a symbol defined in a shared
|
|
|
914 // library.
|
|
|
915 static bool canDefineSymbolInExecutable(Symbol &sym) {
|
|
|
916 // If the symbol has default visibility the symbol defined in the
|
|
|
917 // executable will preempt it.
|
|
|
918 // Note that we want the visibility of the shared symbol itself, not
|
|
236
|
919 // the visibility of the symbol in the output file we are producing.
|
|
|
920 if (!sym.dsoProtected)
|
|
150
|
921 return true;
|
|
|
922
|
|
|
923 // If we are allowed to break address equality of functions, defining
|
|
|
924 // a plt entry will allow the program to call the function in the
|
|
|
925 // .so, but the .so and the executable will no agree on the address
|
|
|
926 // of the function. Similar logic for objects.
|
|
|
927 return ((sym.isFunc() && config->ignoreFunctionAddressEquality) ||
|
|
|
928 (sym.isObject() && config->ignoreDataAddressEquality));
|
|
|
929 }
|
|
|
930
|
|
236
|
931 // Returns true if a given relocation can be computed at link-time.
|
|
|
932 // This only handles relocation types expected in processAux.
|
|
|
933 //
|
|
|
934 // For instance, we know the offset from a relocation to its target at
|
|
|
935 // link-time if the relocation is PC-relative and refers a
|
|
|
936 // non-interposable function in the same executable. This function
|
|
|
937 // will return true for such relocation.
|
|
|
938 //
|
|
|
939 // If this function returns false, that means we need to emit a
|
|
|
940 // dynamic relocation so that the relocation will be fixed at load-time.
|
|
|
941 bool RelocationScanner::isStaticLinkTimeConstant(RelExpr e, RelType type,
|
|
|
942 const Symbol &sym,
|
|
|
943 uint64_t relOff) const {
|
|
|
944 // These expressions always compute a constant
|
|
|
945 if (oneof<R_GOTPLT, R_GOT_OFF, R_RELAX_HINT, R_MIPS_GOT_LOCAL_PAGE,
|
|
|
946 R_MIPS_GOTREL, R_MIPS_GOT_OFF, R_MIPS_GOT_OFF32, R_MIPS_GOT_GP_PC,
|
|
|
947 R_AARCH64_GOT_PAGE_PC, R_GOT_PC, R_GOTONLY_PC, R_GOTPLTONLY_PC,
|
|
|
948 R_PLT_PC, R_PLT_GOTPLT, R_PPC32_PLTREL, R_PPC64_CALL_PLT,
|
|
|
949 R_PPC64_RELAX_TOC, R_RISCV_ADD, R_AARCH64_GOT_PAGE>(e))
|
|
|
950 return true;
|
|
|
951
|
|
|
952 // These never do, except if the entire file is position dependent or if
|
|
|
953 // only the low bits are used.
|
|
|
954 if (e == R_GOT || e == R_PLT)
|
|
|
955 return target->usesOnlyLowPageBits(type) || !config->isPic;
|
|
|
956
|
|
|
957 if (sym.isPreemptible)
|
|
|
958 return false;
|
|
|
959 if (!config->isPic)
|
|
|
960 return true;
|
|
|
961
|
|
|
962 // The size of a non preemptible symbol is a constant.
|
|
|
963 if (e == R_SIZE)
|
|
|
964 return true;
|
|
|
965
|
|
|
966 // For the target and the relocation, we want to know if they are
|
|
|
967 // absolute or relative.
|
|
|
968 bool absVal = isAbsoluteValue(sym);
|
|
|
969 bool relE = isRelExpr(e);
|
|
|
970 if (absVal && !relE)
|
|
|
971 return true;
|
|
|
972 if (!absVal && relE)
|
|
|
973 return true;
|
|
|
974 if (!absVal && !relE)
|
|
|
975 return target->usesOnlyLowPageBits(type);
|
|
|
976
|
|
|
977 assert(absVal && relE);
|
|
|
978
|
|
|
979 // Allow R_PLT_PC (optimized to R_PC here) to a hidden undefined weak symbol
|
|
|
980 // in PIC mode. This is a little strange, but it allows us to link function
|
|
|
981 // calls to such symbols (e.g. glibc/stdlib/exit.c:__run_exit_handlers).
|
|
|
982 // Normally such a call will be guarded with a comparison, which will load a
|
|
|
983 // zero from the GOT.
|
|
|
984 if (sym.isUndefWeak())
|
|
|
985 return true;
|
|
|
986
|
|
|
987 // We set the final symbols values for linker script defined symbols later.
|
|
|
988 // They always can be computed as a link time constant.
|
|
|
989 if (sym.scriptDefined)
|
|
|
990 return true;
|
|
|
991
|
|
|
992 error("relocation " + toString(type) + " cannot refer to absolute symbol: " +
|
|
|
993 toString(sym) + getLocation(*sec, sym, relOff));
|
|
|
994 return true;
|
|
|
995 }
|
|
|
996
|
|
150
|
997 // The reason we have to do this early scan is as follows
|
|
|
998 // * To mmap the output file, we need to know the size
|
|
|
999 // * For that, we need to know how many dynamic relocs we will have.
|
|
|
1000 // It might be possible to avoid this by outputting the file with write:
|
|
|
1001 // * Write the allocated output sections, computing addresses.
|
|
|
1002 // * Apply relocations, recording which ones require a dynamic reloc.
|
|
|
1003 // * Write the dynamic relocations.
|
|
|
1004 // * Write the rest of the file.
|
|
|
1005 // This would have some drawbacks. For example, we would only know if .rela.dyn
|
|
|
1006 // is needed after applying relocations. If it is, it will go after rw and rx
|
|
|
1007 // sections. Given that it is ro, we will need an extra PT_LOAD. This
|
|
|
1008 // complicates things for the dynamic linker and means we would have to reserve
|
|
|
1009 // space for the extra PT_LOAD even if we end up not using it.
|
|
236
|
1010 void RelocationScanner::processAux(RelExpr expr, RelType type, uint64_t offset,
|
|
|
1011 Symbol &sym, int64_t addend) const {
|
|
|
1012 // If non-ifunc non-preemptible, change PLT to direct call and optimize GOT
|
|
|
1013 // indirection.
|
|
|
1014 const bool isIfunc = sym.isGnuIFunc();
|
|
|
1015 if (!sym.isPreemptible && (!isIfunc || config->zIfuncNoplt)) {
|
|
|
1016 if (expr != R_GOT_PC) {
|
|
|
1017 // The 0x8000 bit of r_addend of R_PPC_PLTREL24 is used to choose call
|
|
|
1018 // stub type. It should be ignored if optimized to R_PC.
|
|
|
1019 if (config->emachine == EM_PPC && expr == R_PPC32_PLTREL)
|
|
|
1020 addend &= ~0x8000;
|
|
|
1021 // R_HEX_GD_PLT_B22_PCREL (call a@GDPLT) is transformed into
|
|
|
1022 // call __tls_get_addr even if the symbol is non-preemptible.
|
|
|
1023 if (!(config->emachine == EM_HEXAGON &&
|
|
|
1024 (type == R_HEX_GD_PLT_B22_PCREL ||
|
|
|
1025 type == R_HEX_GD_PLT_B22_PCREL_X ||
|
|
|
1026 type == R_HEX_GD_PLT_B32_PCREL_X)))
|
|
|
1027 expr = fromPlt(expr);
|
|
|
1028 } else if (!isAbsoluteValue(sym)) {
|
|
|
1029 expr =
|
|
|
1030 target->adjustGotPcExpr(type, addend, sec->rawData.data() + offset);
|
|
|
1031 }
|
|
|
1032 }
|
|
|
1033
|
|
|
1034 // We were asked not to generate PLT entries for ifuncs. Instead, pass the
|
|
|
1035 // direct relocation on through.
|
|
|
1036 if (LLVM_UNLIKELY(isIfunc) && config->zIfuncNoplt) {
|
|
|
1037 std::lock_guard<std::mutex> lock(relocMutex);
|
|
|
1038 sym.exportDynamic = true;
|
|
|
1039 mainPart->relaDyn->addSymbolReloc(type, *sec, offset, sym, addend, type);
|
|
|
1040 return;
|
|
|
1041 }
|
|
|
1042
|
|
|
1043 if (needsGot(expr)) {
|
|
|
1044 if (config->emachine == EM_MIPS) {
|
|
|
1045 // MIPS ABI has special rules to process GOT entries and doesn't
|
|
|
1046 // require relocation entries for them. A special case is TLS
|
|
|
1047 // relocations. In that case dynamic loader applies dynamic
|
|
|
1048 // relocations to initialize TLS GOT entries.
|
|
|
1049 // See "Global Offset Table" in Chapter 5 in the following document
|
|
|
1050 // for detailed description:
|
|
|
1051 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
|
|
|
1052 in.mipsGot->addEntry(*sec->file, sym, addend, expr);
|
|
|
1053 } else {
|
|
|
1054 sym.setFlags(NEEDS_GOT);
|
|
|
1055 }
|
|
|
1056 } else if (needsPlt(expr)) {
|
|
|
1057 sym.setFlags(NEEDS_PLT);
|
|
|
1058 } else if (LLVM_UNLIKELY(isIfunc)) {
|
|
|
1059 sym.setFlags(HAS_DIRECT_RELOC);
|
|
|
1060 }
|
|
|
1061
|
|
150
|
1062 // If the relocation is known to be a link-time constant, we know no dynamic
|
|
|
1063 // relocation will be created, pass the control to relocateAlloc() or
|
|
|
1064 // relocateNonAlloc() to resolve it.
|
|
|
1065 //
|
|
223
|
1066 // The behavior of an undefined weak reference is implementation defined. For
|
|
|
1067 // non-link-time constants, we resolve relocations statically (let
|
|
|
1068 // relocate{,Non}Alloc() resolve them) for -no-pie and try producing dynamic
|
|
|
1069 // relocations for -pie and -shared.
|
|
|
1070 //
|
|
|
1071 // The general expectation of -no-pie static linking is that there is no
|
|
|
1072 // dynamic relocation (except IRELATIVE). Emitting dynamic relocations for
|
|
|
1073 // -shared matches the spirit of its -z undefs default. -pie has freedom on
|
|
|
1074 // choices, and we choose dynamic relocations to be consistent with the
|
|
|
1075 // handling of GOT-generating relocations.
|
|
236
|
1076 if (isStaticLinkTimeConstant(expr, type, sym, offset) ||
|
|
223
|
1077 (!config->isPic && sym.isUndefWeak())) {
|
|
236
|
1078 sec->relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1079 return;
|
|
150
|
1080 }
|
|
|
1081
|
|
236
|
1082 bool canWrite = (sec->flags & SHF_WRITE) || !config->zText;
|
|
150
|
1083 if (canWrite) {
|
|
|
1084 RelType rel = target->getDynRel(type);
|
|
|
1085 if (expr == R_GOT || (rel == target->symbolicRel && !sym.isPreemptible)) {
|
|
236
|
1086 addRelativeReloc<true>(*sec, offset, sym, addend, expr, type);
|
|
150
|
1087 return;
|
|
|
1088 } else if (rel != 0) {
|
|
|
1089 if (config->emachine == EM_MIPS && rel == target->symbolicRel)
|
|
|
1090 rel = target->relativeRel;
|
|
236
|
1091 std::lock_guard<std::mutex> lock(relocMutex);
|
|
|
1092 sec->getPartition().relaDyn->addSymbolReloc(rel, *sec, offset, sym,
|
|
|
1093 addend, type);
|
|
150
|
1094
|
|
|
1095 // MIPS ABI turns using of GOT and dynamic relocations inside out.
|
|
|
1096 // While regular ABI uses dynamic relocations to fill up GOT entries
|
|
|
1097 // MIPS ABI requires dynamic linker to fills up GOT entries using
|
|
|
1098 // specially sorted dynamic symbol table. This affects even dynamic
|
|
|
1099 // relocations against symbols which do not require GOT entries
|
|
|
1100 // creation explicitly, i.e. do not have any GOT-relocations. So if
|
|
|
1101 // a preemptible symbol has a dynamic relocation we anyway have
|
|
|
1102 // to create a GOT entry for it.
|
|
|
1103 // If a non-preemptible symbol has a dynamic relocation against it,
|
|
|
1104 // dynamic linker takes it st_value, adds offset and writes down
|
|
|
1105 // result of the dynamic relocation. In case of preemptible symbol
|
|
|
1106 // dynamic linker performs symbol resolution, writes the symbol value
|
|
|
1107 // to the GOT entry and reads the GOT entry when it needs to perform
|
|
|
1108 // a dynamic relocation.
|
|
|
1109 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf p.4-19
|
|
|
1110 if (config->emachine == EM_MIPS)
|
|
236
|
1111 in.mipsGot->addEntry(*sec->file, sym, addend, expr);
|
|
150
|
1112 return;
|
|
|
1113 }
|
|
|
1114 }
|
|
|
1115
|
|
|
1116 // When producing an executable, we can perform copy relocations (for
|
|
|
1117 // STT_OBJECT) and canonical PLT (for STT_FUNC).
|
|
|
1118 if (!config->shared) {
|
|
|
1119 if (!canDefineSymbolInExecutable(sym)) {
|
|
|
1120 errorOrWarn("cannot preempt symbol: " + toString(sym) +
|
|
236
|
1121 getLocation(*sec, sym, offset));
|
|
150
|
1122 return;
|
|
|
1123 }
|
|
|
1124
|
|
|
1125 if (sym.isObject()) {
|
|
|
1126 // Produce a copy relocation.
|
|
|
1127 if (auto *ss = dyn_cast<SharedSymbol>(&sym)) {
|
|
|
1128 if (!config->zCopyreloc)
|
|
|
1129 error("unresolvable relocation " + toString(type) +
|
|
|
1130 " against symbol '" + toString(*ss) +
|
|
|
1131 "'; recompile with -fPIC or remove '-z nocopyreloc'" +
|
|
236
|
1132 getLocation(*sec, sym, offset));
|
|
|
1133 sym.setFlags(NEEDS_COPY);
|
|
150
|
1134 }
|
|
236
|
1135 sec->relocations.push_back({expr, type, offset, addend, &sym});
|
|
150
|
1136 return;
|
|
|
1137 }
|
|
|
1138
|
|
|
1139 // This handles a non PIC program call to function in a shared library. In
|
|
|
1140 // an ideal world, we could just report an error saying the relocation can
|
|
|
1141 // overflow at runtime. In the real world with glibc, crt1.o has a
|
|
|
1142 // R_X86_64_PC32 pointing to libc.so.
|
|
|
1143 //
|
|
|
1144 // The general idea on how to handle such cases is to create a PLT entry and
|
|
|
1145 // use that as the function value.
|
|
|
1146 //
|
|
|
1147 // For the static linking part, we just return a plt expr and everything
|
|
|
1148 // else will use the PLT entry as the address.
|
|
|
1149 //
|
|
|
1150 // The remaining problem is making sure pointer equality still works. We
|
|
|
1151 // need the help of the dynamic linker for that. We let it know that we have
|
|
|
1152 // a direct reference to a so symbol by creating an undefined symbol with a
|
|
|
1153 // non zero st_value. Seeing that, the dynamic linker resolves the symbol to
|
|
|
1154 // the value of the symbol we created. This is true even for got entries, so
|
|
|
1155 // pointer equality is maintained. To avoid an infinite loop, the only entry
|
|
|
1156 // that points to the real function is a dedicated got entry used by the
|
|
|
1157 // plt. That is identified by special relocation types (R_X86_64_JUMP_SLOT,
|
|
|
1158 // R_386_JMP_SLOT, etc).
|
|
|
1159
|
|
|
1160 // For position independent executable on i386, the plt entry requires ebx
|
|
|
1161 // to be set. This causes two problems:
|
|
|
1162 // * If some code has a direct reference to a function, it was probably
|
|
|
1163 // compiled without -fPIE/-fPIC and doesn't maintain ebx.
|
|
|
1164 // * If a library definition gets preempted to the executable, it will have
|
|
|
1165 // the wrong ebx value.
|
|
|
1166 if (sym.isFunc()) {
|
|
|
1167 if (config->pie && config->emachine == EM_386)
|
|
|
1168 errorOrWarn("symbol '" + toString(sym) +
|
|
|
1169 "' cannot be preempted; recompile with -fPIE" +
|
|
236
|
1170 getLocation(*sec, sym, offset));
|
|
|
1171 sym.setFlags(NEEDS_COPY | NEEDS_PLT);
|
|
|
1172 sec->relocations.push_back({expr, type, offset, addend, &sym});
|
|
150
|
1173 return;
|
|
|
1174 }
|
|
|
1175 }
|
|
|
1176
|
|
236
|
1177 errorOrWarn("relocation " + toString(type) + " cannot be used against " +
|
|
|
1178 (sym.getName().empty() ? "local symbol"
|
|
|
1179 : "symbol '" + toString(sym) + "'") +
|
|
|
1180 "; recompile with -fPIC" + getLocation(*sec, sym, offset));
|
|
|
1181 }
|
|
|
1182
|
|
|
1183 // This function is similar to the `handleTlsRelocation`. MIPS does not
|
|
|
1184 // support any relaxations for TLS relocations so by factoring out MIPS
|
|
|
1185 // handling in to the separate function we can simplify the code and do not
|
|
|
1186 // pollute other `handleTlsRelocation` by MIPS `ifs` statements.
|
|
|
1187 // Mips has a custom MipsGotSection that handles the writing of GOT entries
|
|
|
1188 // without dynamic relocations.
|
|
|
1189 static unsigned handleMipsTlsRelocation(RelType type, Symbol &sym,
|
|
|
1190 InputSectionBase &c, uint64_t offset,
|
|
|
1191 int64_t addend, RelExpr expr) {
|
|
|
1192 if (expr == R_MIPS_TLSLD) {
|
|
|
1193 in.mipsGot->addTlsIndex(*c.file);
|
|
|
1194 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1195 return 1;
|
|
|
1196 }
|
|
|
1197 if (expr == R_MIPS_TLSGD) {
|
|
|
1198 in.mipsGot->addDynTlsEntry(*c.file, sym);
|
|
|
1199 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1200 return 1;
|
|
|
1201 }
|
|
|
1202 return 0;
|
|
|
1203 }
|
|
|
1204
|
|
|
1205 // Notes about General Dynamic and Local Dynamic TLS models below. They may
|
|
|
1206 // require the generation of a pair of GOT entries that have associated dynamic
|
|
|
1207 // relocations. The pair of GOT entries created are of the form GOT[e0] Module
|
|
|
1208 // Index (Used to find pointer to TLS block at run-time) GOT[e1] Offset of
|
|
|
1209 // symbol in TLS block.
|
|
|
1210 //
|
|
|
1211 // Returns the number of relocations processed.
|
|
|
1212 static unsigned handleTlsRelocation(RelType type, Symbol &sym,
|
|
|
1213 InputSectionBase &c, uint64_t offset,
|
|
|
1214 int64_t addend, RelExpr expr) {
|
|
|
1215 if (expr == R_TPREL || expr == R_TPREL_NEG) {
|
|
|
1216 if (config->shared) {
|
|
|
1217 errorOrWarn("relocation " + toString(type) + " against " + toString(sym) +
|
|
|
1218 " cannot be used with -shared" + getLocation(c, sym, offset));
|
|
|
1219 return 1;
|
|
|
1220 }
|
|
|
1221 return 0;
|
|
|
1222 }
|
|
|
1223
|
|
|
1224 if (config->emachine == EM_MIPS)
|
|
|
1225 return handleMipsTlsRelocation(type, sym, c, offset, addend, expr);
|
|
|
1226
|
|
|
1227 if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC,
|
|
|
1228 R_TLSDESC_GOTPLT>(expr) &&
|
|
|
1229 config->shared) {
|
|
|
1230 if (expr != R_TLSDESC_CALL) {
|
|
|
1231 sym.setFlags(NEEDS_TLSDESC);
|
|
|
1232 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1233 }
|
|
|
1234 return 1;
|
|
150
|
1235 }
|
|
|
1236
|
|
236
|
1237 // ARM, Hexagon and RISC-V do not support GD/LD to IE/LE relaxation. For
|
|
|
1238 // PPC64, if the file has missing R_PPC64_TLSGD/R_PPC64_TLSLD, disable
|
|
|
1239 // relaxation as well.
|
|
|
1240 bool toExecRelax = !config->shared && config->emachine != EM_ARM &&
|
|
|
1241 config->emachine != EM_HEXAGON &&
|
|
|
1242 config->emachine != EM_RISCV &&
|
|
|
1243 !c.file->ppc64DisableTLSRelax;
|
|
|
1244
|
|
|
1245 // If we are producing an executable and the symbol is non-preemptable, it
|
|
|
1246 // must be defined and the code sequence can be relaxed to use Local-Exec.
|
|
|
1247 //
|
|
|
1248 // ARM and RISC-V do not support any relaxations for TLS relocations, however,
|
|
|
1249 // we can omit the DTPMOD dynamic relocations and resolve them at link time
|
|
|
1250 // because them are always 1. This may be necessary for static linking as
|
|
|
1251 // DTPMOD may not be expected at load time.
|
|
|
1252 bool isLocalInExecutable = !sym.isPreemptible && !config->shared;
|
|
|
1253
|
|
|
1254 // Local Dynamic is for access to module local TLS variables, while still
|
|
|
1255 // being suitable for being dynamically loaded via dlopen. GOT[e0] is the
|
|
|
1256 // module index, with a special value of 0 for the current module. GOT[e1] is
|
|
|
1257 // unused. There only needs to be one module index entry.
|
|
|
1258 if (oneof<R_TLSLD_GOT, R_TLSLD_GOTPLT, R_TLSLD_PC, R_TLSLD_HINT>(
|
|
|
1259 expr)) {
|
|
|
1260 // Local-Dynamic relocs can be relaxed to Local-Exec.
|
|
|
1261 if (toExecRelax) {
|
|
|
1262 c.relocations.push_back(
|
|
|
1263 {target->adjustTlsExpr(type, R_RELAX_TLS_LD_TO_LE), type, offset,
|
|
|
1264 addend, &sym});
|
|
|
1265 return target->getTlsGdRelaxSkip(type);
|
|
|
1266 }
|
|
|
1267 if (expr == R_TLSLD_HINT)
|
|
|
1268 return 1;
|
|
|
1269 ctx.needsTlsLd.store(true, std::memory_order_relaxed);
|
|
|
1270 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1271 return 1;
|
|
|
1272 }
|
|
|
1273
|
|
|
1274 // Local-Dynamic relocs can be relaxed to Local-Exec.
|
|
|
1275 if (expr == R_DTPREL) {
|
|
|
1276 if (toExecRelax)
|
|
|
1277 expr = target->adjustTlsExpr(type, R_RELAX_TLS_LD_TO_LE);
|
|
|
1278 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1279 return 1;
|
|
|
1280 }
|
|
|
1281
|
|
|
1282 // Local-Dynamic sequence where offset of tls variable relative to dynamic
|
|
|
1283 // thread pointer is stored in the got. This cannot be relaxed to Local-Exec.
|
|
|
1284 if (expr == R_TLSLD_GOT_OFF) {
|
|
|
1285 sym.setFlags(NEEDS_GOT_DTPREL);
|
|
|
1286 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1287 return 1;
|
|
|
1288 }
|
|
|
1289
|
|
|
1290 if (oneof<R_AARCH64_TLSDESC_PAGE, R_TLSDESC, R_TLSDESC_CALL, R_TLSDESC_PC,
|
|
|
1291 R_TLSDESC_GOTPLT, R_TLSGD_GOT, R_TLSGD_GOTPLT, R_TLSGD_PC>(expr)) {
|
|
|
1292 if (!toExecRelax) {
|
|
|
1293 sym.setFlags(NEEDS_TLSGD);
|
|
|
1294 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1295 return 1;
|
|
|
1296 }
|
|
|
1297
|
|
|
1298 // Global-Dynamic relocs can be relaxed to Initial-Exec or Local-Exec
|
|
|
1299 // depending on the symbol being locally defined or not.
|
|
|
1300 if (sym.isPreemptible) {
|
|
|
1301 sym.setFlags(NEEDS_TLSGD_TO_IE);
|
|
|
1302 c.relocations.push_back(
|
|
|
1303 {target->adjustTlsExpr(type, R_RELAX_TLS_GD_TO_IE), type, offset,
|
|
|
1304 addend, &sym});
|
|
|
1305 } else {
|
|
|
1306 c.relocations.push_back(
|
|
|
1307 {target->adjustTlsExpr(type, R_RELAX_TLS_GD_TO_LE), type, offset,
|
|
|
1308 addend, &sym});
|
|
|
1309 }
|
|
|
1310 return target->getTlsGdRelaxSkip(type);
|
|
|
1311 }
|
|
|
1312
|
|
|
1313 if (oneof<R_GOT, R_GOTPLT, R_GOT_PC, R_AARCH64_GOT_PAGE_PC, R_GOT_OFF,
|
|
|
1314 R_TLSIE_HINT>(expr)) {
|
|
|
1315 ctx.hasTlsIe.store(true, std::memory_order_relaxed);
|
|
|
1316 // Initial-Exec relocs can be relaxed to Local-Exec if the symbol is locally
|
|
|
1317 // defined.
|
|
|
1318 if (toExecRelax && isLocalInExecutable) {
|
|
|
1319 c.relocations.push_back(
|
|
|
1320 {R_RELAX_TLS_IE_TO_LE, type, offset, addend, &sym});
|
|
|
1321 } else if (expr != R_TLSIE_HINT) {
|
|
|
1322 sym.setFlags(NEEDS_TLSIE);
|
|
|
1323 // R_GOT needs a relative relocation for PIC on i386 and Hexagon.
|
|
|
1324 if (expr == R_GOT && config->isPic && !target->usesOnlyLowPageBits(type))
|
|
|
1325 addRelativeReloc<true>(c, offset, sym, addend, expr, type);
|
|
|
1326 else
|
|
|
1327 c.relocations.push_back({expr, type, offset, addend, &sym});
|
|
|
1328 }
|
|
|
1329 return 1;
|
|
|
1330 }
|
|
|
1331
|
|
|
1332 return 0;
|
|
150
|
1333 }
|
|
|
1334
|
|
236
|
1335 template <class ELFT, class RelTy> void RelocationScanner::scanOne(RelTy *&i) {
|
|
150
|
1336 const RelTy &rel = *i;
|
|
|
1337 uint32_t symIndex = rel.getSymbol(config->isMips64EL);
|
|
236
|
1338 Symbol &sym = sec->getFile<ELFT>()->getSymbol(symIndex);
|
|
150
|
1339 RelType type;
|
|
|
1340 if (config->mipsN32Abi) {
|
|
236
|
1341 type = getMipsN32RelType(i);
|
|
150
|
1342 } else {
|
|
|
1343 type = rel.getType(config->isMips64EL);
|
|
|
1344 ++i;
|
|
|
1345 }
|
|
|
1346 // Get an offset in an output section this relocation is applied to.
|
|
236
|
1347 uint64_t offset = getter.get(rel.r_offset);
|
|
150
|
1348 if (offset == uint64_t(-1))
|
|
|
1349 return;
|
|
|
1350
|
|
236
|
1351 RelExpr expr = target->getRelExpr(type, sym, sec->rawData.data() + offset);
|
|
|
1352 int64_t addend =
|
|
|
1353 RelTy::IsRela
|
|
|
1354 ? getAddend<ELFT>(rel)
|
|
|
1355 : target->getImplicitAddend(sec->rawData.data() + rel.r_offset, type);
|
|
|
1356 if (LLVM_UNLIKELY(config->emachine == EM_MIPS))
|
|
|
1357 addend += computeMipsAddend<ELFT>(rel, expr, sym.isLocal());
|
|
|
1358 else if (config->emachine == EM_PPC64 && config->isPic && type == R_PPC64_TOC)
|
|
|
1359 addend += getPPC64TocBase();
|
|
150
|
1360
|
|
|
1361 // Ignore R_*_NONE and other marker relocations.
|
|
|
1362 if (expr == R_NONE)
|
|
|
1363 return;
|
|
|
1364
|
|
236
|
1365 // Error if the target symbol is undefined. Symbol index 0 may be used by
|
|
|
1366 // marker relocations, e.g. R_*_NONE and R_ARM_V4BX. Don't error on them.
|
|
|
1367 if (sym.isUndefined() && symIndex != 0 &&
|
|
|
1368 maybeReportUndefined(cast<Undefined>(sym), *sec, offset))
|
|
|
1369 return;
|
|
150
|
1370
|
|
173
|
1371 if (config->emachine == EM_PPC64) {
|
|
|
1372 // We can separate the small code model relocations into 2 categories:
|
|
|
1373 // 1) Those that access the compiler generated .toc sections.
|
|
|
1374 // 2) Those that access the linker allocated got entries.
|
|
|
1375 // lld allocates got entries to symbols on demand. Since we don't try to
|
|
|
1376 // sort the got entries in any way, we don't have to track which objects
|
|
|
1377 // have got-based small code model relocs. The .toc sections get placed
|
|
|
1378 // after the end of the linker allocated .got section and we do sort those
|
|
|
1379 // so sections addressed with small code model relocations come first.
|
|
236
|
1380 if (type == R_PPC64_TOC16 || type == R_PPC64_TOC16_DS)
|
|
|
1381 sec->file->ppc64SmallCodeModelTocRelocs = true;
|
|
173
|
1382
|
|
|
1383 // Record the TOC entry (.toc + addend) as not relaxable. See the comment in
|
|
|
1384 // InputSectionBase::relocateAlloc().
|
|
|
1385 if (type == R_PPC64_TOC16_LO && sym.isSection() && isa<Defined>(sym) &&
|
|
|
1386 cast<Defined>(sym).section->name == ".toc")
|
|
|
1387 ppc64noTocRelax.insert({&sym, addend});
|
|
221
|
1388
|
|
|
1389 if ((type == R_PPC64_TLSGD && expr == R_TLSDESC_CALL) ||
|
|
|
1390 (type == R_PPC64_TLSLD && expr == R_TLSLD_HINT)) {
|
|
|
1391 if (i == end) {
|
|
|
1392 errorOrWarn("R_PPC64_TLSGD/R_PPC64_TLSLD may not be the last "
|
|
|
1393 "relocation" +
|
|
236
|
1394 getLocation(*sec, sym, offset));
|
|
221
|
1395 return;
|
|
|
1396 }
|
|
|
1397
|
|
|
1398 // Offset the 4-byte aligned R_PPC64_TLSGD by one byte in the NOTOC case,
|
|
|
1399 // so we can discern it later from the toc-case.
|
|
|
1400 if (i->getType(/*isMips64EL=*/false) == R_PPC64_REL24_NOTOC)
|
|
|
1401 ++offset;
|
|
|
1402 }
|
|
173
|
1403 }
|
|
|
1404
|
|
150
|
1405 // If the relocation does not emit a GOT or GOTPLT entry but its computation
|
|
|
1406 // uses their addresses, we need GOT or GOTPLT to be created.
|
|
|
1407 //
|
|
236
|
1408 // The 5 types that relative GOTPLT are all x86 and x86-64 specific.
|
|
|
1409 if (oneof<R_GOTPLTONLY_PC, R_GOTPLTREL, R_GOTPLT, R_PLT_GOTPLT,
|
|
|
1410 R_TLSDESC_GOTPLT, R_TLSGD_GOTPLT>(expr)) {
|
|
|
1411 in.gotPlt->hasGotPltOffRel.store(true, std::memory_order_relaxed);
|
|
|
1412 } else if (oneof<R_GOTONLY_PC, R_GOTREL, R_PPC32_PLTREL, R_PPC64_TOCBASE,
|
|
|
1413 R_PPC64_RELAX_TOC>(expr)) {
|
|
|
1414 in.got->hasGotOffRel.store(true, std::memory_order_relaxed);
|
|
150
|
1415 }
|
|
|
1416
|
|
221
|
1417 // Process TLS relocations, including relaxing TLS relocations. Note that
|
|
236
|
1418 // R_TPREL and R_TPREL_NEG relocations are resolved in processAux.
|
|
|
1419 if (sym.isTls()) {
|
|
|
1420 if (unsigned processed =
|
|
|
1421 handleTlsRelocation(type, sym, *sec, offset, addend, expr)) {
|
|
|
1422 i += processed - 1;
|
|
221
|
1423 return;
|
|
|
1424 }
|
|
150
|
1425 }
|
|
|
1426
|
|
236
|
1427 processAux(expr, type, offset, sym, addend);
|
|
150
|
1428 }
|
|
|
1429
|
|
221
|
1430 // R_PPC64_TLSGD/R_PPC64_TLSLD is required to mark `bl __tls_get_addr` for
|
|
|
1431 // General Dynamic/Local Dynamic code sequences. If a GD/LD GOT relocation is
|
|
|
1432 // found but no R_PPC64_TLSGD/R_PPC64_TLSLD is seen, we assume that the
|
|
|
1433 // instructions are generated by very old IBM XL compilers. Work around the
|
|
|
1434 // issue by disabling GD/LD to IE/LE relaxation.
|
|
|
1435 template <class RelTy>
|
|
|
1436 static void checkPPC64TLSRelax(InputSectionBase &sec, ArrayRef<RelTy> rels) {
|
|
|
1437 // Skip if sec is synthetic (sec.file is null) or if sec has been marked.
|
|
|
1438 if (!sec.file || sec.file->ppc64DisableTLSRelax)
|
|
|
1439 return;
|
|
|
1440 bool hasGDLD = false;
|
|
|
1441 for (const RelTy &rel : rels) {
|
|
|
1442 RelType type = rel.getType(false);
|
|
|
1443 switch (type) {
|
|
|
1444 case R_PPC64_TLSGD:
|
|
|
1445 case R_PPC64_TLSLD:
|
|
|
1446 return; // Found a marker
|
|
|
1447 case R_PPC64_GOT_TLSGD16:
|
|
|
1448 case R_PPC64_GOT_TLSGD16_HA:
|
|
|
1449 case R_PPC64_GOT_TLSGD16_HI:
|
|
|
1450 case R_PPC64_GOT_TLSGD16_LO:
|
|
|
1451 case R_PPC64_GOT_TLSLD16:
|
|
|
1452 case R_PPC64_GOT_TLSLD16_HA:
|
|
|
1453 case R_PPC64_GOT_TLSLD16_HI:
|
|
|
1454 case R_PPC64_GOT_TLSLD16_LO:
|
|
|
1455 hasGDLD = true;
|
|
|
1456 break;
|
|
|
1457 }
|
|
|
1458 }
|
|
|
1459 if (hasGDLD) {
|
|
|
1460 sec.file->ppc64DisableTLSRelax = true;
|
|
|
1461 warn(toString(sec.file) +
|
|
|
1462 ": disable TLS relaxation due to R_PPC64_GOT_TLS* relocations without "
|
|
|
1463 "R_PPC64_TLSGD/R_PPC64_TLSLD relocations");
|
|
|
1464 }
|
|
|
1465 }
|
|
|
1466
|
|
150
|
1467 template <class ELFT, class RelTy>
|
|
236
|
1468 void RelocationScanner::scan(ArrayRef<RelTy> rels) {
|
|
|
1469 // Not all relocations end up in Sec->Relocations, but a lot do.
|
|
|
1470 sec->relocations.reserve(rels.size());
|
|
150
|
1471
|
|
221
|
1472 if (config->emachine == EM_PPC64)
|
|
236
|
1473 checkPPC64TLSRelax<RelTy>(*sec, rels);
|
|
221
|
1474
|
|
|
1475 // For EhInputSection, OffsetGetter expects the relocations to be sorted by
|
|
|
1476 // r_offset. In rare cases (.eh_frame pieces are reordered by a linker
|
|
|
1477 // script), the relocations may be unordered.
|
|
|
1478 SmallVector<RelTy, 0> storage;
|
|
|
1479 if (isa<EhInputSection>(sec))
|
|
|
1480 rels = sortRels(rels, storage);
|
|
|
1481
|
|
236
|
1482 end = static_cast<const void *>(rels.end());
|
|
|
1483 for (auto i = rels.begin(); i != end;)
|
|
|
1484 scanOne<ELFT>(i);
|
|
150
|
1485
|
|
|
1486 // Sort relocations by offset for more efficient searching for
|
|
|
1487 // R_RISCV_PCREL_HI20 and R_PPC64_ADDR64.
|
|
|
1488 if (config->emachine == EM_RISCV ||
|
|
236
|
1489 (config->emachine == EM_PPC64 && sec->name == ".toc"))
|
|
|
1490 llvm::stable_sort(sec->relocations,
|
|
150
|
1491 [](const Relocation &lhs, const Relocation &rhs) {
|
|
|
1492 return lhs.offset < rhs.offset;
|
|
|
1493 });
|
|
|
1494 }
|
|
|
1495
|
|
236
|
1496 template <class ELFT> void RelocationScanner::scanSection(InputSectionBase &s) {
|
|
|
1497 sec = &s;
|
|
|
1498 getter = OffsetGetter(s);
|
|
|
1499 const RelsOrRelas<ELFT> rels = s.template relsOrRelas<ELFT>();
|
|
|
1500 if (rels.areRelocsRel())
|
|
|
1501 scan<ELFT>(rels.rels);
|
|
150
|
1502 else
|
|
236
|
1503 scan<ELFT>(rels.relas);
|
|
|
1504 }
|
|
|
1505
|
|
|
1506 template <class ELFT> void elf::scanRelocations() {
|
|
|
1507 // Scan all relocations. Each relocation goes through a series of tests to
|
|
|
1508 // determine if it needs special treatment, such as creating GOT, PLT,
|
|
|
1509 // copy relocations, etc. Note that relocations for non-alloc sections are
|
|
|
1510 // directly processed by InputSection::relocateNonAlloc.
|
|
|
1511
|
|
|
1512 // Deterministic parallellism needs sorting relocations which is unsuitable
|
|
|
1513 // for -z nocombreloc. MIPS and PPC64 use global states which are not suitable
|
|
|
1514 // for parallelism.
|
|
|
1515 bool serial = !config->zCombreloc || config->emachine == EM_MIPS ||
|
|
|
1516 config->emachine == EM_PPC64;
|
|
|
1517 parallel::TaskGroup tg;
|
|
|
1518 for (ELFFileBase *f : ctx.objectFiles) {
|
|
|
1519 auto fn = [f]() {
|
|
|
1520 RelocationScanner scanner;
|
|
|
1521 for (InputSectionBase *s : f->getSections()) {
|
|
|
1522 if (s && s->kind() == SectionBase::Regular && s->isLive() &&
|
|
|
1523 (s->flags & SHF_ALLOC) &&
|
|
|
1524 !(s->type == SHT_ARM_EXIDX && config->emachine == EM_ARM))
|
|
|
1525 scanner.template scanSection<ELFT>(*s);
|
|
|
1526 }
|
|
|
1527 };
|
|
|
1528 if (serial)
|
|
|
1529 fn();
|
|
|
1530 else
|
|
|
1531 tg.execute(fn);
|
|
|
1532 }
|
|
|
1533
|
|
|
1534 // Both the main thread and thread pool index 0 use getThreadIndex()==0. Be
|
|
|
1535 // careful that they don't concurrently run scanSections. When serial is
|
|
|
1536 // true, fn() has finished at this point, so running execute is safe.
|
|
|
1537 tg.execute([] {
|
|
|
1538 RelocationScanner scanner;
|
|
|
1539 for (Partition &part : partitions) {
|
|
|
1540 for (EhInputSection *sec : part.ehFrame->sections)
|
|
|
1541 scanner.template scanSection<ELFT>(*sec);
|
|
|
1542 if (part.armExidx && part.armExidx->isLive())
|
|
|
1543 for (InputSection *sec : part.armExidx->exidxSections)
|
|
|
1544 scanner.template scanSection<ELFT>(*sec);
|
|
|
1545 }
|
|
|
1546 });
|
|
|
1547 }
|
|
|
1548
|
|
|
1549 static bool handleNonPreemptibleIfunc(Symbol &sym, uint16_t flags) {
|
|
|
1550 // Handle a reference to a non-preemptible ifunc. These are special in a
|
|
|
1551 // few ways:
|
|
|
1552 //
|
|
|
1553 // - Unlike most non-preemptible symbols, non-preemptible ifuncs do not have
|
|
|
1554 // a fixed value. But assuming that all references to the ifunc are
|
|
|
1555 // GOT-generating or PLT-generating, the handling of an ifunc is
|
|
|
1556 // relatively straightforward. We create a PLT entry in Iplt, which is
|
|
|
1557 // usually at the end of .plt, which makes an indirect call using a
|
|
|
1558 // matching GOT entry in igotPlt, which is usually at the end of .got.plt.
|
|
|
1559 // The GOT entry is relocated using an IRELATIVE relocation in relaIplt,
|
|
|
1560 // which is usually at the end of .rela.plt. Unlike most relocations in
|
|
|
1561 // .rela.plt, which may be evaluated lazily without -z now, dynamic
|
|
|
1562 // loaders evaluate IRELATIVE relocs eagerly, which means that for
|
|
|
1563 // IRELATIVE relocs only, GOT-generating relocations can point directly to
|
|
|
1564 // .got.plt without requiring a separate GOT entry.
|
|
|
1565 //
|
|
|
1566 // - Despite the fact that an ifunc does not have a fixed value, compilers
|
|
|
1567 // that are not passed -fPIC will assume that they do, and will emit
|
|
|
1568 // direct (non-GOT-generating, non-PLT-generating) relocations to the
|
|
|
1569 // symbol. This means that if a direct relocation to the symbol is
|
|
|
1570 // seen, the linker must set a value for the symbol, and this value must
|
|
|
1571 // be consistent no matter what type of reference is made to the symbol.
|
|
|
1572 // This can be done by creating a PLT entry for the symbol in the way
|
|
|
1573 // described above and making it canonical, that is, making all references
|
|
|
1574 // point to the PLT entry instead of the resolver. In lld we also store
|
|
|
1575 // the address of the PLT entry in the dynamic symbol table, which means
|
|
|
1576 // that the symbol will also have the same value in other modules.
|
|
|
1577 // Because the value loaded from the GOT needs to be consistent with
|
|
|
1578 // the value computed using a direct relocation, a non-preemptible ifunc
|
|
|
1579 // may end up with two GOT entries, one in .got.plt that points to the
|
|
|
1580 // address returned by the resolver and is used only by the PLT entry,
|
|
|
1581 // and another in .got that points to the PLT entry and is used by
|
|
|
1582 // GOT-generating relocations.
|
|
|
1583 //
|
|
|
1584 // - The fact that these symbols do not have a fixed value makes them an
|
|
|
1585 // exception to the general rule that a statically linked executable does
|
|
|
1586 // not require any form of dynamic relocation. To handle these relocations
|
|
|
1587 // correctly, the IRELATIVE relocations are stored in an array which a
|
|
|
1588 // statically linked executable's startup code must enumerate using the
|
|
|
1589 // linker-defined symbols __rela?_iplt_{start,end}.
|
|
|
1590 if (!sym.isGnuIFunc() || sym.isPreemptible || config->zIfuncNoplt)
|
|
|
1591 return false;
|
|
|
1592 // Skip unreferenced non-preemptible ifunc.
|
|
|
1593 if (!(flags & (NEEDS_GOT | NEEDS_PLT | HAS_DIRECT_RELOC)))
|
|
|
1594 return true;
|
|
|
1595
|
|
|
1596 sym.isInIplt = true;
|
|
|
1597
|
|
|
1598 // Create an Iplt and the associated IRELATIVE relocation pointing to the
|
|
|
1599 // original section/value pairs. For non-GOT non-PLT relocation case below, we
|
|
|
1600 // may alter section/value, so create a copy of the symbol to make
|
|
|
1601 // section/value fixed.
|
|
|
1602 auto *directSym = makeDefined(cast<Defined>(sym));
|
|
|
1603 directSym->allocateAux();
|
|
|
1604 addPltEntry(*in.iplt, *in.igotPlt, *in.relaIplt, target->iRelativeRel,
|
|
|
1605 *directSym);
|
|
|
1606 sym.allocateAux();
|
|
|
1607 symAux.back().pltIdx = symAux[directSym->auxIdx].pltIdx;
|
|
|
1608
|
|
|
1609 if (flags & HAS_DIRECT_RELOC) {
|
|
|
1610 // Change the value to the IPLT and redirect all references to it.
|
|
|
1611 auto &d = cast<Defined>(sym);
|
|
|
1612 d.section = in.iplt.get();
|
|
|
1613 d.value = d.getPltIdx() * target->ipltEntrySize;
|
|
|
1614 d.size = 0;
|
|
|
1615 // It's important to set the symbol type here so that dynamic loaders
|
|
|
1616 // don't try to call the PLT as if it were an ifunc resolver.
|
|
|
1617 d.type = STT_FUNC;
|
|
|
1618
|
|
|
1619 if (flags & NEEDS_GOT)
|
|
|
1620 addGotEntry(sym);
|
|
|
1621 } else if (flags & NEEDS_GOT) {
|
|
|
1622 // Redirect GOT accesses to point to the Igot.
|
|
|
1623 sym.gotInIgot = true;
|
|
|
1624 }
|
|
|
1625 return true;
|
|
|
1626 }
|
|
|
1627
|
|
|
1628 void elf::postScanRelocations() {
|
|
|
1629 auto fn = [](Symbol &sym) {
|
|
|
1630 auto flags = sym.flags.load(std::memory_order_relaxed);
|
|
|
1631 if (handleNonPreemptibleIfunc(sym, flags))
|
|
|
1632 return;
|
|
|
1633 if (!sym.needsDynReloc())
|
|
|
1634 return;
|
|
|
1635 sym.allocateAux();
|
|
|
1636
|
|
|
1637 if (flags & NEEDS_GOT)
|
|
|
1638 addGotEntry(sym);
|
|
|
1639 if (flags & NEEDS_PLT)
|
|
|
1640 addPltEntry(*in.plt, *in.gotPlt, *in.relaPlt, target->pltRel, sym);
|
|
|
1641 if (flags & NEEDS_COPY) {
|
|
|
1642 if (sym.isObject()) {
|
|
|
1643 invokeELFT(addCopyRelSymbol, cast<SharedSymbol>(sym));
|
|
|
1644 // NEEDS_COPY is cleared for sym and its aliases so that in
|
|
|
1645 // later iterations aliases won't cause redundant copies.
|
|
|
1646 assert(!sym.hasFlag(NEEDS_COPY));
|
|
|
1647 } else {
|
|
|
1648 assert(sym.isFunc() && sym.hasFlag(NEEDS_PLT));
|
|
|
1649 if (!sym.isDefined()) {
|
|
|
1650 replaceWithDefined(sym, *in.plt,
|
|
|
1651 target->pltHeaderSize +
|
|
|
1652 target->pltEntrySize * sym.getPltIdx(),
|
|
|
1653 0);
|
|
|
1654 sym.setFlags(NEEDS_COPY);
|
|
|
1655 if (config->emachine == EM_PPC) {
|
|
|
1656 // PPC32 canonical PLT entries are at the beginning of .glink
|
|
|
1657 cast<Defined>(sym).value = in.plt->headerSize;
|
|
|
1658 in.plt->headerSize += 16;
|
|
|
1659 cast<PPC32GlinkSection>(*in.plt).canonical_plts.push_back(&sym);
|
|
|
1660 }
|
|
|
1661 }
|
|
|
1662 }
|
|
|
1663 }
|
|
|
1664
|
|
|
1665 if (!sym.isTls())
|
|
|
1666 return;
|
|
|
1667 bool isLocalInExecutable = !sym.isPreemptible && !config->shared;
|
|
|
1668
|
|
|
1669 if (flags & NEEDS_TLSDESC) {
|
|
|
1670 in.got->addTlsDescEntry(sym);
|
|
|
1671 mainPart->relaDyn->addAddendOnlyRelocIfNonPreemptible(
|
|
|
1672 target->tlsDescRel, *in.got, in.got->getTlsDescOffset(sym), sym,
|
|
|
1673 target->tlsDescRel);
|
|
|
1674 }
|
|
|
1675 if (flags & NEEDS_TLSGD) {
|
|
|
1676 in.got->addDynTlsEntry(sym);
|
|
|
1677 uint64_t off = in.got->getGlobalDynOffset(sym);
|
|
|
1678 if (isLocalInExecutable)
|
|
|
1679 // Write one to the GOT slot.
|
|
|
1680 in.got->relocations.push_back(
|
|
|
1681 {R_ADDEND, target->symbolicRel, off, 1, &sym});
|
|
|
1682 else
|
|
|
1683 mainPart->relaDyn->addSymbolReloc(target->tlsModuleIndexRel, *in.got,
|
|
|
1684 off, sym);
|
|
|
1685
|
|
|
1686 // If the symbol is preemptible we need the dynamic linker to write
|
|
|
1687 // the offset too.
|
|
|
1688 uint64_t offsetOff = off + config->wordsize;
|
|
|
1689 if (sym.isPreemptible)
|
|
|
1690 mainPart->relaDyn->addSymbolReloc(target->tlsOffsetRel, *in.got,
|
|
|
1691 offsetOff, sym);
|
|
|
1692 else
|
|
|
1693 in.got->relocations.push_back(
|
|
|
1694 {R_ABS, target->tlsOffsetRel, offsetOff, 0, &sym});
|
|
|
1695 }
|
|
|
1696 if (flags & NEEDS_TLSGD_TO_IE) {
|
|
|
1697 in.got->addEntry(sym);
|
|
|
1698 mainPart->relaDyn->addSymbolReloc(target->tlsGotRel, *in.got,
|
|
|
1699 sym.getGotOffset(), sym);
|
|
|
1700 }
|
|
|
1701 if (flags & NEEDS_GOT_DTPREL) {
|
|
|
1702 in.got->addEntry(sym);
|
|
|
1703 in.got->relocations.push_back(
|
|
|
1704 {R_ABS, target->tlsOffsetRel, sym.getGotOffset(), 0, &sym});
|
|
|
1705 }
|
|
|
1706
|
|
|
1707 if ((flags & NEEDS_TLSIE) && !(flags & NEEDS_TLSGD_TO_IE))
|
|
|
1708 addTpOffsetGotEntry(sym);
|
|
|
1709 };
|
|
|
1710
|
|
|
1711 if (ctx.needsTlsLd.load(std::memory_order_relaxed) && in.got->addTlsIndex()) {
|
|
|
1712 static Undefined dummy(nullptr, "", STB_LOCAL, 0, 0);
|
|
|
1713 if (config->shared)
|
|
|
1714 mainPart->relaDyn->addReloc(
|
|
|
1715 {target->tlsModuleIndexRel, in.got.get(), in.got->getTlsIndexOff()});
|
|
|
1716 else
|
|
|
1717 in.got->relocations.push_back(
|
|
|
1718 {R_ADDEND, target->symbolicRel, in.got->getTlsIndexOff(), 1, &dummy});
|
|
|
1719 }
|
|
|
1720
|
|
|
1721 assert(symAux.size() == 1);
|
|
|
1722 for (Symbol *sym : symtab.getSymbols())
|
|
|
1723 fn(*sym);
|
|
|
1724
|
|
|
1725 // Local symbols may need the aforementioned non-preemptible ifunc and GOT
|
|
|
1726 // handling. They don't need regular PLT.
|
|
|
1727 for (ELFFileBase *file : ctx.objectFiles)
|
|
|
1728 for (Symbol *sym : file->getLocalSymbols())
|
|
|
1729 fn(*sym);
|
|
150
|
1730 }
|
|
|
1731
|
|
|
1732 static bool mergeCmp(const InputSection *a, const InputSection *b) {
|
|
|
1733 // std::merge requires a strict weak ordering.
|
|
|
1734 if (a->outSecOff < b->outSecOff)
|
|
|
1735 return true;
|
|
|
1736
|
|
236
|
1737 // FIXME dyn_cast<ThunkSection> is non-null for any SyntheticSection.
|
|
|
1738 if (a->outSecOff == b->outSecOff && a != b) {
|
|
150
|
1739 auto *ta = dyn_cast<ThunkSection>(a);
|
|
|
1740 auto *tb = dyn_cast<ThunkSection>(b);
|
|
|
1741
|
|
|
1742 // Check if Thunk is immediately before any specific Target
|
|
|
1743 // InputSection for example Mips LA25 Thunks.
|
|
|
1744 if (ta && ta->getTargetInputSection() == b)
|
|
|
1745 return true;
|
|
|
1746
|
|
|
1747 // Place Thunk Sections without specific targets before
|
|
|
1748 // non-Thunk Sections.
|
|
|
1749 if (ta && !tb && !ta->getTargetInputSection())
|
|
|
1750 return true;
|
|
|
1751 }
|
|
|
1752
|
|
|
1753 return false;
|
|
|
1754 }
|
|
|
1755
|
|
|
1756 // Call Fn on every executable InputSection accessed via the linker script
|
|
|
1757 // InputSectionDescription::Sections.
|
|
|
1758 static void forEachInputSectionDescription(
|
|
|
1759 ArrayRef<OutputSection *> outputSections,
|
|
|
1760 llvm::function_ref<void(OutputSection *, InputSectionDescription *)> fn) {
|
|
|
1761 for (OutputSection *os : outputSections) {
|
|
|
1762 if (!(os->flags & SHF_ALLOC) || !(os->flags & SHF_EXECINSTR))
|
|
|
1763 continue;
|
|
236
|
1764 for (SectionCommand *bc : os->commands)
|
|
150
|
1765 if (auto *isd = dyn_cast<InputSectionDescription>(bc))
|
|
|
1766 fn(os, isd);
|
|
|
1767 }
|
|
|
1768 }
|
|
|
1769
|
|
|
1770 // Thunk Implementation
|
|
|
1771 //
|
|
|
1772 // Thunks (sometimes called stubs, veneers or branch islands) are small pieces
|
|
|
1773 // of code that the linker inserts inbetween a caller and a callee. The thunks
|
|
|
1774 // are added at link time rather than compile time as the decision on whether
|
|
|
1775 // a thunk is needed, such as the caller and callee being out of range, can only
|
|
|
1776 // be made at link time.
|
|
|
1777 //
|
|
|
1778 // It is straightforward to tell given the current state of the program when a
|
|
|
1779 // thunk is needed for a particular call. The more difficult part is that
|
|
|
1780 // the thunk needs to be placed in the program such that the caller can reach
|
|
|
1781 // the thunk and the thunk can reach the callee; furthermore, adding thunks to
|
|
|
1782 // the program alters addresses, which can mean more thunks etc.
|
|
|
1783 //
|
|
|
1784 // In lld we have a synthetic ThunkSection that can hold many Thunks.
|
|
|
1785 // The decision to have a ThunkSection act as a container means that we can
|
|
|
1786 // more easily handle the most common case of a single block of contiguous
|
|
|
1787 // Thunks by inserting just a single ThunkSection.
|
|
|
1788 //
|
|
|
1789 // The implementation of Thunks in lld is split across these areas
|
|
|
1790 // Relocations.cpp : Framework for creating and placing thunks
|
|
|
1791 // Thunks.cpp : The code generated for each supported thunk
|
|
|
1792 // Target.cpp : Target specific hooks that the framework uses to decide when
|
|
|
1793 // a thunk is used
|
|
|
1794 // Synthetic.cpp : Implementation of ThunkSection
|
|
|
1795 // Writer.cpp : Iteratively call framework until no more Thunks added
|
|
|
1796 //
|
|
|
1797 // Thunk placement requirements:
|
|
|
1798 // Mips LA25 thunks. These must be placed immediately before the callee section
|
|
|
1799 // We can assume that the caller is in range of the Thunk. These are modelled
|
|
|
1800 // by Thunks that return the section they must precede with
|
|
|
1801 // getTargetInputSection().
|
|
|
1802 //
|
|
|
1803 // ARM interworking and range extension thunks. These thunks must be placed
|
|
|
1804 // within range of the caller. All implemented ARM thunks can always reach the
|
|
|
1805 // callee as they use an indirect jump via a register that has no range
|
|
|
1806 // restrictions.
|
|
|
1807 //
|
|
|
1808 // Thunk placement algorithm:
|
|
|
1809 // For Mips LA25 ThunkSections; the placement is explicit, it has to be before
|
|
|
1810 // getTargetInputSection().
|
|
|
1811 //
|
|
|
1812 // For thunks that must be placed within range of the caller there are many
|
|
|
1813 // possible choices given that the maximum range from the caller is usually
|
|
|
1814 // much larger than the average InputSection size. Desirable properties include:
|
|
|
1815 // - Maximize reuse of thunks by multiple callers
|
|
|
1816 // - Minimize number of ThunkSections to simplify insertion
|
|
|
1817 // - Handle impact of already added Thunks on addresses
|
|
|
1818 // - Simple to understand and implement
|
|
|
1819 //
|
|
|
1820 // In lld for the first pass, we pre-create one or more ThunkSections per
|
|
|
1821 // InputSectionDescription at Target specific intervals. A ThunkSection is
|
|
|
1822 // placed so that the estimated end of the ThunkSection is within range of the
|
|
|
1823 // start of the InputSectionDescription or the previous ThunkSection. For
|
|
|
1824 // example:
|
|
|
1825 // InputSectionDescription
|
|
|
1826 // Section 0
|
|
|
1827 // ...
|
|
|
1828 // Section N
|
|
|
1829 // ThunkSection 0
|
|
|
1830 // Section N + 1
|
|
|
1831 // ...
|
|
|
1832 // Section N + K
|
|
|
1833 // Thunk Section 1
|
|
|
1834 //
|
|
|
1835 // The intention is that we can add a Thunk to a ThunkSection that is well
|
|
|
1836 // spaced enough to service a number of callers without having to do a lot
|
|
|
1837 // of work. An important principle is that it is not an error if a Thunk cannot
|
|
|
1838 // be placed in a pre-created ThunkSection; when this happens we create a new
|
|
|
1839 // ThunkSection placed next to the caller. This allows us to handle the vast
|
|
|
1840 // majority of thunks simply, but also handle rare cases where the branch range
|
|
|
1841 // is smaller than the target specific spacing.
|
|
|
1842 //
|
|
|
1843 // The algorithm is expected to create all the thunks that are needed in a
|
|
|
1844 // single pass, with a small number of programs needing a second pass due to
|
|
|
1845 // the insertion of thunks in the first pass increasing the offset between
|
|
|
1846 // callers and callees that were only just in range.
|
|
|
1847 //
|
|
|
1848 // A consequence of allowing new ThunkSections to be created outside of the
|
|
|
1849 // pre-created ThunkSections is that in rare cases calls to Thunks that were in
|
|
|
1850 // range in pass K, are out of range in some pass > K due to the insertion of
|
|
|
1851 // more Thunks in between the caller and callee. When this happens we retarget
|
|
|
1852 // the relocation back to the original target and create another Thunk.
|
|
|
1853
|
|
|
1854 // Remove ThunkSections that are empty, this should only be the initial set
|
|
|
1855 // precreated on pass 0.
|
|
|
1856
|
|
|
1857 // Insert the Thunks for OutputSection OS into their designated place
|
|
|
1858 // in the Sections vector, and recalculate the InputSection output section
|
|
|
1859 // offsets.
|
|
|
1860 // This may invalidate any output section offsets stored outside of InputSection
|
|
|
1861 void ThunkCreator::mergeThunks(ArrayRef<OutputSection *> outputSections) {
|
|
|
1862 forEachInputSectionDescription(
|
|
|
1863 outputSections, [&](OutputSection *os, InputSectionDescription *isd) {
|
|
|
1864 if (isd->thunkSections.empty())
|
|
|
1865 return;
|
|
|
1866
|
|
|
1867 // Remove any zero sized precreated Thunks.
|
|
|
1868 llvm::erase_if(isd->thunkSections,
|
|
|
1869 [](const std::pair<ThunkSection *, uint32_t> &ts) {
|
|
|
1870 return ts.first->getSize() == 0;
|
|
|
1871 });
|
|
|
1872
|
|
|
1873 // ISD->ThunkSections contains all created ThunkSections, including
|
|
|
1874 // those inserted in previous passes. Extract the Thunks created this
|
|
|
1875 // pass and order them in ascending outSecOff.
|
|
|
1876 std::vector<ThunkSection *> newThunks;
|
|
|
1877 for (std::pair<ThunkSection *, uint32_t> ts : isd->thunkSections)
|
|
|
1878 if (ts.second == pass)
|
|
|
1879 newThunks.push_back(ts.first);
|
|
|
1880 llvm::stable_sort(newThunks,
|
|
|
1881 [](const ThunkSection *a, const ThunkSection *b) {
|
|
|
1882 return a->outSecOff < b->outSecOff;
|
|
|
1883 });
|
|
|
1884
|
|
|
1885 // Merge sorted vectors of Thunks and InputSections by outSecOff
|
|
236
|
1886 SmallVector<InputSection *, 0> tmp;
|
|
150
|
1887 tmp.reserve(isd->sections.size() + newThunks.size());
|
|
|
1888
|
|
|
1889 std::merge(isd->sections.begin(), isd->sections.end(),
|
|
|
1890 newThunks.begin(), newThunks.end(), std::back_inserter(tmp),
|
|
|
1891 mergeCmp);
|
|
|
1892
|
|
|
1893 isd->sections = std::move(tmp);
|
|
|
1894 });
|
|
|
1895 }
|
|
|
1896
|
|
236
|
1897 static int64_t getPCBias(RelType type) {
|
|
|
1898 if (config->emachine != EM_ARM)
|
|
|
1899 return 0;
|
|
|
1900 switch (type) {
|
|
|
1901 case R_ARM_THM_JUMP19:
|
|
|
1902 case R_ARM_THM_JUMP24:
|
|
|
1903 case R_ARM_THM_CALL:
|
|
|
1904 return 4;
|
|
|
1905 default:
|
|
|
1906 return 8;
|
|
|
1907 }
|
|
|
1908 }
|
|
|
1909
|
|
150
|
1910 // Find or create a ThunkSection within the InputSectionDescription (ISD) that
|
|
|
1911 // is in range of Src. An ISD maps to a range of InputSections described by a
|
|
|
1912 // linker script section pattern such as { .text .text.* }.
|
|
221
|
1913 ThunkSection *ThunkCreator::getISDThunkSec(OutputSection *os,
|
|
|
1914 InputSection *isec,
|
|
150
|
1915 InputSectionDescription *isd,
|
|
221
|
1916 const Relocation &rel,
|
|
|
1917 uint64_t src) {
|
|
236
|
1918 // See the comment in getThunk for -pcBias below.
|
|
|
1919 const int64_t pcBias = getPCBias(rel.type);
|
|
150
|
1920 for (std::pair<ThunkSection *, uint32_t> tp : isd->thunkSections) {
|
|
|
1921 ThunkSection *ts = tp.first;
|
|
236
|
1922 uint64_t tsBase = os->addr + ts->outSecOff - pcBias;
|
|
|
1923 uint64_t tsLimit = tsBase + ts->getSize();
|
|
221
|
1924 if (target->inBranchRange(rel.type, src,
|
|
|
1925 (src > tsLimit) ? tsBase : tsLimit))
|
|
150
|
1926 return ts;
|
|
|
1927 }
|
|
|
1928
|
|
|
1929 // No suitable ThunkSection exists. This can happen when there is a branch
|
|
|
1930 // with lower range than the ThunkSection spacing or when there are too
|
|
|
1931 // many Thunks. Create a new ThunkSection as close to the InputSection as
|
|
|
1932 // possible. Error if InputSection is so large we cannot place ThunkSection
|
|
|
1933 // anywhere in Range.
|
|
|
1934 uint64_t thunkSecOff = isec->outSecOff;
|
|
221
|
1935 if (!target->inBranchRange(rel.type, src,
|
|
|
1936 os->addr + thunkSecOff + rel.addend)) {
|
|
150
|
1937 thunkSecOff = isec->outSecOff + isec->getSize();
|
|
221
|
1938 if (!target->inBranchRange(rel.type, src,
|
|
|
1939 os->addr + thunkSecOff + rel.addend))
|
|
150
|
1940 fatal("InputSection too large for range extension thunk " +
|
|
|
1941 isec->getObjMsg(src - (os->addr + isec->outSecOff)));
|
|
|
1942 }
|
|
|
1943 return addThunkSection(os, isd, thunkSecOff);
|
|
|
1944 }
|
|
|
1945
|
|
|
1946 // Add a Thunk that needs to be placed in a ThunkSection that immediately
|
|
|
1947 // precedes its Target.
|
|
|
1948 ThunkSection *ThunkCreator::getISThunkSec(InputSection *isec) {
|
|
|
1949 ThunkSection *ts = thunkedSections.lookup(isec);
|
|
|
1950 if (ts)
|
|
|
1951 return ts;
|
|
|
1952
|
|
|
1953 // Find InputSectionRange within Target Output Section (TOS) that the
|
|
|
1954 // InputSection (IS) that we need to precede is in.
|
|
|
1955 OutputSection *tos = isec->getParent();
|
|
236
|
1956 for (SectionCommand *bc : tos->commands) {
|
|
150
|
1957 auto *isd = dyn_cast<InputSectionDescription>(bc);
|
|
|
1958 if (!isd || isd->sections.empty())
|
|
|
1959 continue;
|
|
|
1960
|
|
|
1961 InputSection *first = isd->sections.front();
|
|
|
1962 InputSection *last = isd->sections.back();
|
|
|
1963
|
|
|
1964 if (isec->outSecOff < first->outSecOff || last->outSecOff < isec->outSecOff)
|
|
|
1965 continue;
|
|
|
1966
|
|
|
1967 ts = addThunkSection(tos, isd, isec->outSecOff);
|
|
|
1968 thunkedSections[isec] = ts;
|
|
|
1969 return ts;
|
|
|
1970 }
|
|
|
1971
|
|
|
1972 return nullptr;
|
|
|
1973 }
|
|
|
1974
|
|
|
1975 // Create one or more ThunkSections per OS that can be used to place Thunks.
|
|
|
1976 // We attempt to place the ThunkSections using the following desirable
|
|
|
1977 // properties:
|
|
|
1978 // - Within range of the maximum number of callers
|
|
|
1979 // - Minimise the number of ThunkSections
|
|
|
1980 //
|
|
|
1981 // We follow a simple but conservative heuristic to place ThunkSections at
|
|
|
1982 // offsets that are multiples of a Target specific branch range.
|
|
|
1983 // For an InputSectionDescription that is smaller than the range, a single
|
|
|
1984 // ThunkSection at the end of the range will do.
|
|
|
1985 //
|
|
|
1986 // For an InputSectionDescription that is more than twice the size of the range,
|
|
|
1987 // we place the last ThunkSection at range bytes from the end of the
|
|
|
1988 // InputSectionDescription in order to increase the likelihood that the
|
|
|
1989 // distance from a thunk to its target will be sufficiently small to
|
|
|
1990 // allow for the creation of a short thunk.
|
|
|
1991 void ThunkCreator::createInitialThunkSections(
|
|
|
1992 ArrayRef<OutputSection *> outputSections) {
|
|
|
1993 uint32_t thunkSectionSpacing = target->getThunkSectionSpacing();
|
|
|
1994
|
|
|
1995 forEachInputSectionDescription(
|
|
|
1996 outputSections, [&](OutputSection *os, InputSectionDescription *isd) {
|
|
|
1997 if (isd->sections.empty())
|
|
|
1998 return;
|
|
|
1999
|
|
|
2000 uint32_t isdBegin = isd->sections.front()->outSecOff;
|
|
|
2001 uint32_t isdEnd =
|
|
|
2002 isd->sections.back()->outSecOff + isd->sections.back()->getSize();
|
|
|
2003 uint32_t lastThunkLowerBound = -1;
|
|
|
2004 if (isdEnd - isdBegin > thunkSectionSpacing * 2)
|
|
|
2005 lastThunkLowerBound = isdEnd - thunkSectionSpacing;
|
|
|
2006
|
|
|
2007 uint32_t isecLimit;
|
|
|
2008 uint32_t prevIsecLimit = isdBegin;
|
|
|
2009 uint32_t thunkUpperBound = isdBegin + thunkSectionSpacing;
|
|
|
2010
|
|
|
2011 for (const InputSection *isec : isd->sections) {
|
|
|
2012 isecLimit = isec->outSecOff + isec->getSize();
|
|
|
2013 if (isecLimit > thunkUpperBound) {
|
|
|
2014 addThunkSection(os, isd, prevIsecLimit);
|
|
|
2015 thunkUpperBound = prevIsecLimit + thunkSectionSpacing;
|
|
|
2016 }
|
|
|
2017 if (isecLimit > lastThunkLowerBound)
|
|
|
2018 break;
|
|
|
2019 prevIsecLimit = isecLimit;
|
|
|
2020 }
|
|
|
2021 addThunkSection(os, isd, isecLimit);
|
|
|
2022 });
|
|
|
2023 }
|
|
|
2024
|
|
|
2025 ThunkSection *ThunkCreator::addThunkSection(OutputSection *os,
|
|
|
2026 InputSectionDescription *isd,
|
|
|
2027 uint64_t off) {
|
|
|
2028 auto *ts = make<ThunkSection>(os, off);
|
|
|
2029 ts->partition = os->partition;
|
|
|
2030 if ((config->fixCortexA53Errata843419 || config->fixCortexA8) &&
|
|
|
2031 !isd->sections.empty()) {
|
|
|
2032 // The errata fixes are sensitive to addresses modulo 4 KiB. When we add
|
|
|
2033 // thunks we disturb the base addresses of sections placed after the thunks
|
|
|
2034 // this makes patches we have generated redundant, and may cause us to
|
|
|
2035 // generate more patches as different instructions are now in sensitive
|
|
|
2036 // locations. When we generate more patches we may force more branches to
|
|
|
2037 // go out of range, causing more thunks to be generated. In pathological
|
|
|
2038 // cases this can cause the address dependent content pass not to converge.
|
|
|
2039 // We fix this by rounding up the size of the ThunkSection to 4KiB, this
|
|
|
2040 // limits the insertion of a ThunkSection on the addresses modulo 4 KiB,
|
|
|
2041 // which means that adding Thunks to the section does not invalidate
|
|
|
2042 // errata patches for following code.
|
|
|
2043 // Rounding up the size to 4KiB has consequences for code-size and can
|
|
|
2044 // trip up linker script defined assertions. For example the linux kernel
|
|
|
2045 // has an assertion that what LLD represents as an InputSectionDescription
|
|
|
2046 // does not exceed 4 KiB even if the overall OutputSection is > 128 Mib.
|
|
|
2047 // We use the heuristic of rounding up the size when both of the following
|
|
|
2048 // conditions are true:
|
|
|
2049 // 1.) The OutputSection is larger than the ThunkSectionSpacing. This
|
|
|
2050 // accounts for the case where no single InputSectionDescription is
|
|
|
2051 // larger than the OutputSection size. This is conservative but simple.
|
|
|
2052 // 2.) The InputSectionDescription is larger than 4 KiB. This will prevent
|
|
|
2053 // any assertion failures that an InputSectionDescription is < 4 KiB
|
|
|
2054 // in size.
|
|
|
2055 uint64_t isdSize = isd->sections.back()->outSecOff +
|
|
|
2056 isd->sections.back()->getSize() -
|
|
|
2057 isd->sections.front()->outSecOff;
|
|
|
2058 if (os->size > target->getThunkSectionSpacing() && isdSize > 4096)
|
|
|
2059 ts->roundUpSizeForErrata = true;
|
|
|
2060 }
|
|
|
2061 isd->thunkSections.push_back({ts, pass});
|
|
|
2062 return ts;
|
|
|
2063 }
|
|
|
2064
|
|
|
2065 static bool isThunkSectionCompatible(InputSection *source,
|
|
|
2066 SectionBase *target) {
|
|
|
2067 // We can't reuse thunks in different loadable partitions because they might
|
|
|
2068 // not be loaded. But partition 1 (the main partition) will always be loaded.
|
|
|
2069 if (source->partition != target->partition)
|
|
|
2070 return target->partition == 1;
|
|
|
2071 return true;
|
|
|
2072 }
|
|
|
2073
|
|
|
2074 std::pair<Thunk *, bool> ThunkCreator::getThunk(InputSection *isec,
|
|
|
2075 Relocation &rel, uint64_t src) {
|
|
|
2076 std::vector<Thunk *> *thunkVec = nullptr;
|
|
221
|
2077 // Arm and Thumb have a PC Bias of 8 and 4 respectively, this is cancelled
|
|
|
2078 // out in the relocation addend. We compensate for the PC bias so that
|
|
|
2079 // an Arm and Thumb relocation to the same destination get the same keyAddend,
|
|
|
2080 // which is usually 0.
|
|
236
|
2081 const int64_t pcBias = getPCBias(rel.type);
|
|
|
2082 const int64_t keyAddend = rel.addend + pcBias;
|
|
150
|
2083
|
|
|
2084 // We use a ((section, offset), addend) pair to find the thunk position if
|
|
|
2085 // possible so that we create only one thunk for aliased symbols or ICFed
|
|
|
2086 // sections. There may be multiple relocations sharing the same (section,
|
|
|
2087 // offset + addend) pair. We may revert the relocation back to its original
|
|
|
2088 // non-Thunk target, so we cannot fold offset + addend.
|
|
|
2089 if (auto *d = dyn_cast<Defined>(rel.sym))
|
|
|
2090 if (!d->isInPlt() && d->section)
|
|
236
|
2091 thunkVec = &thunkedSymbolsBySectionAndAddend[{{d->section, d->value},
|
|
|
2092 keyAddend}];
|
|
150
|
2093 if (!thunkVec)
|
|
221
|
2094 thunkVec = &thunkedSymbols[{rel.sym, keyAddend}];
|
|
150
|
2095
|
|
|
2096 // Check existing Thunks for Sym to see if they can be reused
|
|
|
2097 for (Thunk *t : *thunkVec)
|
|
|
2098 if (isThunkSectionCompatible(isec, t->getThunkTargetSym()->section) &&
|
|
|
2099 t->isCompatibleWith(*isec, rel) &&
|
|
|
2100 target->inBranchRange(rel.type, src,
|
|
236
|
2101 t->getThunkTargetSym()->getVA(-pcBias)))
|
|
150
|
2102 return std::make_pair(t, false);
|
|
|
2103
|
|
|
2104 // No existing compatible Thunk in range, create a new one
|
|
|
2105 Thunk *t = addThunk(*isec, rel);
|
|
|
2106 thunkVec->push_back(t);
|
|
|
2107 return std::make_pair(t, true);
|
|
|
2108 }
|
|
|
2109
|
|
|
2110 // Return true if the relocation target is an in range Thunk.
|
|
|
2111 // Return false if the relocation is not to a Thunk. If the relocation target
|
|
|
2112 // was originally to a Thunk, but is no longer in range we revert the
|
|
|
2113 // relocation back to its original non-Thunk target.
|
|
|
2114 bool ThunkCreator::normalizeExistingThunk(Relocation &rel, uint64_t src) {
|
|
|
2115 if (Thunk *t = thunks.lookup(rel.sym)) {
|
|
221
|
2116 if (target->inBranchRange(rel.type, src, rel.sym->getVA(rel.addend)))
|
|
150
|
2117 return true;
|
|
|
2118 rel.sym = &t->destination;
|
|
|
2119 rel.addend = t->addend;
|
|
|
2120 if (rel.sym->isInPlt())
|
|
|
2121 rel.expr = toPlt(rel.expr);
|
|
|
2122 }
|
|
|
2123 return false;
|
|
|
2124 }
|
|
|
2125
|
|
|
2126 // Process all relocations from the InputSections that have been assigned
|
|
|
2127 // to InputSectionDescriptions and redirect through Thunks if needed. The
|
|
|
2128 // function should be called iteratively until it returns false.
|
|
|
2129 //
|
|
|
2130 // PreConditions:
|
|
|
2131 // All InputSections that may need a Thunk are reachable from
|
|
|
2132 // OutputSectionCommands.
|
|
|
2133 //
|
|
|
2134 // All OutputSections have an address and all InputSections have an offset
|
|
|
2135 // within the OutputSection.
|
|
|
2136 //
|
|
|
2137 // The offsets between caller (relocation place) and callee
|
|
|
2138 // (relocation target) will not be modified outside of createThunks().
|
|
|
2139 //
|
|
|
2140 // PostConditions:
|
|
|
2141 // If return value is true then ThunkSections have been inserted into
|
|
|
2142 // OutputSections. All relocations that needed a Thunk based on the information
|
|
|
2143 // available to createThunks() on entry have been redirected to a Thunk. Note
|
|
|
2144 // that adding Thunks changes offsets between caller and callee so more Thunks
|
|
|
2145 // may be required.
|
|
|
2146 //
|
|
|
2147 // If return value is false then no more Thunks are needed, and createThunks has
|
|
|
2148 // made no changes. If the target requires range extension thunks, currently
|
|
|
2149 // ARM, then any future change in offset between caller and callee risks a
|
|
|
2150 // relocation out of range error.
|
|
236
|
2151 bool ThunkCreator::createThunks(uint32_t pass,
|
|
|
2152 ArrayRef<OutputSection *> outputSections) {
|
|
|
2153 this->pass = pass;
|
|
150
|
2154 bool addressesChanged = false;
|
|
|
2155
|
|
|
2156 if (pass == 0 && target->getThunkSectionSpacing())
|
|
|
2157 createInitialThunkSections(outputSections);
|
|
|
2158
|
|
|
2159 // Create all the Thunks and insert them into synthetic ThunkSections. The
|
|
|
2160 // ThunkSections are later inserted back into InputSectionDescriptions.
|
|
|
2161 // We separate the creation of ThunkSections from the insertion of the
|
|
|
2162 // ThunkSections as ThunkSections are not always inserted into the same
|
|
|
2163 // InputSectionDescription as the caller.
|
|
|
2164 forEachInputSectionDescription(
|
|
|
2165 outputSections, [&](OutputSection *os, InputSectionDescription *isd) {
|
|
|
2166 for (InputSection *isec : isd->sections)
|
|
|
2167 for (Relocation &rel : isec->relocations) {
|
|
|
2168 uint64_t src = isec->getVA(rel.offset);
|
|
|
2169
|
|
|
2170 // If we are a relocation to an existing Thunk, check if it is
|
|
|
2171 // still in range. If not then Rel will be altered to point to its
|
|
|
2172 // original target so another Thunk can be generated.
|
|
|
2173 if (pass > 0 && normalizeExistingThunk(rel, src))
|
|
|
2174 continue;
|
|
|
2175
|
|
|
2176 if (!target->needsThunk(rel.expr, rel.type, isec->file, src,
|
|
|
2177 *rel.sym, rel.addend))
|
|
|
2178 continue;
|
|
|
2179
|
|
|
2180 Thunk *t;
|
|
|
2181 bool isNew;
|
|
|
2182 std::tie(t, isNew) = getThunk(isec, rel, src);
|
|
|
2183
|
|
|
2184 if (isNew) {
|
|
|
2185 // Find or create a ThunkSection for the new Thunk
|
|
|
2186 ThunkSection *ts;
|
|
|
2187 if (auto *tis = t->getTargetInputSection())
|
|
|
2188 ts = getISThunkSec(tis);
|
|
|
2189 else
|
|
221
|
2190 ts = getISDThunkSec(os, isec, isd, rel, src);
|
|
150
|
2191 ts->addThunk(t);
|
|
|
2192 thunks[t->getThunkTargetSym()] = t;
|
|
|
2193 }
|
|
|
2194
|
|
|
2195 // Redirect relocation to Thunk, we never go via the PLT to a Thunk
|
|
|
2196 rel.sym = t->getThunkTargetSym();
|
|
|
2197 rel.expr = fromPlt(rel.expr);
|
|
|
2198
|
|
|
2199 // On AArch64 and PPC, a jump/call relocation may be encoded as
|
|
|
2200 // STT_SECTION + non-zero addend, clear the addend after
|
|
|
2201 // redirection.
|
|
|
2202 if (config->emachine != EM_MIPS)
|
|
|
2203 rel.addend = -getPCBias(rel.type);
|
|
|
2204 }
|
|
|
2205
|
|
|
2206 for (auto &p : isd->thunkSections)
|
|
|
2207 addressesChanged |= p.first->assignOffsets();
|
|
|
2208 });
|
|
|
2209
|
|
|
2210 for (auto &p : thunkedSections)
|
|
|
2211 addressesChanged |= p.second->assignOffsets();
|
|
|
2212
|
|
|
2213 // Merge all created synthetic ThunkSections back into OutputSection
|
|
|
2214 mergeThunks(outputSections);
|
|
|
2215 return addressesChanged;
|
|
|
2216 }
|
|
|
2217
|
|
173
|
2218 // The following aid in the conversion of call x@GDPLT to call __tls_get_addr
|
|
|
2219 // hexagonNeedsTLSSymbol scans for relocations would require a call to
|
|
|
2220 // __tls_get_addr.
|
|
|
2221 // hexagonTLSSymbolUpdate rebinds the relocation to __tls_get_addr.
|
|
|
2222 bool elf::hexagonNeedsTLSSymbol(ArrayRef<OutputSection *> outputSections) {
|
|
|
2223 bool needTlsSymbol = false;
|
|
|
2224 forEachInputSectionDescription(
|
|
|
2225 outputSections, [&](OutputSection *os, InputSectionDescription *isd) {
|
|
|
2226 for (InputSection *isec : isd->sections)
|
|
|
2227 for (Relocation &rel : isec->relocations)
|
|
|
2228 if (rel.sym->type == llvm::ELF::STT_TLS && rel.expr == R_PLT_PC) {
|
|
|
2229 needTlsSymbol = true;
|
|
|
2230 return;
|
|
|
2231 }
|
|
|
2232 });
|
|
|
2233 return needTlsSymbol;
|
|
|
2234 }
|
|
150
|
2235
|
|
173
|
2236 void elf::hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections) {
|
|
236
|
2237 Symbol *sym = symtab.find("__tls_get_addr");
|
|
173
|
2238 if (!sym)
|
|
|
2239 return;
|
|
|
2240 bool needEntry = true;
|
|
|
2241 forEachInputSectionDescription(
|
|
|
2242 outputSections, [&](OutputSection *os, InputSectionDescription *isd) {
|
|
|
2243 for (InputSection *isec : isd->sections)
|
|
|
2244 for (Relocation &rel : isec->relocations)
|
|
|
2245 if (rel.sym->type == llvm::ELF::STT_TLS && rel.expr == R_PLT_PC) {
|
|
|
2246 if (needEntry) {
|
|
236
|
2247 sym->allocateAux();
|
|
|
2248 addPltEntry(*in.plt, *in.gotPlt, *in.relaPlt, target->pltRel,
|
|
173
|
2249 *sym);
|
|
|
2250 needEntry = false;
|
|
|
2251 }
|
|
|
2252 rel.sym = sym;
|
|
|
2253 }
|
|
|
2254 });
|
|
|
2255 }
|
|
|
2256
|
|
236
|
2257 template void elf::scanRelocations<ELF32LE>();
|
|
|
2258 template void elf::scanRelocations<ELF32BE>();
|
|
|
2259 template void elf::scanRelocations<ELF64LE>();
|
|
|
2260 template void elf::scanRelocations<ELF64BE>();
|
