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annotate llvm/test/CodeGen/AMDGPU/fract.f64.ll @ 236:c4bab56944e8 llvm-original

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LLVM 16
author kono
date Wed, 09 Nov 2022 17:45:10 +0900
parents 79ff65ed7e25
children 1f2b6ac9f198
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,SI,FUNC %s
79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,CI,FUNC %s
79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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3 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,CI,FUNC %s
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4
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79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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5 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN-UNSAFE,FUNC %s
79ff65ed7e25 LLVM12 Original
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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6 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN-UNSAFE,VI-UNSAFE,FUNC %s
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7
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8 declare double @llvm.fabs.f64(double) #0
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9 declare double @llvm.floor.f64(double) #0
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10
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11 ; FUNC-LABEL: {{^}}fract_f64:
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c4bab56944e8 LLVM 16
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12 ; SI-DAG: v_fract_f64_e32 [[FRC:v\[[0-9]+:[0-9]+\]]], v[[[LO:[0-9]+]]:[[HI:[0-9]+]]]
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13 ; SI-DAG: v_mov_b32_e32 v[[UPLO:[0-9]+]], -1
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14 ; SI-DAG: v_mov_b32_e32 v[[UPHI:[0-9]+]], 0x3fefffff
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c4bab56944e8 LLVM 16
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15 ; SI-DAG: v_min_f64 v[[[MINLO:[0-9]+]]:[[MINHI:[0-9]+]]], [[FRC]], v[[[UPLO]]:[[UPHI]]]
c4bab56944e8 LLVM 16
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16 ; SI-DAG: v_cmp_class_f64_e64 vcc, v[[[LO]]:[[HI]]], 3
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17 ; SI: v_cndmask_b32_e32 v[[RESLO:[0-9]+]], v[[MINLO]], v[[LO]], vcc
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18 ; SI: v_cndmask_b32_e32 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], vcc
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c4bab56944e8 LLVM 16
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19 ; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], v[[[LO]]:[[HI]]], -v[[[RESLO]]:[[RESHI]]]
c4bab56944e8 LLVM 16
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20 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], v[[[LO]]:[[HI]]], -[[SUB0]]
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21
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22 ; CI: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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23 ; CI: v_floor_f64_e32 [[FLOORX:v\[[0-9]+:[0-9]+\]]], [[X]]
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24 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]], -[[FLOORX]]
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25
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26 ; GCN-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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27 ; GCN-UNSAFE: v_fract_f64_e32 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]]
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28
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29 ; GCN: buffer_store_dwordx2 [[FRACT]]
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30 define amdgpu_kernel void @fract_f64(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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31 %x = load double, double addrspace(1)* %src
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32 %floor.x = call double @llvm.floor.f64(double %x)
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33 %fract = fsub double %x, %floor.x
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34 store double %fract, double addrspace(1)* %out
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35 ret void
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36 }
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37
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38 ; FUNC-LABEL: {{^}}fract_f64_neg:
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39 ; SI-DAG: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -v[[[LO:[0-9]+]]:[[HI:[0-9]+]]]
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40 ; SI-DAG: v_mov_b32_e32 v[[UPLO:[0-9]+]], -1
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41 ; SI-DAG: v_mov_b32_e32 v[[UPHI:[0-9]+]], 0x3fefffff
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c4bab56944e8 LLVM 16
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42 ; SI-DAG: v_min_f64 v[[[MINLO:[0-9]+]]:[[MINHI:[0-9]+]]], [[FRC]], v[[[UPLO]]:[[UPHI]]]
c4bab56944e8 LLVM 16
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43 ; SI-DAG: v_cmp_class_f64_e64 vcc, v[[[LO]]:[[HI]]], 3
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44 ; SI: v_cndmask_b32_e32 v[[RESLO:[0-9]+]], v[[MINLO]], v[[LO]], vcc
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45 ; SI: v_cndmask_b32_e32 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], vcc
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46 ; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], -v[[[LO]]:[[HI]]], -v[[[RESLO]]:[[RESHI]]]
c4bab56944e8 LLVM 16
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47 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -v[[[LO]]:[[HI]]], -[[SUB0]]
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48
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49 ; CI: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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50 ; CI: v_floor_f64_e64 [[FLOORX:v\[[0-9]+:[0-9]+\]]], -[[X]]
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51 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]], -[[FLOORX]]
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52
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53 ; GCN-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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54 ; GCN-UNSAFE: v_fract_f64_e64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]]
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55
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56 ; GCN: buffer_store_dwordx2 [[FRACT]]
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57 define amdgpu_kernel void @fract_f64_neg(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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58 %x = load double, double addrspace(1)* %src
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59 %neg.x = fsub double -0.0, %x
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60 %floor.neg.x = call double @llvm.floor.f64(double %neg.x)
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61 %fract = fsub double %neg.x, %floor.neg.x
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62 store double %fract, double addrspace(1)* %out
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63 ret void
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64 }
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65
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66 ; FUNC-LABEL: {{^}}fract_f64_neg_abs:
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67 ; SI-DAG: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -|v[[[LO:[0-9]+]]:[[HI:[0-9]+]]]|
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68 ; SI-DAG: v_mov_b32_e32 v[[UPLO:[0-9]+]], -1
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69 ; SI-DAG: v_mov_b32_e32 v[[UPHI:[0-9]+]], 0x3fefffff
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70 ; SI-DAG: v_min_f64 v[[[MINLO:[0-9]+]]:[[MINHI:[0-9]+]]], [[FRC]], v[[[UPLO]]:[[UPHI]]]
c4bab56944e8 LLVM 16
kono
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71 ; SI-DAG: v_cmp_class_f64_e64 vcc, v[[[LO]]:[[HI]]], 3
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72 ; SI: v_cndmask_b32_e32 v[[RESLO:[0-9]+]], v[[MINLO]], v[[LO]], vcc
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73 ; SI: v_cndmask_b32_e32 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], vcc
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74 ; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], -|v[[[LO]]:[[HI]]]|, -v[[[RESLO]]:[[RESHI]]]
c4bab56944e8 LLVM 16
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75 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|v[[[LO]]:[[HI]]]|, -[[SUB0]]
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76
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77 ; CI: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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78 ; CI: v_floor_f64_e64 [[FLOORX:v\[[0-9]+:[0-9]+\]]], -|[[X]]|
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79 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|[[X]]|, -[[FLOORX]]
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80
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81 ; GCN-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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82 ; GCN-UNSAFE: v_fract_f64_e64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|[[X]]|
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83
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84 ; GCN: buffer_store_dwordx2 [[FRACT]]
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85 define amdgpu_kernel void @fract_f64_neg_abs(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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86 %x = load double, double addrspace(1)* %src
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87 %abs.x = call double @llvm.fabs.f64(double %x)
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88 %neg.abs.x = fsub double -0.0, %abs.x
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89 %floor.neg.abs.x = call double @llvm.floor.f64(double %neg.abs.x)
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90 %fract = fsub double %neg.abs.x, %floor.neg.abs.x
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91 store double %fract, double addrspace(1)* %out
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92 ret void
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93 }
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94
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95 ; FUNC-LABEL: {{^}}multi_use_floor_fract_f64:
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96 ; VI-UNSAFE: buffer_load_dwordx2 [[X:v\[[0-9]+:[0-9]+\]]]
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97 ; VI-UNSAFE-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[X]]
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98 ; VI-UNSAFE-DAG: v_fract_f64_e32 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]]
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99 ; VI-UNSAFE: buffer_store_dwordx2 [[FLOOR]]
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100 ; VI-UNSAFE: buffer_store_dwordx2 [[FRACT]]
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101 define amdgpu_kernel void @multi_use_floor_fract_f64(double addrspace(1)* %out, double addrspace(1)* %src) #1 {
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102 %x = load double, double addrspace(1)* %src
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103 %floor.x = call double @llvm.floor.f64(double %x)
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104 %fract = fsub double %x, %floor.x
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105 store volatile double %floor.x, double addrspace(1)* %out
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106 store volatile double %fract, double addrspace(1)* %out
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107 ret void
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108 }
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109
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110 attributes #0 = { nounwind readnone }
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111 attributes #1 = { nounwind }