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annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll @ 236:c4bab56944e8 llvm-original

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LLVM 16
author kono
date Wed, 09 Nov 2022 17:45:10 +0900
parents 1d019706d866
children 1f2b6ac9f198
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1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s
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2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s
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3
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4 ; GCN-LABEL: {{^}}is_private_vgpr:
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5 ; GCN-DAG: {{flat|global}}_load_dwordx2 v{{\[[0-9]+}}:[[PTR_HI:[0-9]+]]]
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6 ; CI-DAG: s_load_dword [[APERTURE:s[0-9]+]], s[4:5], 0x11
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7 ; GFX9-DAG: s_getreg_b32 [[APERTURE:s[0-9]+]], hwreg(HW_REG_SH_MEM_BASES, 0, 16)
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8 ; GFX9: s_lshl_b32 [[APERTURE]], [[APERTURE]], 16
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9 ; GCN: v_cmp_eq_u32_e32 vcc, [[APERTURE]], v[[PTR_HI]]
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10 ; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1, vcc
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11 define amdgpu_kernel void @is_private_vgpr(i8* addrspace(1)* %ptr.ptr) {
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12 %id = call i32 @llvm.amdgcn.workitem.id.x()
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13 %gep = getelementptr inbounds i8*, i8* addrspace(1)* %ptr.ptr, i32 %id
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14 %ptr = load volatile i8*, i8* addrspace(1)* %gep
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15 %val = call i1 @llvm.amdgcn.is.private(i8* %ptr)
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16 %ext = zext i1 %val to i32
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17 store i32 %ext, i32 addrspace(1)* undef
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18 ret void
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19 }
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20
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21 ; FIXME: setcc (zero_extend (setcc)), 1) not folded out, resulting in
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22 ; select and vcc branch.
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23
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24 ; GCN-LABEL: {{^}}is_private_sgpr:
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25 ; CI-DAG: s_load_dword [[APERTURE:s[0-9]+]], s[4:5], 0x11{{$}}
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26 ; GFX9-DAG: s_getreg_b32 [[APERTURE:s[0-9]+]], hwreg(HW_REG_SH_MEM_BASES, 0, 16)
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27
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28 ; CI-DAG: s_load_dword [[PTR_HI:s[0-9]+]], s[6:7], 0x1{{$}}
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29 ; GFX9-DAG: s_load_dword [[PTR_HI:s[0-9]+]], s[4:5], 0x4{{$}}
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30 ; GFX9: s_lshl_b32 [[APERTURE]], [[APERTURE]], 16
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31
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32 ; GCN: s_cmp_eq_u32 [[PTR_HI]], [[APERTURE]]
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33 ; GCN: s_cbranch_vccnz
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34 define amdgpu_kernel void @is_private_sgpr(i8* %ptr) {
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35 %val = call i1 @llvm.amdgcn.is.private(i8* %ptr)
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36 br i1 %val, label %bb0, label %bb1
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37
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38 bb0:
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39 store volatile i32 0, i32 addrspace(1)* undef
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40 br label %bb1
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41
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42 bb1:
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43 ret void
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44 }
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45
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46 declare i32 @llvm.amdgcn.workitem.id.x() #0
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47 declare i1 @llvm.amdgcn.is.private(i8* nocapture) #0
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48
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49 attributes #0 = { nounwind readnone speculatable }