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1 //=- SystemZScheduleZEC12.td - SystemZ Scheduling Definitions --*- tblgen -*-=//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file defines the machine model for ZEC12 to support instruction
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11 // scheduling and other instruction cost heuristics.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 def ZEC12Model : SchedMachineModel {
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16
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17 let UnsupportedFeatures = Arch10UnsupportedFeatures.List;
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18
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19 let IssueWidth = 5;
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20 let MicroOpBufferSize = 40; // Issue queues
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21 let LoadLatency = 1; // Optimistic load latency.
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22
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23 let PostRAScheduler = 1;
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24
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25 // Extra cycles for a mispredicted branch.
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121
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26 let MispredictPenalty = 16;
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120
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27 }
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28
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29 let SchedModel = ZEC12Model in {
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30
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31 // These definitions could be put in a subtarget common include file,
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32 // but it seems the include system in Tablegen currently rejects
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33 // multiple includes of same file.
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34 def : WriteRes<GroupAlone, []> {
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35 let NumMicroOps = 0;
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36 let BeginGroup = 1;
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37 let EndGroup = 1;
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38 }
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39 def : WriteRes<EndGroup, []> {
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40 let NumMicroOps = 0;
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41 let EndGroup = 1;
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42 }
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43 def : WriteRes<Lat2, []> { let Latency = 2; let NumMicroOps = 0;}
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44 def : WriteRes<Lat3, []> { let Latency = 3; let NumMicroOps = 0;}
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45 def : WriteRes<Lat4, []> { let Latency = 4; let NumMicroOps = 0;}
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46 def : WriteRes<Lat5, []> { let Latency = 5; let NumMicroOps = 0;}
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47 def : WriteRes<Lat6, []> { let Latency = 6; let NumMicroOps = 0;}
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48 def : WriteRes<Lat7, []> { let Latency = 7; let NumMicroOps = 0;}
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49 def : WriteRes<Lat8, []> { let Latency = 8; let NumMicroOps = 0;}
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50 def : WriteRes<Lat9, []> { let Latency = 9; let NumMicroOps = 0;}
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51 def : WriteRes<Lat10, []> { let Latency = 10; let NumMicroOps = 0;}
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52 def : WriteRes<Lat11, []> { let Latency = 11; let NumMicroOps = 0;}
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53 def : WriteRes<Lat12, []> { let Latency = 12; let NumMicroOps = 0;}
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54 def : WriteRes<Lat15, []> { let Latency = 15; let NumMicroOps = 0;}
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55 def : WriteRes<Lat20, []> { let Latency = 20; let NumMicroOps = 0;}
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56 def : WriteRes<Lat30, []> { let Latency = 30; let NumMicroOps = 0;}
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57
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58 // Execution units.
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59 def ZEC12_FXUnit : ProcResource<2>;
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60 def ZEC12_LSUnit : ProcResource<2>;
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61 def ZEC12_FPUnit : ProcResource<1>;
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121
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62 def ZEC12_DFUnit : ProcResource<1>;
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120
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63 def ZEC12_VBUnit : ProcResource<1>;
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64
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65 // Subtarget specific definitions of scheduling resources.
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66 def : WriteRes<FXU, [ZEC12_FXUnit]> { let Latency = 1; }
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67 def : WriteRes<LSU, [ZEC12_LSUnit]> { let Latency = 4; }
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68 def : WriteRes<LSU_lat1, [ZEC12_LSUnit]> { let Latency = 1; }
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69 def : WriteRes<FPU, [ZEC12_FPUnit]> { let Latency = 8; }
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70 def : WriteRes<FPU2, [ZEC12_FPUnit, ZEC12_FPUnit]> { let Latency = 9; }
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121
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71 def : WriteRes<DFU, [ZEC12_DFUnit]> { let Latency = 2; }
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72 def : WriteRes<DFU2, [ZEC12_DFUnit, ZEC12_DFUnit]> { let Latency = 3; }
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120
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73 def : WriteRes<VBU, [ZEC12_VBUnit]>; // Virtual Branching Unit
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74
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75 // -------------------------- INSTRUCTIONS ---------------------------------- //
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76
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77 // InstRW constructs have been used in order to preserve the
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78 // readability of the InstrInfo files.
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79
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80 // For each instruction, as matched by a regexp, provide a list of
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81 // resources that it needs. These will be combined into a SchedClass.
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82
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83 //===----------------------------------------------------------------------===//
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84 // Stack allocation
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85 //===----------------------------------------------------------------------===//
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86
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87 def : InstRW<[FXU], (instregex "ADJDYNALLOC$")>; // Pseudo -> LA / LAY
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88
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89 //===----------------------------------------------------------------------===//
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90 // Branch instructions
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91 //===----------------------------------------------------------------------===//
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92
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93 // Branch
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94 def : InstRW<[VBU], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
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95 def : InstRW<[VBU], (instregex "(Call)?J(G)?(Asm.*)?$")>;
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96 def : InstRW<[LSU, Lat4], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
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97 def : InstRW<[LSU, Lat4], (instregex "(Call)?B(R)?(Asm.*)?$")>;
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98 def : InstRW<[FXU, EndGroup], (instregex "BRCT(G)?$")>;
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121
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99 def : InstRW<[FXU, LSU, Lat5, GroupAlone], (instregex "BRCTH$")>;
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100 def : InstRW<[FXU, LSU, Lat5, GroupAlone], (instregex "BCT(G)?(R)?$")>;
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101 def : InstRW<[FXU, FXU, FXU, LSU, Lat7, GroupAlone],
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102 (instregex "B(R)?X(H|L).*$")>;
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120
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103
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104 // Compare and branch
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105 def : InstRW<[FXU], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
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106 def : InstRW<[FXU, LSU, Lat5, GroupAlone],
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107 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
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108
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109 //===----------------------------------------------------------------------===//
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110 // Trap instructions
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111 //===----------------------------------------------------------------------===//
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112
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113 // Trap
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114 def : InstRW<[VBU], (instregex "(Cond)?Trap$")>;
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115
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116 // Compare and trap
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117 def : InstRW<[FXU], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
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118 def : InstRW<[FXU], (instregex "CL(G)?RT(Asm.*)?$")>;
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119 def : InstRW<[FXU], (instregex "CL(F|G)IT(Asm.*)?$")>;
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120 def : InstRW<[FXU, LSU, Lat5], (instregex "CL(G)?T(Asm.*)?$")>;
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121
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122 //===----------------------------------------------------------------------===//
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123 // Call and return instructions
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124 //===----------------------------------------------------------------------===//
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125
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126 // Call
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127 def : InstRW<[VBU, FXU, FXU, Lat3, GroupAlone], (instregex "(Call)?BRAS$")>;
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128 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "(Call)?BRASL$")>;
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129 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
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130 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
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131
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132 // Return
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133 def : InstRW<[LSU_lat1, EndGroup], (instregex "Return$")>;
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134 def : InstRW<[LSU_lat1], (instregex "CondReturn$")>;
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135
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136 //===----------------------------------------------------------------------===//
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137 // Select instructions
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138 //===----------------------------------------------------------------------===//
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139
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140 // Select pseudo
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141 def : InstRW<[FXU], (instregex "Select(32|64|32Mux)$")>;
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142
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143 // CondStore pseudos
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144 def : InstRW<[FXU], (instregex "CondStore16(Inv)?$")>;
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145 def : InstRW<[FXU], (instregex "CondStore16Mux(Inv)?$")>;
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146 def : InstRW<[FXU], (instregex "CondStore32(Inv)?$")>;
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147 def : InstRW<[FXU], (instregex "CondStore64(Inv)?$")>;
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148 def : InstRW<[FXU], (instregex "CondStore8(Inv)?$")>;
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149 def : InstRW<[FXU], (instregex "CondStore8Mux(Inv)?$")>;
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150
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151 //===----------------------------------------------------------------------===//
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152 // Move instructions
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153 //===----------------------------------------------------------------------===//
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154
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155 // Moves
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156 def : InstRW<[FXU, LSU, Lat5], (instregex "MV(G|H)?HI$")>;
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157 def : InstRW<[FXU, LSU, Lat5], (instregex "MVI(Y)?$")>;
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158
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159 // Move character
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160 def : InstRW<[LSU, LSU, LSU, FXU, Lat8, GroupAlone], (instregex "MVC$")>;
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121
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161 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MVCL(E|U)?$")>;
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120
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162
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163 // Pseudo -> reg move
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164 def : InstRW<[FXU], (instregex "COPY(_TO_REGCLASS)?$")>;
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165 def : InstRW<[FXU], (instregex "EXTRACT_SUBREG$")>;
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166 def : InstRW<[FXU], (instregex "INSERT_SUBREG$")>;
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167 def : InstRW<[FXU], (instregex "REG_SEQUENCE$")>;
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168 def : InstRW<[FXU], (instregex "SUBREG_TO_REG$")>;
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169
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170 // Loads
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171 def : InstRW<[LSU], (instregex "L(Y|FH|RL|Mux)?$")>;
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172 def : InstRW<[LSU], (instregex "LG(RL)?$")>;
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173 def : InstRW<[LSU], (instregex "L128$")>;
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174
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175 def : InstRW<[FXU], (instregex "LLIH(F|H|L)$")>;
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176 def : InstRW<[FXU], (instregex "LLIL(F|H|L)$")>;
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177
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178 def : InstRW<[FXU], (instregex "LG(F|H)I$")>;
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179 def : InstRW<[FXU], (instregex "LHI(Mux)?$")>;
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180 def : InstRW<[FXU], (instregex "LR(Mux)?$")>;
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181
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121
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182 // Load and trap
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183 def : InstRW<[FXU, LSU, Lat5], (instregex "L(FH|G)?AT$")>;
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184
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120
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185 // Load and test
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186 def : InstRW<[FXU, LSU, Lat5], (instregex "LT(G)?$")>;
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187 def : InstRW<[FXU], (instregex "LT(G)?R$")>;
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188
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189 // Stores
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190 def : InstRW<[FXU, LSU, Lat5], (instregex "STG(RL)?$")>;
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191 def : InstRW<[FXU, LSU, Lat5], (instregex "ST128$")>;
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192 def : InstRW<[FXU, LSU, Lat5], (instregex "ST(Y|FH|RL|Mux)?$")>;
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193
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194 // String moves.
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195 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MVST$")>;
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196
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197 //===----------------------------------------------------------------------===//
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198 // Conditional move instructions
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199 //===----------------------------------------------------------------------===//
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200
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201 def : InstRW<[FXU, Lat2], (instregex "LOC(G)?R(Asm.*)?$")>;
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202 def : InstRW<[FXU, LSU, Lat6], (instregex "LOC(G)?(Asm.*)?$")>;
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203 def : InstRW<[FXU, LSU, Lat5], (instregex "STOC(G)?(Asm.*)?$")>;
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204
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205 //===----------------------------------------------------------------------===//
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206 // Sign extensions
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207 //===----------------------------------------------------------------------===//
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208
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209 def : InstRW<[FXU], (instregex "L(B|H|G)R$")>;
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210 def : InstRW<[FXU], (instregex "LG(B|H|F)R$")>;
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211
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212 def : InstRW<[FXU, LSU, Lat5], (instregex "LTGF$")>;
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213 def : InstRW<[FXU], (instregex "LTGFR$")>;
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214
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215 def : InstRW<[FXU, LSU, Lat5], (instregex "LB(H|Mux)?$")>;
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216 def : InstRW<[FXU, LSU, Lat5], (instregex "LH(Y)?$")>;
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217 def : InstRW<[FXU, LSU, Lat5], (instregex "LH(H|Mux|RL)$")>;
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218 def : InstRW<[FXU, LSU, Lat5], (instregex "LG(B|H|F)$")>;
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219 def : InstRW<[FXU, LSU, Lat5], (instregex "LG(H|F)RL$")>;
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220
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221 //===----------------------------------------------------------------------===//
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222 // Zero extensions
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223 //===----------------------------------------------------------------------===//
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224
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225 def : InstRW<[FXU], (instregex "LLCR(Mux)?$")>;
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226 def : InstRW<[FXU], (instregex "LLHR(Mux)?$")>;
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227 def : InstRW<[FXU], (instregex "LLG(C|H|F|T)R$")>;
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228 def : InstRW<[LSU], (instregex "LLC(Mux)?$")>;
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229 def : InstRW<[LSU], (instregex "LLH(Mux)?$")>;
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230 def : InstRW<[FXU, LSU, Lat5], (instregex "LL(C|H)H$")>;
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231 def : InstRW<[LSU], (instregex "LLHRL$")>;
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232 def : InstRW<[LSU], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
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233
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121
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234 // Load and trap
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235 def : InstRW<[FXU, LSU, Lat5], (instregex "LLG(F|T)?AT$")>;
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236
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120
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237 //===----------------------------------------------------------------------===//
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238 // Truncations
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239 //===----------------------------------------------------------------------===//
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240
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241 def : InstRW<[FXU, LSU, Lat5], (instregex "STC(H|Y|Mux)?$")>;
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242 def : InstRW<[FXU, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
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121
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243 def : InstRW<[FXU, LSU, Lat5], (instregex "STCM(H|Y)?$")>;
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120
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244
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245 //===----------------------------------------------------------------------===//
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246 // Multi-register moves
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247 //===----------------------------------------------------------------------===//
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248
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249 // Load multiple (estimated average of 5 ops)
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250 def : InstRW<[LSU, LSU, LSU, LSU, LSU, Lat10, GroupAlone],
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251 (instregex "LM(H|Y|G)?$")>;
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252
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121
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253 // Load multiple disjoint
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254 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "LMD$")>;
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255
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120
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256 // Store multiple (estimated average of 3 ops)
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257 def : InstRW<[LSU, LSU, FXU, FXU, FXU, Lat10, GroupAlone],
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258 (instregex "STM(H|Y|G)?$")>;
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259
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260 //===----------------------------------------------------------------------===//
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261 // Byte swaps
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262 //===----------------------------------------------------------------------===//
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263
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264 def : InstRW<[FXU], (instregex "LRV(G)?R$")>;
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265 def : InstRW<[FXU, LSU, Lat5], (instregex "LRV(G|H)?$")>;
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266 def : InstRW<[FXU, LSU, Lat5], (instregex "STRV(G|H)?$")>;
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121
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267 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MVCIN$")>;
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120
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268
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269 //===----------------------------------------------------------------------===//
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270 // Load address instructions
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271 //===----------------------------------------------------------------------===//
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272
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273 def : InstRW<[FXU], (instregex "LA(Y|RL)?$")>;
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274
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275 // Load the Global Offset Table address
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276 def : InstRW<[FXU], (instregex "GOT$")>;
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277
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278 //===----------------------------------------------------------------------===//
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279 // Absolute and Negation
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280 //===----------------------------------------------------------------------===//
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281
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282 def : InstRW<[FXU, Lat2], (instregex "LP(G)?R$")>;
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283 def : InstRW<[FXU, FXU, Lat3, GroupAlone], (instregex "L(N|P)GFR$")>;
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284 def : InstRW<[FXU, Lat2], (instregex "LN(R|GR)$")>;
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285 def : InstRW<[FXU], (instregex "LC(R|GR)$")>;
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286 def : InstRW<[FXU, FXU, Lat2, GroupAlone], (instregex "LCGFR$")>;
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287
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288 //===----------------------------------------------------------------------===//
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289 // Insertion
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290 //===----------------------------------------------------------------------===//
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291
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292 def : InstRW<[FXU, LSU, Lat5], (instregex "IC(Y)?$")>;
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293 def : InstRW<[FXU, LSU, Lat5], (instregex "IC32(Y)?$")>;
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294 def : InstRW<[FXU, LSU, Lat5], (instregex "ICM(H|Y)?$")>;
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295 def : InstRW<[FXU], (instregex "II(F|H|L)Mux$")>;
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296 def : InstRW<[FXU], (instregex "IIHF(64)?$")>;
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297 def : InstRW<[FXU], (instregex "IIHH(64)?$")>;
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298 def : InstRW<[FXU], (instregex "IIHL(64)?$")>;
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299 def : InstRW<[FXU], (instregex "IILF(64)?$")>;
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300 def : InstRW<[FXU], (instregex "IILH(64)?$")>;
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301 def : InstRW<[FXU], (instregex "IILL(64)?$")>;
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302
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303 //===----------------------------------------------------------------------===//
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304 // Addition
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305 //===----------------------------------------------------------------------===//
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306
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121
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307 def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?(Y|SI)?$")>;
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120
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308 def : InstRW<[FXU, LSU, Lat6], (instregex "AH(Y)?$")>;
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309 def : InstRW<[FXU], (instregex "AIH$")>;
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310 def : InstRW<[FXU], (instregex "AFI(Mux)?$")>;
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311 def : InstRW<[FXU], (instregex "AGFI$")>;
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312 def : InstRW<[FXU], (instregex "AGHI(K)?$")>;
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313 def : InstRW<[FXU], (instregex "AGR(K)?$")>;
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314 def : InstRW<[FXU], (instregex "AHI(K)?$")>;
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315 def : InstRW<[FXU], (instregex "AHIMux(K)?$")>;
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316 def : InstRW<[FXU], (instregex "AL(FI|HSIK)$")>;
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121
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317 def : InstRW<[FXU, LSU, Lat5], (instregex "ALGF$")>;
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120
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318 def : InstRW<[FXU], (instregex "ALGHSIK$")>;
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319 def : InstRW<[FXU], (instregex "ALGF(I|R)$")>;
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320 def : InstRW<[FXU], (instregex "ALGR(K)?$")>;
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321 def : InstRW<[FXU], (instregex "ALR(K)?$")>;
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322 def : InstRW<[FXU], (instregex "AR(K)?$")>;
|
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121
|
323 def : InstRW<[FXU], (instregex "A(L)?HHHR$")>;
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324 def : InstRW<[FXU, Lat2], (instregex "A(L)?HHLR$")>;
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325 def : InstRW<[FXU], (instregex "ALSIH(N)?$")>;
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326 def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?G(SI)?$")>;
|
|
120
|
327
|
|
|
328 // Logical addition with carry
|
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329 def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "ALC(G)?$")>;
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330 def : InstRW<[FXU, Lat3, GroupAlone], (instregex "ALC(G)?R$")>;
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331
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|
332 // Add with sign extension (32 -> 64)
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333 def : InstRW<[FXU, LSU, Lat6], (instregex "AGF$")>;
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334 def : InstRW<[FXU, Lat2], (instregex "AGFR$")>;
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335
|
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336 //===----------------------------------------------------------------------===//
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|
337 // Subtraction
|
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338 //===----------------------------------------------------------------------===//
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339
|
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340 def : InstRW<[FXU, LSU, Lat5], (instregex "S(G|Y)?$")>;
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341 def : InstRW<[FXU, LSU, Lat6], (instregex "SH(Y)?$")>;
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342 def : InstRW<[FXU], (instregex "SGR(K)?$")>;
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343 def : InstRW<[FXU], (instregex "SLFI$")>;
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344 def : InstRW<[FXU, LSU, Lat5], (instregex "SL(G|GF|Y)?$")>;
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345 def : InstRW<[FXU], (instregex "SLGF(I|R)$")>;
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346 def : InstRW<[FXU], (instregex "SLGR(K)?$")>;
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347 def : InstRW<[FXU], (instregex "SLR(K)?$")>;
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348 def : InstRW<[FXU], (instregex "SR(K)?$")>;
|
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121
|
349 def : InstRW<[FXU], (instregex "S(L)?HHHR$")>;
|
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350 def : InstRW<[FXU, Lat2], (instregex "S(L)?HHLR$")>;
|
|
120
|
351
|
|
|
352 // Subtraction with borrow
|
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353 def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "SLB(G)?$")>;
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354 def : InstRW<[FXU, Lat3, GroupAlone], (instregex "SLB(G)?R$")>;
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355
|
|
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356 // Subtraction with sign extension (32 -> 64)
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357 def : InstRW<[FXU, LSU, Lat6], (instregex "SGF$")>;
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358 def : InstRW<[FXU, Lat2], (instregex "SGFR$")>;
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359
|
|
|
360 //===----------------------------------------------------------------------===//
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|
361 // AND
|
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|
362 //===----------------------------------------------------------------------===//
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363
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364 def : InstRW<[FXU, LSU, Lat5], (instregex "N(G|Y)?$")>;
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365 def : InstRW<[FXU], (instregex "NGR(K)?$")>;
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366 def : InstRW<[FXU], (instregex "NI(FMux|HMux|LMux)$")>;
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367 def : InstRW<[FXU, LSU, Lat5], (instregex "NI(Y)?$")>;
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368 def : InstRW<[FXU], (instregex "NIHF(64)?$")>;
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369 def : InstRW<[FXU], (instregex "NIHH(64)?$")>;
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370 def : InstRW<[FXU], (instregex "NIHL(64)?$")>;
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371 def : InstRW<[FXU], (instregex "NILF(64)?$")>;
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372 def : InstRW<[FXU], (instregex "NILH(64)?$")>;
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373 def : InstRW<[FXU], (instregex "NILL(64)?$")>;
|
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|
374 def : InstRW<[FXU], (instregex "NR(K)?$")>;
|
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|
375 def : InstRW<[LSU, LSU, FXU, Lat9, GroupAlone], (instregex "NC$")>;
|
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376
|
|
|
377 //===----------------------------------------------------------------------===//
|
|
|
378 // OR
|
|
|
379 //===----------------------------------------------------------------------===//
|
|
|
380
|
|
|
381 def : InstRW<[FXU, LSU, Lat5], (instregex "O(G|Y)?$")>;
|
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|
382 def : InstRW<[FXU], (instregex "OGR(K)?$")>;
|
|
|
383 def : InstRW<[FXU, LSU, Lat5], (instregex "OI(Y)?$")>;
|
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|
384 def : InstRW<[FXU], (instregex "OI(FMux|HMux|LMux)$")>;
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|
|
385 def : InstRW<[FXU], (instregex "OIHF(64)?$")>;
|
|
|
386 def : InstRW<[FXU], (instregex "OIHH(64)?$")>;
|
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|
387 def : InstRW<[FXU], (instregex "OIHL(64)?$")>;
|
|
|
388 def : InstRW<[FXU], (instregex "OILF(64)?$")>;
|
|
|
389 def : InstRW<[FXU], (instregex "OILH(64)?$")>;
|
|
|
390 def : InstRW<[FXU], (instregex "OILL(64)?$")>;
|
|
|
391 def : InstRW<[FXU], (instregex "OR(K)?$")>;
|
|
|
392 def : InstRW<[LSU, LSU, FXU, Lat9, GroupAlone], (instregex "OC$")>;
|
|
|
393
|
|
|
394 //===----------------------------------------------------------------------===//
|
|
|
395 // XOR
|
|
|
396 //===----------------------------------------------------------------------===//
|
|
|
397
|
|
|
398 def : InstRW<[FXU, LSU, Lat5], (instregex "X(G|Y)?$")>;
|
|
|
399 def : InstRW<[FXU, LSU, Lat5], (instregex "XI(Y)?$")>;
|
|
|
400 def : InstRW<[FXU], (instregex "XIFMux$")>;
|
|
|
401 def : InstRW<[FXU], (instregex "XGR(K)?$")>;
|
|
|
402 def : InstRW<[FXU], (instregex "XIHF(64)?$")>;
|
|
|
403 def : InstRW<[FXU], (instregex "XILF(64)?$")>;
|
|
|
404 def : InstRW<[FXU], (instregex "XR(K)?$")>;
|
|
|
405 def : InstRW<[LSU, LSU, FXU, Lat9, GroupAlone], (instregex "XC$")>;
|
|
|
406
|
|
|
407 //===----------------------------------------------------------------------===//
|
|
|
408 // Multiplication
|
|
|
409 //===----------------------------------------------------------------------===//
|
|
|
410
|
|
|
411 def : InstRW<[FXU, LSU, Lat10], (instregex "MS(GF|Y)?$")>;
|
|
|
412 def : InstRW<[FXU, Lat6], (instregex "MS(R|FI)$")>;
|
|
|
413 def : InstRW<[FXU, LSU, Lat12], (instregex "MSG$")>;
|
|
|
414 def : InstRW<[FXU, Lat8], (instregex "MSGR$")>;
|
|
|
415 def : InstRW<[FXU, Lat6], (instregex "MSGF(I|R)$")>;
|
|
121
|
416 def : InstRW<[FXU, FXU, LSU, Lat15, GroupAlone], (instregex "MLG$")>;
|
|
|
417 def : InstRW<[FXU, FXU, Lat9, GroupAlone], (instregex "MLGR$")>;
|
|
120
|
418 def : InstRW<[FXU, Lat5], (instregex "MGHI$")>;
|
|
|
419 def : InstRW<[FXU, Lat5], (instregex "MHI$")>;
|
|
|
420 def : InstRW<[FXU, LSU, Lat9], (instregex "MH(Y)?$")>;
|
|
121
|
421 def : InstRW<[FXU, FXU, Lat7, GroupAlone], (instregex "M(L)?R$")>;
|
|
|
422 def : InstRW<[FXU, FXU, LSU, Lat7, GroupAlone], (instregex "M(FY|L)?$")>;
|
|
120
|
423
|
|
|
424 //===----------------------------------------------------------------------===//
|
|
|
425 // Division and remainder
|
|
|
426 //===----------------------------------------------------------------------===//
|
|
|
427
|
|
121
|
428 def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
|
|
|
429 (instregex "DR$")>;
|
|
|
430 def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
|
|
|
431 (instregex "D$")>;
|
|
120
|
432 def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
|
|
|
433 (instregex "DSG(F)?R$")>;
|
|
|
434 def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, Lat30, GroupAlone],
|
|
|
435 (instregex "DSG(F)?$")>;
|
|
|
436 def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
|
|
|
437 (instregex "DL(G)?R$")>;
|
|
|
438 def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
|
|
|
439 (instregex "DL(G)?$")>;
|
|
|
440
|
|
|
441 //===----------------------------------------------------------------------===//
|
|
|
442 // Shifts
|
|
|
443 //===----------------------------------------------------------------------===//
|
|
|
444
|
|
|
445 def : InstRW<[FXU], (instregex "SLL(G|K)?$")>;
|
|
|
446 def : InstRW<[FXU], (instregex "SRL(G|K)?$")>;
|
|
|
447 def : InstRW<[FXU], (instregex "SRA(G|K)?$")>;
|
|
121
|
448 def : InstRW<[FXU], (instregex "SLA(G|K)?$")>;
|
|
|
449 def : InstRW<[FXU, FXU, FXU, FXU, LSU, Lat8, GroupAlone],
|
|
|
450 (instregex "S(L|R)D(A|L)$")>;
|
|
120
|
451
|
|
|
452 // Rotate
|
|
|
453 def : InstRW<[FXU, LSU, Lat6], (instregex "RLL(G)?$")>;
|
|
|
454
|
|
|
455 // Rotate and insert
|
|
|
456 def : InstRW<[FXU], (instregex "RISBG(N|32)?$")>;
|
|
|
457 def : InstRW<[FXU], (instregex "RISBH(G|H|L)$")>;
|
|
|
458 def : InstRW<[FXU], (instregex "RISBL(G|H|L)$")>;
|
|
|
459 def : InstRW<[FXU], (instregex "RISBMux$")>;
|
|
|
460
|
|
|
461 // Rotate and Select
|
|
|
462 def : InstRW<[FXU, FXU, Lat3, GroupAlone], (instregex "R(N|O|X)SBG$")>;
|
|
|
463
|
|
|
464 //===----------------------------------------------------------------------===//
|
|
|
465 // Comparison
|
|
|
466 //===----------------------------------------------------------------------===//
|
|
|
467
|
|
|
468 def : InstRW<[FXU, LSU, Lat5], (instregex "C(G|Y|Mux|RL)?$")>;
|
|
121
|
469 def : InstRW<[FXU], (instregex "C(F|H)I(Mux)?$")>;
|
|
120
|
470 def : InstRW<[FXU], (instregex "CG(F|H)I$")>;
|
|
|
471 def : InstRW<[FXU, LSU, Lat5], (instregex "CG(HSI|RL)$")>;
|
|
|
472 def : InstRW<[FXU], (instregex "C(G)?R$")>;
|
|
121
|
473 def : InstRW<[FXU], (instregex "CIH$")>;
|
|
120
|
474 def : InstRW<[FXU, LSU, Lat5], (instregex "CH(F|SI)$")>;
|
|
|
475 def : InstRW<[FXU, LSU, Lat5], (instregex "CL(Y|Mux|FHSI)?$")>;
|
|
|
476 def : InstRW<[FXU], (instregex "CLFI(Mux)?$")>;
|
|
|
477 def : InstRW<[FXU, LSU, Lat5], (instregex "CLG(HRL|HSI)?$")>;
|
|
|
478 def : InstRW<[FXU, LSU, Lat5], (instregex "CLGF(RL)?$")>;
|
|
|
479 def : InstRW<[FXU], (instregex "CLGF(I|R)$")>;
|
|
|
480 def : InstRW<[FXU], (instregex "CLGR$")>;
|
|
|
481 def : InstRW<[FXU, LSU, Lat5], (instregex "CLGRL$")>;
|
|
|
482 def : InstRW<[FXU, LSU, Lat5], (instregex "CLH(F|RL|HSI)$")>;
|
|
|
483 def : InstRW<[FXU], (instregex "CLIH$")>;
|
|
|
484 def : InstRW<[FXU, LSU, Lat5], (instregex "CLI(Y)?$")>;
|
|
|
485 def : InstRW<[FXU], (instregex "CLR$")>;
|
|
|
486 def : InstRW<[FXU, LSU, Lat5], (instregex "CLRL$")>;
|
|
121
|
487 def : InstRW<[FXU], (instregex "C(L)?HHR$")>;
|
|
|
488 def : InstRW<[FXU, Lat2], (instregex "C(L)?HLR$")>;
|
|
120
|
489
|
|
|
490 // Compare halfword
|
|
|
491 def : InstRW<[FXU, LSU, Lat6], (instregex "CH(Y|RL)?$")>;
|
|
|
492 def : InstRW<[FXU, LSU, Lat6], (instregex "CGH(RL)?$")>;
|
|
|
493 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "CHHSI$")>;
|
|
|
494
|
|
|
495 // Compare with sign extension (32 -> 64)
|
|
|
496 def : InstRW<[FXU, LSU, Lat6], (instregex "CGF(RL)?$")>;
|
|
|
497 def : InstRW<[FXU, Lat2], (instregex "CGFR$")>;
|
|
|
498
|
|
|
499 // Compare logical character
|
|
|
500 def : InstRW<[FXU, LSU, LSU, Lat9, GroupAlone], (instregex "CLC$")>;
|
|
121
|
501 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "CLCL(E|U)?$")>;
|
|
120
|
502 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "CLST$")>;
|
|
|
503
|
|
|
504 // Test under mask
|
|
|
505 def : InstRW<[FXU, LSU, Lat5], (instregex "TM(Y)?$")>;
|
|
|
506 def : InstRW<[FXU], (instregex "TM(H|L)Mux$")>;
|
|
|
507 def : InstRW<[FXU], (instregex "TMHH(64)?$")>;
|
|
|
508 def : InstRW<[FXU], (instregex "TMHL(64)?$")>;
|
|
|
509 def : InstRW<[FXU], (instregex "TMLH(64)?$")>;
|
|
|
510 def : InstRW<[FXU], (instregex "TMLL(64)?$")>;
|
|
|
511
|
|
121
|
512 // Compare logical characters under mask
|
|
|
513 def : InstRW<[FXU, LSU, Lat5], (instregex "CLM(H|Y)?$")>;
|
|
|
514
|
|
120
|
515 //===----------------------------------------------------------------------===//
|
|
121
|
516 // Prefetch and execution hint
|
|
120
|
517 //===----------------------------------------------------------------------===//
|
|
|
518
|
|
|
519 def : InstRW<[LSU], (instregex "PFD(RL)?$")>;
|
|
121
|
520 def : InstRW<[LSU], (instregex "BP(R)?P$")>;
|
|
|
521 def : InstRW<[FXU], (instregex "NIAI$")>;
|
|
120
|
522
|
|
|
523 //===----------------------------------------------------------------------===//
|
|
|
524 // Atomic operations
|
|
|
525 //===----------------------------------------------------------------------===//
|
|
|
526
|
|
|
527 def : InstRW<[LSU, EndGroup], (instregex "Serialize$")>;
|
|
|
528
|
|
|
529 def : InstRW<[FXU, LSU, Lat5], (instregex "LAA(G)?$")>;
|
|
|
530 def : InstRW<[FXU, LSU, Lat5], (instregex "LAAL(G)?$")>;
|
|
|
531 def : InstRW<[FXU, LSU, Lat5], (instregex "LAN(G)?$")>;
|
|
|
532 def : InstRW<[FXU, LSU, Lat5], (instregex "LAO(G)?$")>;
|
|
|
533 def : InstRW<[FXU, LSU, Lat5], (instregex "LAX(G)?$")>;
|
|
|
534
|
|
121
|
535 // Test and set
|
|
|
536 def : InstRW<[FXU, LSU, Lat5, EndGroup], (instregex "TS$")>;
|
|
|
537
|
|
120
|
538 // Compare and swap
|
|
|
539 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "CS(G|Y)?$")>;
|
|
|
540
|
|
121
|
541 // Compare double and swap
|
|
|
542 def : InstRW<[FXU, FXU, FXU, FXU, FXU, LSU, Lat10, GroupAlone],
|
|
|
543 (instregex "CDS(Y)?$")>;
|
|
|
544 def : InstRW<[FXU, FXU, FXU, FXU, FXU, FXU, LSU, LSU, Lat12, GroupAlone],
|
|
|
545 (instregex "CDSG$")>;
|
|
|
546
|
|
|
547 // Compare and swap and store
|
|
|
548 def : InstRW<[FXU, LSU, Lat30], (instregex "CSST$")>;
|
|
|
549
|
|
|
550 // Perform locked operation
|
|
|
551 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "PLO$")>;
|
|
|
552
|
|
|
553 // Load/store pair from/to quadword
|
|
|
554 def : InstRW<[LSU, LSU, Lat5, GroupAlone], (instregex "LPQ$")>;
|
|
|
555 def : InstRW<[FXU, FXU, LSU, LSU, Lat6, GroupAlone], (instregex "STPQ$")>;
|
|
|
556
|
|
|
557 // Load pair disjoint
|
|
|
558 def : InstRW<[LSU, LSU, Lat5, GroupAlone], (instregex "LPD(G)?$")>;
|
|
|
559
|
|
|
560 //===----------------------------------------------------------------------===//
|
|
|
561 // Translate and convert
|
|
|
562 //===----------------------------------------------------------------------===//
|
|
|
563
|
|
|
564 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "TR$")>;
|
|
|
565 def : InstRW<[FXU, FXU, FXU, LSU, LSU, Lat30, GroupAlone], (instregex "TRT$")>;
|
|
|
566 def : InstRW<[FXU, LSU, Lat30], (instregex "TRTR$")>;
|
|
|
567 def : InstRW<[FXU, Lat30], (instregex "TR(TR)?(T)?(E|EOpt)?$")>;
|
|
|
568 def : InstRW<[LSU, Lat30], (instregex "TR(T|O)(T|O)(Opt)?$")>;
|
|
|
569 def : InstRW<[FXU, Lat30], (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
|
|
|
570 def : InstRW<[FXU, Lat30], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
|
|
|
571
|
|
|
572 //===----------------------------------------------------------------------===//
|
|
|
573 // Message-security assist
|
|
|
574 //===----------------------------------------------------------------------===//
|
|
|
575
|
|
|
576 def : InstRW<[FXU, Lat30], (instregex "KM(C|F|O|CTR)?$")>;
|
|
|
577 def : InstRW<[FXU, Lat30], (instregex "(KIMD|KLMD|KMAC|PCC)$")>;
|
|
|
578
|
|
|
579 //===----------------------------------------------------------------------===//
|
|
|
580 // Decimal arithmetic
|
|
|
581 //===----------------------------------------------------------------------===//
|
|
|
582
|
|
|
583 def : InstRW<[FXU, DFU2, LSU, LSU, Lat30, GroupAlone], (instregex "CVBG$")>;
|
|
|
584 def : InstRW<[FXU, DFU, LSU, Lat30, GroupAlone], (instregex "CVB(Y)?$")>;
|
|
|
585 def : InstRW<[FXU, FXU, FXU, DFU2, DFU2, LSU, Lat30, GroupAlone],
|
|
|
586 (instregex "CVDG$")>;
|
|
|
587 def : InstRW<[FXU, FXU, DFU, LSU, Lat30, GroupAlone], (instregex "CVD(Y)?$")>;
|
|
|
588 def : InstRW<[LSU, Lat10, GroupAlone], (instregex "MVO$")>;
|
|
|
589 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MV(N|Z)$")>;
|
|
|
590 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
|
|
|
591 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "UNPK$")>;
|
|
|
592 def : InstRW<[LSU, Lat12, GroupAlone], (instregex "UNPK(A|U)$")>;
|
|
|
593
|
|
|
594 def : InstRW<[FXU, DFU2, DFU2, LSU, LSU, Lat15, GroupAlone],
|
|
|
595 (instregex "(A|S|ZA)P$")>;
|
|
|
596 def : InstRW<[FXU, DFU2, DFU2, LSU, LSU, Lat30, GroupAlone],
|
|
|
597 (instregex "(M|D)P$")>;
|
|
|
598 def : InstRW<[FXU, FXU, DFU2, DFU2, LSU, LSU, LSU, Lat15, GroupAlone],
|
|
|
599 (instregex "SRP$")>;
|
|
|
600 def : InstRW<[DFU2, DFU2, LSU, LSU, Lat11, GroupAlone], (instregex "CP$")>;
|
|
|
601 def : InstRW<[DFU2, LSU, LSU, Lat5, GroupAlone], (instregex "TP$")>;
|
|
|
602 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "ED(MK)?$")>;
|
|
|
603
|
|
120
|
604 //===----------------------------------------------------------------------===//
|
|
|
605 // Access registers
|
|
|
606 //===----------------------------------------------------------------------===//
|
|
|
607
|
|
|
608 // Extract/set/copy access register
|
|
|
609 def : InstRW<[LSU], (instregex "(EAR|SAR|CPYA)$")>;
|
|
|
610
|
|
|
611 // Load address extended
|
|
|
612 def : InstRW<[LSU, FXU, Lat5, GroupAlone], (instregex "LAE(Y)?$")>;
|
|
|
613
|
|
|
614 // Load/store access multiple (not modeled precisely)
|
|
|
615 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(L|ST)AM(Y)?$")>;
|
|
|
616
|
|
|
617 //===----------------------------------------------------------------------===//
|
|
|
618 // Program mask and addressing mode
|
|
|
619 //===----------------------------------------------------------------------===//
|
|
|
620
|
|
|
621 // Insert Program Mask
|
|
|
622 def : InstRW<[FXU, Lat3, EndGroup], (instregex "IPM$")>;
|
|
|
623
|
|
|
624 // Set Program Mask
|
|
|
625 def : InstRW<[LSU, EndGroup], (instregex "SPM$")>;
|
|
|
626
|
|
|
627 // Branch and link
|
|
|
628 def : InstRW<[FXU, FXU, LSU, Lat8, GroupAlone], (instregex "BAL(R)?$")>;
|
|
|
629
|
|
|
630 // Test addressing mode
|
|
|
631 def : InstRW<[FXU], (instregex "TAM$")>;
|
|
|
632
|
|
|
633 // Set addressing mode
|
|
|
634 def : InstRW<[LSU, EndGroup], (instregex "SAM(24|31|64)$")>;
|
|
|
635
|
|
|
636 // Branch (and save) and set mode.
|
|
|
637 def : InstRW<[FXU, LSU, Lat5, GroupAlone], (instregex "BSM$")>;
|
|
|
638 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "BASSM$")>;
|
|
|
639
|
|
|
640 //===----------------------------------------------------------------------===//
|
|
|
641 // Transactional execution
|
|
|
642 //===----------------------------------------------------------------------===//
|
|
|
643
|
|
|
644 // Transaction begin
|
|
|
645 def : InstRW<[LSU, LSU, FXU, FXU, FXU, FXU, FXU, Lat15, GroupAlone],
|
|
|
646 (instregex "TBEGIN(C|_nofloat)?$")>;
|
|
|
647
|
|
|
648 // Transaction end
|
|
|
649 def : InstRW<[LSU, GroupAlone], (instregex "TEND$")>;
|
|
|
650
|
|
|
651 // Transaction abort
|
|
|
652 def : InstRW<[LSU, GroupAlone], (instregex "TABORT$")>;
|
|
|
653
|
|
|
654 // Extract Transaction Nesting Depth
|
|
|
655 def : InstRW<[FXU], (instregex "ETND$")>;
|
|
|
656
|
|
|
657 // Nontransactional store
|
|
|
658 def : InstRW<[FXU, LSU, Lat5], (instregex "NTSTG$")>;
|
|
|
659
|
|
|
660 //===----------------------------------------------------------------------===//
|
|
|
661 // Processor assist
|
|
|
662 //===----------------------------------------------------------------------===//
|
|
|
663
|
|
|
664 def : InstRW<[FXU], (instregex "PPA$")>;
|
|
|
665
|
|
|
666 //===----------------------------------------------------------------------===//
|
|
|
667 // Miscellaneous Instructions.
|
|
|
668 //===----------------------------------------------------------------------===//
|
|
|
669
|
|
|
670 // Find leftmost one
|
|
121
|
671 def : InstRW<[FXU, FXU, Lat7, GroupAlone], (instregex "FLOGR$")>;
|
|
120
|
672
|
|
|
673 // Population count
|
|
|
674 def : InstRW<[FXU, Lat3], (instregex "POPCNT$")>;
|
|
|
675
|
|
|
676 // Extend
|
|
121
|
677 def : InstRW<[FXU], (instregex "AEXT128$")>;
|
|
|
678 def : InstRW<[FXU], (instregex "ZEXT128$")>;
|
|
120
|
679
|
|
|
680 // String instructions
|
|
|
681 def : InstRW<[FXU, LSU, Lat30], (instregex "SRST$")>;
|
|
121
|
682 def : InstRW<[FXU, Lat30], (instregex "SRSTU$")>;
|
|
|
683 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "CUSE$")>;
|
|
120
|
684
|
|
121
|
685 // Various complex instructions
|
|
|
686 def : InstRW<[LSU, Lat30], (instregex "CFC$")>;
|
|
|
687 def : InstRW<[FXU, LSU, Lat30], (instregex "UPT$")>;
|
|
|
688 def : InstRW<[LSU, Lat30], (instregex "CKSM$")>;
|
|
|
689 def : InstRW<[FXU, Lat30], (instregex "CMPSC$")>;
|
|
120
|
690
|
|
|
691 // Execute
|
|
|
692 def : InstRW<[LSU, GroupAlone], (instregex "EX(RL)?$")>;
|
|
|
693
|
|
|
694 //===----------------------------------------------------------------------===//
|
|
|
695 // .insn directive instructions
|
|
|
696 //===----------------------------------------------------------------------===//
|
|
|
697
|
|
|
698 // An "empty" sched-class will be assigned instead of the "invalid sched-class".
|
|
|
699 // getNumDecoderSlots() will then return 1 instead of 0.
|
|
|
700 def : InstRW<[], (instregex "Insn.*")>;
|
|
|
701
|
|
|
702
|
|
|
703 // ----------------------------- Floating point ----------------------------- //
|
|
|
704
|
|
|
705 //===----------------------------------------------------------------------===//
|
|
|
706 // FP: Select instructions
|
|
|
707 //===----------------------------------------------------------------------===//
|
|
|
708
|
|
|
709 def : InstRW<[FXU], (instregex "SelectF(32|64|128)$")>;
|
|
|
710 def : InstRW<[FXU], (instregex "CondStoreF32(Inv)?$")>;
|
|
|
711 def : InstRW<[FXU], (instregex "CondStoreF64(Inv)?$")>;
|
|
|
712
|
|
|
713 //===----------------------------------------------------------------------===//
|
|
|
714 // FP: Move instructions
|
|
|
715 //===----------------------------------------------------------------------===//
|
|
|
716
|
|
|
717 // Load zero
|
|
|
718 def : InstRW<[FXU], (instregex "LZ(DR|ER)$")>;
|
|
|
719 def : InstRW<[FXU, FXU, Lat2, GroupAlone], (instregex "LZXR$")>;
|
|
|
720
|
|
|
721 // Load
|
|
|
722 def : InstRW<[FXU], (instregex "LER$")>;
|
|
|
723 def : InstRW<[FXU], (instregex "LD(R|R32|GR)$")>;
|
|
|
724 def : InstRW<[FXU, Lat3], (instregex "LGDR$")>;
|
|
|
725 def : InstRW<[FXU, FXU, Lat2, GroupAlone], (instregex "LXR$")>;
|
|
|
726
|
|
|
727 // Load and Test
|
|
|
728 def : InstRW<[FPU], (instregex "LT(D|E)BR$")>;
|
|
|
729 def : InstRW<[FPU], (instregex "LTEBRCompare(_VecPseudo)?$")>;
|
|
|
730 def : InstRW<[FPU], (instregex "LTDBRCompare(_VecPseudo)?$")>;
|
|
|
731 def : InstRW<[FPU2, FPU2, Lat9, GroupAlone], (instregex "LTXBR$")>;
|
|
|
732 def : InstRW<[FPU2, FPU2, Lat9, GroupAlone],
|
|
|
733 (instregex "LTXBRCompare(_VecPseudo)?$")>;
|
|
|
734
|
|
|
735 // Copy sign
|
|
|
736 def : InstRW<[FXU, FXU, Lat5, GroupAlone], (instregex "CPSDRd(d|s)$")>;
|
|
|
737 def : InstRW<[FXU, FXU, Lat5, GroupAlone], (instregex "CPSDRs(d|s)$")>;
|
|
|
738
|
|
|
739 //===----------------------------------------------------------------------===//
|
|
|
740 // FP: Load instructions
|
|
|
741 //===----------------------------------------------------------------------===//
|
|
|
742
|
|
|
743 def : InstRW<[LSU], (instregex "LE(Y)?$")>;
|
|
|
744 def : InstRW<[LSU], (instregex "LD(Y|E32)?$")>;
|
|
|
745 def : InstRW<[LSU], (instregex "LX$")>;
|
|
|
746
|
|
|
747 //===----------------------------------------------------------------------===//
|
|
|
748 // FP: Store instructions
|
|
|
749 //===----------------------------------------------------------------------===//
|
|
|
750
|
|
|
751 def : InstRW<[FXU, LSU, Lat7], (instregex "STD(Y)?$")>;
|
|
|
752 def : InstRW<[FXU, LSU, Lat7], (instregex "STE(Y)?$")>;
|
|
|
753 def : InstRW<[FXU, LSU, Lat5], (instregex "STX$")>;
|
|
|
754
|
|
|
755 //===----------------------------------------------------------------------===//
|
|
|
756 // FP: Conversion instructions
|
|
|
757 //===----------------------------------------------------------------------===//
|
|
|
758
|
|
|
759 // Load rounded
|
|
|
760 def : InstRW<[FPU], (instregex "LEDBR(A)?$")>;
|
|
|
761 def : InstRW<[FPU, FPU, Lat20], (instregex "LEXBR(A)?$")>;
|
|
|
762 def : InstRW<[FPU, FPU, Lat20], (instregex "LDXBR(A)?$")>;
|
|
|
763
|
|
|
764 // Load lengthened
|
|
|
765 def : InstRW<[FPU, LSU, Lat12], (instregex "LDEB$")>;
|
|
|
766 def : InstRW<[FPU], (instregex "LDEBR$")>;
|
|
|
767 def : InstRW<[FPU2, FPU2, LSU, Lat15, GroupAlone], (instregex "LX(D|E)B$")>;
|
|
|
768 def : InstRW<[FPU2, FPU2, Lat10, GroupAlone], (instregex "LX(D|E)BR$")>;
|
|
|
769
|
|
|
770 // Convert from fixed / logical
|
|
|
771 def : InstRW<[FXU, FPU, Lat9, GroupAlone], (instregex "CE(F|G)BR(A?)$")>;
|
|
|
772 def : InstRW<[FXU, FPU, Lat9, GroupAlone], (instregex "CD(F|G)BR(A?)$")>;
|
|
|
773 def : InstRW<[FXU, FPU2, FPU2, Lat11, GroupAlone], (instregex "CX(F|G)BR(A?)$")>;
|
|
|
774 def : InstRW<[FXU, FPU, Lat9, GroupAlone], (instregex "CEL(F|G)BR$")>;
|
|
|
775 def : InstRW<[FXU, FPU, Lat9, GroupAlone], (instregex "CDL(F|G)BR$")>;
|
|
|
776 def : InstRW<[FXU, FPU2, FPU2, Lat11, GroupAlone], (instregex "CXL(F|G)BR$")>;
|
|
|
777
|
|
|
778 // Convert to fixed / logical
|
|
|
779 def : InstRW<[FXU, FPU, Lat12, GroupAlone], (instregex "CF(E|D)BR(A?)$")>;
|
|
|
780 def : InstRW<[FXU, FPU, Lat12, GroupAlone], (instregex "CG(E|D)BR(A?)$")>;
|
|
|
781 def : InstRW<[FXU, FPU, FPU, Lat20, GroupAlone], (instregex "C(F|G)XBR(A?)$")>;
|
|
|
782 def : InstRW<[FXU, FPU, Lat11, GroupAlone], (instregex "CLF(E|D)BR$")>;
|
|
|
783 def : InstRW<[FXU, FPU, Lat11, GroupAlone], (instregex "CLG(E|D)BR$")>;
|
|
|
784 def : InstRW<[FXU, FPU, FPU, Lat20, GroupAlone], (instregex "CL(F|G)XBR$")>;
|
|
|
785
|
|
|
786 //===----------------------------------------------------------------------===//
|
|
|
787 // FP: Unary arithmetic
|
|
|
788 //===----------------------------------------------------------------------===//
|
|
|
789
|
|
|
790 // Load Complement / Negative / Positive
|
|
|
791 def : InstRW<[FPU], (instregex "L(C|N|P)DBR$")>;
|
|
|
792 def : InstRW<[FPU], (instregex "L(C|N|P)EBR$")>;
|
|
|
793 def : InstRW<[FXU], (instregex "LCDFR(_32)?$")>;
|
|
|
794 def : InstRW<[FXU], (instregex "LNDFR(_32)?$")>;
|
|
|
795 def : InstRW<[FXU], (instregex "LPDFR(_32)?$")>;
|
|
|
796 def : InstRW<[FPU2, FPU2, Lat9, GroupAlone], (instregex "L(C|N|P)XBR$")>;
|
|
|
797
|
|
|
798 // Square root
|
|
|
799 def : InstRW<[FPU, LSU, Lat30], (instregex "SQ(E|D)B$")>;
|
|
|
800 def : InstRW<[FPU, Lat30], (instregex "SQ(E|D)BR$")>;
|
|
|
801 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "SQXBR$")>;
|
|
|
802
|
|
|
803 // Load FP integer
|
|
|
804 def : InstRW<[FPU], (instregex "FIEBR(A)?$")>;
|
|
|
805 def : InstRW<[FPU], (instregex "FIDBR(A)?$")>;
|
|
|
806 def : InstRW<[FPU2, FPU2, Lat15, GroupAlone], (instregex "FIXBR(A)?$")>;
|
|
|
807
|
|
|
808 //===----------------------------------------------------------------------===//
|
|
|
809 // FP: Binary arithmetic
|
|
|
810 //===----------------------------------------------------------------------===//
|
|
|
811
|
|
|
812 // Addition
|
|
|
813 def : InstRW<[FPU, LSU, Lat12], (instregex "A(E|D)B$")>;
|
|
|
814 def : InstRW<[FPU], (instregex "A(E|D)BR$")>;
|
|
|
815 def : InstRW<[FPU2, FPU2, Lat20, GroupAlone], (instregex "AXBR$")>;
|
|
|
816
|
|
|
817 // Subtraction
|
|
|
818 def : InstRW<[FPU, LSU, Lat12], (instregex "S(E|D)B$")>;
|
|
|
819 def : InstRW<[FPU], (instregex "S(E|D)BR$")>;
|
|
|
820 def : InstRW<[FPU2, FPU2, Lat20, GroupAlone], (instregex "SXBR$")>;
|
|
|
821
|
|
|
822 // Multiply
|
|
|
823 def : InstRW<[FPU, LSU, Lat12], (instregex "M(D|DE|EE)B$")>;
|
|
|
824 def : InstRW<[FPU], (instregex "M(D|DE|EE)BR$")>;
|
|
|
825 def : InstRW<[FPU2, FPU2, LSU, Lat15, GroupAlone], (instregex "MXDB$")>;
|
|
|
826 def : InstRW<[FPU2, FPU2, Lat10, GroupAlone], (instregex "MXDBR$")>;
|
|
|
827 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "MXBR$")>;
|
|
|
828
|
|
|
829 // Multiply and add / subtract
|
|
121
|
830 def : InstRW<[FPU, FPU, LSU, Lat12, GroupAlone], (instregex "M(A|S)EB$")>;
|
|
120
|
831 def : InstRW<[FPU, GroupAlone], (instregex "M(A|S)EBR$")>;
|
|
121
|
832 def : InstRW<[FPU, FPU, LSU, Lat12, GroupAlone], (instregex "M(A|S)DB$")>;
|
|
120
|
833 def : InstRW<[FPU, GroupAlone], (instregex "M(A|S)DBR$")>;
|
|
|
834
|
|
|
835 // Division
|
|
|
836 def : InstRW<[FPU, LSU, Lat30], (instregex "D(E|D)B$")>;
|
|
|
837 def : InstRW<[FPU, Lat30], (instregex "D(E|D)BR$")>;
|
|
|
838 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "DXBR$")>;
|
|
|
839
|
|
121
|
840 // Divide to integer
|
|
|
841 def : InstRW<[FPU, Lat30], (instregex "DI(E|D)BR$")>;
|
|
|
842
|
|
120
|
843 //===----------------------------------------------------------------------===//
|
|
|
844 // FP: Comparisons
|
|
|
845 //===----------------------------------------------------------------------===//
|
|
|
846
|
|
|
847 // Compare
|
|
121
|
848 def : InstRW<[FPU, LSU, Lat12], (instregex "(K|C)(E|D)B$")>;
|
|
|
849 def : InstRW<[FPU], (instregex "(K|C)(E|D)BR$")>;
|
|
|
850 def : InstRW<[FPU, FPU, Lat30], (instregex "(K|C)XBR$")>;
|
|
120
|
851
|
|
|
852 // Test Data Class
|
|
|
853 def : InstRW<[FPU, LSU, Lat15], (instregex "TC(E|D)B$")>;
|
|
|
854 def : InstRW<[FPU2, FPU2, LSU, Lat15, GroupAlone], (instregex "TCXB$")>;
|
|
|
855
|
|
121
|
856 //===----------------------------------------------------------------------===//
|
|
|
857 // FP: Floating-point control register instructions
|
|
|
858 //===----------------------------------------------------------------------===//
|
|
|
859
|
|
|
860 def : InstRW<[FXU, LSU, Lat4, GroupAlone], (instregex "EFPC$")>;
|
|
|
861 def : InstRW<[LSU, Lat3, GroupAlone], (instregex "SFPC$")>;
|
|
|
862 def : InstRW<[LSU, LSU, Lat6, GroupAlone], (instregex "LFPC$")>;
|
|
|
863 def : InstRW<[FXU, LSU, Lat3, GroupAlone], (instregex "STFPC$")>;
|
|
|
864 def : InstRW<[FXU, Lat30], (instregex "SFASR$")>;
|
|
|
865 def : InstRW<[FXU, LSU, Lat30], (instregex "LFAS$")>;
|
|
|
866 def : InstRW<[FXU, GroupAlone], (instregex "SRNM(B|T)?$")>;
|
|
|
867
|
|
|
868
|
|
|
869 // --------------------- Hexadecimal floating point ------------------------- //
|
|
|
870
|
|
|
871 //===----------------------------------------------------------------------===//
|
|
|
872 // HFP: Move instructions
|
|
|
873 //===----------------------------------------------------------------------===//
|
|
|
874
|
|
|
875 // Load and Test
|
|
|
876 def : InstRW<[FPU], (instregex "LT(D|E)R$")>;
|
|
|
877 def : InstRW<[FPU2, FPU2, Lat9, GroupAlone], (instregex "LTXR$")>;
|
|
|
878
|
|
|
879 //===----------------------------------------------------------------------===//
|
|
|
880 // HFP: Conversion instructions
|
|
|
881 //===----------------------------------------------------------------------===//
|
|
|
882
|
|
|
883 // Load rounded
|
|
|
884 def : InstRW<[FPU], (instregex "(LEDR|LRER)$")>;
|
|
|
885 def : InstRW<[FPU], (instregex "LEXR$")>;
|
|
|
886 def : InstRW<[FPU], (instregex "(LDXR|LRDR)$")>;
|
|
|
887
|
|
|
888 // Load lengthened
|
|
|
889 def : InstRW<[LSU], (instregex "LDE$")>;
|
|
|
890 def : InstRW<[FXU], (instregex "LDER$")>;
|
|
|
891 def : InstRW<[FPU2, FPU2, LSU, Lat15, GroupAlone], (instregex "LX(D|E)$")>;
|
|
|
892 def : InstRW<[FPU2, FPU2, Lat10, GroupAlone], (instregex "LX(D|E)R$")>;
|
|
|
893
|
|
|
894 // Convert from fixed
|
|
|
895 def : InstRW<[FXU, FPU, Lat9, GroupAlone], (instregex "CE(F|G)R$")>;
|
|
|
896 def : InstRW<[FXU, FPU, Lat9, GroupAlone], (instregex "CD(F|G)R$")>;
|
|
|
897 def : InstRW<[FXU, FPU2, FPU2, Lat11, GroupAlone], (instregex "CX(F|G)R$")>;
|
|
|
898
|
|
|
899 // Convert to fixed
|
|
|
900 def : InstRW<[FXU, FPU, Lat12, GroupAlone], (instregex "CF(E|D)R$")>;
|
|
|
901 def : InstRW<[FXU, FPU, Lat12, GroupAlone], (instregex "CG(E|D)R$")>;
|
|
|
902 def : InstRW<[FXU, FPU, FPU, Lat20, GroupAlone], (instregex "C(F|G)XR$")>;
|
|
|
903
|
|
|
904 // Convert BFP to HFP / HFP to BFP.
|
|
|
905 def : InstRW<[FPU], (instregex "THD(E)?R$")>;
|
|
|
906 def : InstRW<[FPU], (instregex "TB(E)?DR$")>;
|
|
|
907
|
|
|
908 //===----------------------------------------------------------------------===//
|
|
|
909 // HFP: Unary arithmetic
|
|
|
910 //===----------------------------------------------------------------------===//
|
|
|
911
|
|
|
912 // Load Complement / Negative / Positive
|
|
|
913 def : InstRW<[FPU], (instregex "L(C|N|P)DR$")>;
|
|
|
914 def : InstRW<[FPU], (instregex "L(C|N|P)ER$")>;
|
|
|
915 def : InstRW<[FPU2, FPU2, Lat9, GroupAlone], (instregex "L(C|N|P)XR$")>;
|
|
|
916
|
|
|
917 // Halve
|
|
|
918 def : InstRW<[FPU], (instregex "H(E|D)R$")>;
|
|
|
919
|
|
|
920 // Square root
|
|
|
921 def : InstRW<[FPU, LSU, Lat30], (instregex "SQ(E|D)$")>;
|
|
|
922 def : InstRW<[FPU, Lat30], (instregex "SQ(E|D)R$")>;
|
|
|
923 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "SQXR$")>;
|
|
|
924
|
|
|
925 // Load FP integer
|
|
|
926 def : InstRW<[FPU], (instregex "FIER$")>;
|
|
|
927 def : InstRW<[FPU], (instregex "FIDR$")>;
|
|
|
928 def : InstRW<[FPU2, FPU2, Lat15, GroupAlone], (instregex "FIXR$")>;
|
|
|
929
|
|
|
930 //===----------------------------------------------------------------------===//
|
|
|
931 // HFP: Binary arithmetic
|
|
|
932 //===----------------------------------------------------------------------===//
|
|
|
933
|
|
|
934 // Addition
|
|
|
935 def : InstRW<[FPU, LSU, Lat12], (instregex "A(E|D|U|W)$")>;
|
|
|
936 def : InstRW<[FPU], (instregex "A(E|D|U|W)R$")>;
|
|
|
937 def : InstRW<[FPU2, FPU2, Lat20, GroupAlone], (instregex "AXR$")>;
|
|
|
938
|
|
|
939 // Subtraction
|
|
|
940 def : InstRW<[FPU, LSU, Lat12], (instregex "S(E|D|U|W)$")>;
|
|
|
941 def : InstRW<[FPU], (instregex "S(E|D|U|W)R$")>;
|
|
|
942 def : InstRW<[FPU2, FPU2, Lat20, GroupAlone], (instregex "SXR$")>;
|
|
|
943
|
|
|
944 // Multiply
|
|
|
945 def : InstRW<[FPU, LSU, Lat12], (instregex "M(D|DE|E|EE)$")>;
|
|
|
946 def : InstRW<[FPU], (instregex "M(D|DE|E|EE)R$")>;
|
|
|
947 def : InstRW<[FPU2, FPU2, LSU, Lat15, GroupAlone], (instregex "MXD$")>;
|
|
|
948 def : InstRW<[FPU2, FPU2, Lat10, GroupAlone], (instregex "MXDR$")>;
|
|
|
949 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "MXR$")>;
|
|
|
950 def : InstRW<[FPU2, FPU2, LSU, Lat15, GroupAlone], (instregex "MY$")>;
|
|
|
951 def : InstRW<[FPU, FPU, LSU, Lat15, GroupAlone], (instregex "MY(H|L)$")>;
|
|
|
952 def : InstRW<[FPU2, FPU2, Lat10, GroupAlone], (instregex "MYR$")>;
|
|
|
953 def : InstRW<[FPU, Lat10, GroupAlone], (instregex "MY(H|L)R$")>;
|
|
|
954
|
|
|
955 // Multiply and add / subtract
|
|
|
956 def : InstRW<[FPU, FPU, LSU, Lat12, GroupAlone], (instregex "M(A|S)E$")>;
|
|
|
957 def : InstRW<[FPU, GroupAlone], (instregex "M(A|S)ER$")>;
|
|
|
958 def : InstRW<[FPU, FPU, LSU, Lat12, GroupAlone], (instregex "M(A|S)D$")>;
|
|
|
959 def : InstRW<[FPU, GroupAlone], (instregex "M(A|S)DR$")>;
|
|
|
960 def : InstRW<[FPU2, FPU2, LSU, GroupAlone], (instregex "MAY$")>;
|
|
|
961 def : InstRW<[FPU2, FPU2, GroupAlone], (instregex "MAYR$")>;
|
|
|
962 def : InstRW<[FPU, FPU, LSU, Lat12, GroupAlone], (instregex "MAY(H|L)$")>;
|
|
|
963 def : InstRW<[FPU, GroupAlone], (instregex "MAY(H|L)R$")>;
|
|
|
964
|
|
|
965 // Division
|
|
|
966 def : InstRW<[FPU, LSU, Lat30], (instregex "D(E|D)$")>;
|
|
|
967 def : InstRW<[FPU, Lat30], (instregex "D(E|D)R$")>;
|
|
|
968 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "DXR$")>;
|
|
|
969
|
|
|
970 //===----------------------------------------------------------------------===//
|
|
|
971 // HFP: Comparisons
|
|
|
972 //===----------------------------------------------------------------------===//
|
|
|
973
|
|
|
974 // Compare
|
|
|
975 def : InstRW<[FPU, LSU, Lat12], (instregex "C(E|D)$")>;
|
|
|
976 def : InstRW<[FPU], (instregex "C(E|D)R$")>;
|
|
|
977 def : InstRW<[FPU, FPU, Lat15], (instregex "CXR$")>;
|
|
|
978
|
|
|
979
|
|
|
980 // ------------------------ Decimal floating point -------------------------- //
|
|
|
981
|
|
|
982 //===----------------------------------------------------------------------===//
|
|
|
983 // DFP: Move instructions
|
|
|
984 //===----------------------------------------------------------------------===//
|
|
|
985
|
|
|
986 // Load and Test
|
|
|
987 def : InstRW<[DFU, Lat20], (instregex "LTDTR$")>;
|
|
|
988 def : InstRW<[DFU2, DFU2, Lat20, GroupAlone], (instregex "LTXTR$")>;
|
|
|
989
|
|
|
990 //===----------------------------------------------------------------------===//
|
|
|
991 // DFP: Conversion instructions
|
|
|
992 //===----------------------------------------------------------------------===//
|
|
|
993
|
|
|
994 // Load rounded
|
|
|
995 def : InstRW<[DFU, Lat30], (instregex "LEDTR$")>;
|
|
|
996 def : InstRW<[DFU, DFU, Lat30], (instregex "LDXTR$")>;
|
|
|
997
|
|
|
998 // Load lengthened
|
|
|
999 def : InstRW<[DFU, Lat20], (instregex "LDETR$")>;
|
|
|
1000 def : InstRW<[DFU2, DFU2, Lat20, GroupAlone], (instregex "LXDTR$")>;
|
|
|
1001
|
|
|
1002 // Convert from fixed / logical
|
|
|
1003 def : InstRW<[FXU, DFU, Lat9, GroupAlone], (instregex "CDFTR$")>;
|
|
|
1004 def : InstRW<[FXU, DFU, Lat30, GroupAlone], (instregex "CDGTR(A)?$")>;
|
|
|
1005 def : InstRW<[FXU, DFU2, DFU2, GroupAlone], (instregex "CXFTR$")>;
|
|
|
1006 def : InstRW<[FXU, DFU2, DFU2, Lat30, GroupAlone], (instregex "CXGTR(A)?$")>;
|
|
|
1007 def : InstRW<[FXU, DFU, Lat11, GroupAlone], (instregex "CDL(F|G)TR$")>;
|
|
|
1008 def : InstRW<[FXU, DFU2, DFU2, Lat11, GroupAlone], (instregex "CXLFTR$")>;
|
|
|
1009 def : InstRW<[FXU, DFU2, DFU2, Lat6, GroupAlone], (instregex "CXLGTR$")>;
|
|
|
1010
|
|
|
1011 // Convert to fixed / logical
|
|
|
1012 def : InstRW<[FXU, DFU, Lat11, GroupAlone], (instregex "CFDTR(A)?$")>;
|
|
|
1013 def : InstRW<[FXU, DFU, Lat30, GroupAlone], (instregex "CGDTR(A)?$")>;
|
|
|
1014 def : InstRW<[FXU, DFU, DFU, Lat11, GroupAlone], (instregex "CFXTR$")>;
|
|
|
1015 def : InstRW<[FXU, DFU, DFU, Lat30, GroupAlone], (instregex "CGXTR(A)?$")>;
|
|
|
1016 def : InstRW<[FXU, DFU, Lat11, GroupAlone], (instregex "CL(F|G)DTR$")>;
|
|
|
1017 def : InstRW<[FXU, DFU, DFU, Lat11, GroupAlone], (instregex "CL(F|G)XTR$")>;
|
|
|
1018
|
|
|
1019 // Convert from / to signed / unsigned packed
|
|
|
1020 def : InstRW<[FXU, DFU, Lat12, GroupAlone], (instregex "CD(S|U)TR$")>;
|
|
|
1021 def : InstRW<[FXU, FXU, DFU2, DFU2, Lat20, GroupAlone], (instregex "CX(S|U)TR$")>;
|
|
|
1022 def : InstRW<[FXU, DFU, Lat12, GroupAlone], (instregex "C(S|U)DTR$")>;
|
|
|
1023 def : InstRW<[FXU, FXU, DFU2, DFU2, Lat20, GroupAlone], (instregex "C(S|U)XTR$")>;
|
|
|
1024
|
|
|
1025 // Convert from / to zoned
|
|
|
1026 def : InstRW<[LSU, DFU2, Lat7, GroupAlone], (instregex "CDZT$")>;
|
|
|
1027 def : InstRW<[LSU, LSU, DFU2, DFU2, Lat10, GroupAlone], (instregex "CXZT$")>;
|
|
|
1028 def : InstRW<[FXU, LSU, DFU, DFU, Lat11, GroupAlone], (instregex "CZDT$")>;
|
|
|
1029 def : InstRW<[FXU, LSU, DFU, DFU, Lat15, GroupAlone], (instregex "CZXT$")>;
|
|
|
1030
|
|
|
1031 // Perform floating-point operation
|
|
|
1032 def : InstRW<[FXU, Lat30], (instregex "PFPO$")>;
|
|
|
1033
|
|
|
1034 //===----------------------------------------------------------------------===//
|
|
|
1035 // DFP: Unary arithmetic
|
|
|
1036 //===----------------------------------------------------------------------===//
|
|
|
1037
|
|
|
1038 // Load FP integer
|
|
|
1039 def : InstRW<[DFU, Lat20], (instregex "FIDTR$")>;
|
|
|
1040 def : InstRW<[DFU2, DFU2, Lat20, GroupAlone], (instregex "FIXTR$")>;
|
|
|
1041
|
|
|
1042 // Extract biased exponent
|
|
|
1043 def : InstRW<[FXU, DFU, Lat15, GroupAlone], (instregex "EEDTR$")>;
|
|
|
1044 def : InstRW<[FXU, DFU2, Lat15, GroupAlone], (instregex "EEXTR$")>;
|
|
|
1045
|
|
|
1046 // Extract significance
|
|
|
1047 def : InstRW<[FXU, DFU, Lat15, GroupAlone], (instregex "ESDTR$")>;
|
|
|
1048 def : InstRW<[FXU, DFU, DFU, Lat20, GroupAlone], (instregex "ESXTR$")>;
|
|
|
1049
|
|
|
1050 //===----------------------------------------------------------------------===//
|
|
|
1051 // DFP: Binary arithmetic
|
|
|
1052 //===----------------------------------------------------------------------===//
|
|
|
1053
|
|
|
1054 // Addition
|
|
|
1055 def : InstRW<[DFU, Lat30], (instregex "ADTR(A)?$")>;
|
|
|
1056 def : InstRW<[DFU2, DFU2, Lat30, GroupAlone], (instregex "AXTR(A)?$")>;
|
|
|
1057
|
|
|
1058 // Subtraction
|
|
|
1059 def : InstRW<[DFU, Lat30], (instregex "SDTR(A)?$")>;
|
|
|
1060 def : InstRW<[DFU2, DFU2, Lat30, GroupAlone], (instregex "SXTR(A)?$")>;
|
|
|
1061
|
|
|
1062 // Multiply
|
|
|
1063 def : InstRW<[DFU, Lat30], (instregex "MDTR(A)?$")>;
|
|
|
1064 def : InstRW<[DFU2, DFU2, Lat30, GroupAlone], (instregex "MXTR(A)?$")>;
|
|
|
1065
|
|
|
1066 // Division
|
|
|
1067 def : InstRW<[DFU, Lat30], (instregex "DDTR(A)?$")>;
|
|
|
1068 def : InstRW<[DFU2, DFU2, Lat30, GroupAlone], (instregex "DXTR(A)?$")>;
|
|
|
1069
|
|
|
1070 // Quantize
|
|
|
1071 def : InstRW<[DFU, Lat30], (instregex "QADTR$")>;
|
|
|
1072 def : InstRW<[DFU2, DFU2, Lat30, GroupAlone], (instregex "QAXTR$")>;
|
|
|
1073
|
|
|
1074 // Reround
|
|
|
1075 def : InstRW<[FXU, DFU, Lat30, GroupAlone], (instregex "RRDTR$")>;
|
|
|
1076 def : InstRW<[FXU, DFU2, DFU2, Lat30, GroupAlone], (instregex "RRXTR$")>;
|
|
|
1077
|
|
|
1078 // Shift significand left/right
|
|
|
1079 def : InstRW<[LSU, DFU, Lat11, GroupAlone], (instregex "S(L|R)DT$")>;
|
|
|
1080 def : InstRW<[LSU, DFU2, DFU2, Lat15, GroupAlone], (instregex "S(L|R)XT$")>;
|
|
|
1081
|
|
|
1082 // Insert biased exponent
|
|
|
1083 def : InstRW<[FXU, DFU, Lat11, GroupAlone], (instregex "IEDTR$")>;
|
|
|
1084 def : InstRW<[FXU, DFU2, DFU2, Lat15, GroupAlone], (instregex "IEXTR$")>;
|
|
|
1085
|
|
|
1086 //===----------------------------------------------------------------------===//
|
|
|
1087 // DFP: Comparisons
|
|
|
1088 //===----------------------------------------------------------------------===//
|
|
|
1089
|
|
|
1090 // Compare
|
|
|
1091 def : InstRW<[DFU, Lat11], (instregex "(K|C)DTR$")>;
|
|
|
1092 def : InstRW<[DFU, DFU, Lat15], (instregex "(K|C)XTR$")>;
|
|
|
1093
|
|
|
1094 // Compare biased exponent
|
|
|
1095 def : InstRW<[DFU, Lat8], (instregex "CEDTR$")>;
|
|
|
1096 def : InstRW<[DFU, DFU, Lat9], (instregex "CEXTR$")>;
|
|
|
1097
|
|
|
1098 // Test Data Class/Group
|
|
|
1099 def : InstRW<[LSU, DFU, Lat15], (instregex "TD(C|G)(E|D)T$")>;
|
|
|
1100 def : InstRW<[LSU, DFU2, Lat15], (instregex "TD(C|G)XT$")>;
|
|
|
1101
|
|
|
1102
|
|
|
1103 // -------------------------------- System ---------------------------------- //
|
|
|
1104
|
|
|
1105 //===----------------------------------------------------------------------===//
|
|
|
1106 // System: Program-Status Word Instructions
|
|
|
1107 //===----------------------------------------------------------------------===//
|
|
|
1108
|
|
|
1109 def : InstRW<[FXU, Lat30], (instregex "EPSW$")>;
|
|
|
1110 def : InstRW<[FXU, LSU, Lat30], (instregex "LPSW(E)?$")>;
|
|
|
1111 def : InstRW<[FXU, Lat3, GroupAlone], (instregex "IPK$")>;
|
|
|
1112 def : InstRW<[LSU, EndGroup], (instregex "SPKA$")>;
|
|
|
1113 def : InstRW<[LSU, EndGroup], (instregex "SSM$")>;
|
|
|
1114 def : InstRW<[FXU, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
|
|
|
1115 def : InstRW<[FXU, Lat3], (instregex "IAC$")>;
|
|
|
1116 def : InstRW<[LSU, EndGroup], (instregex "SAC(F)?$")>;
|
|
|
1117
|
|
|
1118 //===----------------------------------------------------------------------===//
|
|
|
1119 // System: Control Register Instructions
|
|
|
1120 //===----------------------------------------------------------------------===//
|
|
|
1121
|
|
|
1122 def : InstRW<[FXU, LSU, Lat30], (instregex "LCTL(G)?$")>;
|
|
|
1123 def : InstRW<[FXU, LSU, LSU, LSU, LSU, Lat30, GroupAlone],
|
|
|
1124 (instregex "STCT(L|G)$")>;
|
|
|
1125 def : InstRW<[LSU], (instregex "E(P|S)A(I)?R$")>;
|
|
|
1126 def : InstRW<[FXU, Lat30], (instregex "SSA(I)?R$")>;
|
|
|
1127 def : InstRW<[FXU, Lat30], (instregex "ESEA$")>;
|
|
|
1128
|
|
|
1129 //===----------------------------------------------------------------------===//
|
|
|
1130 // System: Prefix-Register Instructions
|
|
|
1131 //===----------------------------------------------------------------------===//
|
|
|
1132
|
|
|
1133 def : InstRW<[FXU, LSU, Lat30], (instregex "SPX$")>;
|
|
|
1134 def : InstRW<[FXU, LSU, Lat30], (instregex "STPX$")>;
|
|
|
1135
|
|
|
1136 //===----------------------------------------------------------------------===//
|
|
|
1137 // System: Storage-Key and Real Memory Instructions
|
|
|
1138 //===----------------------------------------------------------------------===//
|
|
|
1139
|
|
|
1140 def : InstRW<[FXU, Lat30], (instregex "ISKE$")>;
|
|
|
1141 def : InstRW<[FXU, Lat30], (instregex "IVSK$")>;
|
|
|
1142 def : InstRW<[FXU, Lat30], (instregex "SSKE(Opt)?$")>;
|
|
|
1143 def : InstRW<[FXU, Lat30], (instregex "RRB(E|M)$")>;
|
|
|
1144 def : InstRW<[FXU, Lat30], (instregex "PFMF$")>;
|
|
|
1145 def : InstRW<[FXU, Lat30], (instregex "TB$")>;
|
|
|
1146 def : InstRW<[FXU, LSU, Lat30], (instregex "PGIN$")>;
|
|
|
1147 def : InstRW<[FXU, LSU, Lat30], (instregex "PGOUT$")>;
|
|
|
1148
|
|
|
1149 //===----------------------------------------------------------------------===//
|
|
|
1150 // System: Dynamic-Address-Translation Instructions
|
|
|
1151 //===----------------------------------------------------------------------===//
|
|
|
1152
|
|
|
1153 def : InstRW<[FXU, LSU, Lat30], (instregex "IPTE(Opt)?(Opt)?$")>;
|
|
|
1154 def : InstRW<[FXU, Lat30], (instregex "IDTE(Opt)?$")>;
|
|
|
1155 def : InstRW<[FXU, Lat30], (instregex "CRDTE(Opt)?$")>;
|
|
|
1156 def : InstRW<[FXU, Lat30], (instregex "PTLB$")>;
|
|
|
1157 def : InstRW<[FXU, LSU, Lat30], (instregex "CSP(G)?$")>;
|
|
|
1158 def : InstRW<[FXU, LSU, Lat30], (instregex "LPTEA$")>;
|
|
|
1159 def : InstRW<[FXU, LSU, Lat30], (instregex "LRA(Y|G)?$")>;
|
|
|
1160 def : InstRW<[FXU, LSU, Lat30], (instregex "STRAG$")>;
|
|
|
1161 def : InstRW<[FXU, LSU, Lat30], (instregex "LURA(G)?$")>;
|
|
|
1162 def : InstRW<[FXU, LSU, Lat30], (instregex "STUR(A|G)$")>;
|
|
|
1163 def : InstRW<[FXU, LSU, Lat30], (instregex "TPROT$")>;
|
|
|
1164
|
|
|
1165 //===----------------------------------------------------------------------===//
|
|
|
1166 // System: Memory-move Instructions
|
|
|
1167 //===----------------------------------------------------------------------===//
|
|
|
1168
|
|
|
1169 def : InstRW<[LSU, Lat8, GroupAlone], (instregex "MVC(K|P|S)$")>;
|
|
|
1170 def : InstRW<[LSU, Lat6, Lat30, GroupAlone], (instregex "MVCSK$")>;
|
|
|
1171 def : InstRW<[LSU, Lat6, GroupAlone], (instregex "MVCDK$")>;
|
|
|
1172 def : InstRW<[FXU, LSU, Lat30], (instregex "MVCOS$")>;
|
|
|
1173 def : InstRW<[LSU, Lat30, GroupAlone], (instregex "MVPG$")>;
|
|
|
1174
|
|
|
1175 //===----------------------------------------------------------------------===//
|
|
|
1176 // System: Address-Space Instructions
|
|
|
1177 //===----------------------------------------------------------------------===//
|
|
|
1178
|
|
|
1179 def : InstRW<[FXU, LSU, Lat30], (instregex "LASP$")>;
|
|
|
1180 def : InstRW<[LSU, GroupAlone], (instregex "PALB$")>;
|
|
|
1181 def : InstRW<[FXU, LSU, Lat30], (instregex "PC$")>;
|
|
|
1182 def : InstRW<[FXU, Lat30], (instregex "PR$")>;
|
|
|
1183 def : InstRW<[FXU, Lat30], (instregex "PT(I)?$")>;
|
|
|
1184 def : InstRW<[FXU, LSU, Lat30], (instregex "RP$")>;
|
|
|
1185 def : InstRW<[FXU, Lat30], (instregex "BS(G|A)$")>;
|
|
|
1186 def : InstRW<[FXU, Lat20], (instregex "TAR$")>;
|
|
|
1187
|
|
|
1188 //===----------------------------------------------------------------------===//
|
|
|
1189 // System: Linkage-Stack Instructions
|
|
|
1190 //===----------------------------------------------------------------------===//
|
|
|
1191
|
|
|
1192 def : InstRW<[FXU, LSU, Lat30, EndGroup], (instregex "BAKR$")>;
|
|
|
1193 def : InstRW<[FXU, Lat30], (instregex "EREG(G)?$")>;
|
|
|
1194 def : InstRW<[FXU, Lat30], (instregex "(E|M)STA$")>;
|
|
|
1195
|
|
|
1196 //===----------------------------------------------------------------------===//
|
|
|
1197 // System: Time-Related Instructions
|
|
|
1198 //===----------------------------------------------------------------------===//
|
|
|
1199
|
|
|
1200 def : InstRW<[FXU, Lat30], (instregex "PTFF$")>;
|
|
|
1201 def : InstRW<[FXU, LSU, Lat20], (instregex "SCK$")>;
|
|
|
1202 def : InstRW<[FXU, Lat30], (instregex "SCKPF$")>;
|
|
|
1203 def : InstRW<[FXU, LSU, Lat20], (instregex "SCKC$")>;
|
|
|
1204 def : InstRW<[FXU, LSU, Lat20], (instregex "SPT$")>;
|
|
|
1205 def : InstRW<[FXU, LSU, LSU, Lat9, GroupAlone], (instregex "STCK(F)?$")>;
|
|
|
1206 def : InstRW<[LSU, LSU, LSU, LSU, FXU, FXU, Lat20, GroupAlone],
|
|
|
1207 (instregex "STCKE$")>;
|
|
|
1208 def : InstRW<[FXU, LSU, Lat9], (instregex "STCKC$")>;
|
|
|
1209 def : InstRW<[FXU, LSU, Lat8], (instregex "STPT$")>;
|
|
|
1210
|
|
|
1211 //===----------------------------------------------------------------------===//
|
|
|
1212 // System: CPU-Related Instructions
|
|
|
1213 //===----------------------------------------------------------------------===//
|
|
|
1214
|
|
|
1215 def : InstRW<[FXU, LSU, Lat30], (instregex "STAP$")>;
|
|
|
1216 def : InstRW<[FXU, LSU, Lat30], (instregex "STIDP$")>;
|
|
|
1217 def : InstRW<[FXU, LSU, Lat30], (instregex "STSI$")>;
|
|
|
1218 def : InstRW<[FXU, LSU, Lat30], (instregex "STFL(E)?$")>;
|
|
|
1219 def : InstRW<[FXU, LSU, Lat30], (instregex "ECAG$")>;
|
|
|
1220 def : InstRW<[FXU, LSU, Lat30], (instregex "ECTG$")>;
|
|
|
1221 def : InstRW<[FXU, Lat30], (instregex "PTF$")>;
|
|
|
1222 def : InstRW<[FXU, Lat30], (instregex "PCKMO$")>;
|
|
|
1223
|
|
|
1224 //===----------------------------------------------------------------------===//
|
|
|
1225 // System: Miscellaneous Instructions
|
|
|
1226 //===----------------------------------------------------------------------===//
|
|
|
1227
|
|
|
1228 def : InstRW<[FXU, Lat30], (instregex "SVC$")>;
|
|
|
1229 def : InstRW<[FXU, GroupAlone], (instregex "MC$")>;
|
|
|
1230 def : InstRW<[FXU, Lat30], (instregex "DIAG$")>;
|
|
|
1231 def : InstRW<[FXU], (instregex "TRAC(E|G)$")>;
|
|
|
1232 def : InstRW<[FXU, Lat30], (instregex "TRAP(2|4)$")>;
|
|
|
1233 def : InstRW<[FXU, Lat30], (instregex "SIGP$")>;
|
|
|
1234 def : InstRW<[FXU, LSU, Lat30], (instregex "SIGA$")>;
|
|
|
1235 def : InstRW<[FXU, LSU, Lat30], (instregex "SIE$")>;
|
|
|
1236
|
|
|
1237 //===----------------------------------------------------------------------===//
|
|
|
1238 // System: CPU-Measurement Facility Instructions
|
|
|
1239 //===----------------------------------------------------------------------===//
|
|
|
1240
|
|
|
1241 def : InstRW<[FXU], (instregex "LPP$")>;
|
|
|
1242 def : InstRW<[FXU, Lat30], (instregex "ECPGA$")>;
|
|
|
1243 def : InstRW<[FXU, Lat30], (instregex "E(C|P)CTR$")>;
|
|
|
1244 def : InstRW<[FXU, Lat30], (instregex "LCCTL$")>;
|
|
|
1245 def : InstRW<[FXU, LSU, Lat30], (instregex "L(P|S)CTL$")>;
|
|
|
1246 def : InstRW<[FXU, LSU, Lat30], (instregex "Q(S|CTR)I$")>;
|
|
|
1247 def : InstRW<[FXU, Lat30], (instregex "S(C|P)CTR$")>;
|
|
|
1248
|
|
|
1249 //===----------------------------------------------------------------------===//
|
|
|
1250 // System: I/O Instructions
|
|
|
1251 //===----------------------------------------------------------------------===//
|
|
|
1252
|
|
|
1253 def : InstRW<[FXU, Lat30], (instregex "(C|H|R|X)SCH$")>;
|
|
|
1254 def : InstRW<[FXU, LSU, Lat30], (instregex "(M|S|ST|T)SCH$")>;
|
|
|
1255 def : InstRW<[FXU, Lat30], (instregex "RCHP$")>;
|
|
|
1256 def : InstRW<[FXU, Lat30], (instregex "SCHM$")>;
|
|
|
1257 def : InstRW<[FXU, LSU, Lat30], (instregex "STC(PS|RW)$")>;
|
|
|
1258 def : InstRW<[FXU, LSU, Lat30], (instregex "TPI$")>;
|
|
|
1259 def : InstRW<[FXU, Lat30], (instregex "SAL$")>;
|
|
|
1260
|
|
120
|
1261 }
|
|
|
1262
|
