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annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll @ 206:f17a3b42b08b

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Added tag before-12 for changeset b7591485f4cd
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 07 Jun 2021 21:25:57 +0900
parents 1d019706d866
children 2e18cbf3894f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
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2 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
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3 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
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4 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s
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5 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP,GFX10 %s
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7 ; GCN-LABEL: {{^}}gws_sema_br_offset0:
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8 ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]]
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9 ; NOLOOP-DAG: s_mov_b32 m0, 0{{$}}
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10 ; NOLOOP: v_mov_b32_e32 v0, [[BAR_NUM]]
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11 ; NOLOOP: ds_gws_sema_br v0 gds{{$}}
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13 ; LOOP: s_mov_b32 m0, 0{{$}}
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14 ; LOOP: [[LOOP:BB[0-9]+_[0-9]+]]:
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15 ; LOOP-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_TRAPSTS, 8, 1), 0
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16 ; LOOP-NEXT: ds_gws_sema_br v0 gds
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17 ; LOOP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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18 ; LOOP-NEXT: s_getreg_b32 [[GETREG:s[0-9]+]], hwreg(HW_REG_TRAPSTS, 8, 1)
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19 ; LOOP-NEXT: s_cmp_lg_u32 [[GETREG]], 0
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20 ; LOOP-NEXT: s_cbranch_scc1 [[LOOP]]
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21 define amdgpu_kernel void @gws_sema_br_offset0(i32 %val) #0 {
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22 call void @llvm.amdgcn.ds.gws.sema.br(i32 %val, i32 0)
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23 ret void
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24 }
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26 declare void @llvm.amdgcn.ds.gws.sema.br(i32, i32) #0
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27
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28 attributes #0 = { convergent inaccessiblememonly nounwind }