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view llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll @ 206:f17a3b42b08b
Added tag before-12 for changeset b7591485f4cd
| author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Mon, 07 Jun 2021 21:25:57 +0900 |
| parents | 1d019706d866 |
| children | 2e18cbf3894f |
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP,GFX10 %s ; GCN-LABEL: {{^}}gws_sema_br_offset0: ; NOLOOP-DAG: s_load_dword [[BAR_NUM:s[0-9]+]] ; NOLOOP-DAG: s_mov_b32 m0, 0{{$}} ; NOLOOP: v_mov_b32_e32 v0, [[BAR_NUM]] ; NOLOOP: ds_gws_sema_br v0 gds{{$}} ; LOOP: s_mov_b32 m0, 0{{$}} ; LOOP: [[LOOP:BB[0-9]+_[0-9]+]]: ; LOOP-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_TRAPSTS, 8, 1), 0 ; LOOP-NEXT: ds_gws_sema_br v0 gds ; LOOP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; LOOP-NEXT: s_getreg_b32 [[GETREG:s[0-9]+]], hwreg(HW_REG_TRAPSTS, 8, 1) ; LOOP-NEXT: s_cmp_lg_u32 [[GETREG]], 0 ; LOOP-NEXT: s_cbranch_scc1 [[LOOP]] define amdgpu_kernel void @gws_sema_br_offset0(i32 %val) #0 { call void @llvm.amdgcn.ds.gws.sema.br(i32 %val, i32 0) ret void } declare void @llvm.amdgcn.ds.gws.sema.br(i32, i32) #0 attributes #0 = { convergent inaccessiblememonly nounwind }