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comparison llvm/docs/AMDGPU/gfx9_offset_smem_plain.rst @ 150:1d019706d866

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LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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children 2e18cbf3894f
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147:c2174574ed3a 150:1d019706d866
1 ..
2 **************************************************
3 * *
4 * Automatically generated file, do not edit! *
5 * *
6 **************************************************
7
8 .. _amdgpu_synid9_offset_smem_plain:
9
10 soffset
11 ===========================
12
13 An offset added to the base address to get memory address.
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15 * If offset is specified as a register, it supplies an unsigned byte offset.
16 * If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
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18 .. WARNING:: Assembler currently supports 20-bit unsigned offsets only. Use :ref:`uimm20<amdgpu_synid_uimm20>` instead of :ref:`simm21<amdgpu_synid_simm21>`.
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20 *Size:* 1 dword.
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22 *Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack<amdgpu_synid_xnack>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`