CbC/CbC_llvm: lib/CodeGen/CalcSpillWeights.cpp comparison

comparison lib/CodeGen/CalcSpillWeights.cpp @ 134:3a76565eade5 LLVM5.0.1

update 5.0.1

author	mir3636
date	Sat, 17 Feb 2018 09:57:20 +0900
parents	803732b1fca8
children	c2174574ed3a

comparison

equal deleted inserted replaced

-:c60214abe0e8
+:3a76565eade5
 //===----------------------------------------------------------------------===//
 #include "llvm/CodeGen/CalcSpillWeights.h"
 #include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/CodeGen/LiveInterval.h"
-#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/LiveIntervals.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineLoopInfo.h"
 #include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
+#include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/CodeGen/VirtRegMap.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
 #include <cassert>
 #include <tuple>
 using namespace llvm;
 if (TargetRegisterInfo::isVirtualRegister(hreg))
 return sub == hsub ? hreg : 0;
 const TargetRegisterClass *rc = mri.getRegClass(reg);
+if (!tri.enableMultipleCopyHints()) {
 // Only allow physreg hints in rc.
 if (sub == 0)
 return rc->contains(hreg) ? hreg : 0;
 // reg:sub should match the physreg hreg.
 return tri.getMatchingSuperReg(hreg, sub, rc);
+}
+unsigned CopiedPReg = (hsub ? tri.getSubReg(hreg, hsub) : hreg);
+if (rc->contains(CopiedPReg))
+return CopiedPReg;
+// Check if reg:sub matches so that a super register could be hinted.
+if (sub)
+return tri.getMatchingSuperReg(CopiedPReg, sub, rc);
+return 0;
 }
 // Check if all values in LI are rematerializable
 static bool isRematerializable(const LiveInterval &LI,
 const LiveIntervals &LIS,
 bool isExiting = false;
 float totalWeight = 0;
 unsigned numInstr = 0; // Number of instructions using li
 SmallPtrSet<MachineInstr*, 8> visited;
-// Find the best physreg hint and the best virtreg hint.
+std::pair<unsigned, unsigned> TargetHint = mri.getRegAllocationHint(li.reg);
-float bestPhys = 0, bestVirt = 0;
-unsigned hintPhys = 0, hintVirt = 0;
-// Don't recompute a target specific hint.
-bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
 // Don't recompute spill weight for an unspillable register.
 bool Spillable = li.isSpillable();
 bool localSplitArtifact = start && end;
 totalWeight += LiveIntervals::getSpillWeight(false, true, &MBFI, localMBB);
 numInstr += 2;
 }
+// CopyHint is a sortable hint derived from a COPY instruction.
+struct CopyHint {
+unsigned Reg;
+float Weight;
+bool IsPhys;
+unsigned HintOrder;
+CopyHint(unsigned R, float W, bool P, unsigned HR) :
+Reg(R), Weight(W), IsPhys(P), HintOrder(HR) {}
+bool operator<(const CopyHint &rhs) const {
+// Always prefer any physreg hint.
+if (IsPhys != rhs.IsPhys)
+return (IsPhys && !rhs.IsPhys);
+if (Weight != rhs.Weight)
+return (Weight > rhs.Weight);
+// This is just a temporary way to achive NFC for targets that don't
+// enable multiple copy hints. HintOrder should be removed when all
+// targets return true in enableMultipleCopyHints().
+return (HintOrder < rhs.HintOrder);
+#if 0 // Should replace the HintOrder check, see above.
+// (just for the purpose of maintaining the set)
+return Reg < rhs.Reg;
+#endif
+}
+};
+std::set<CopyHint> CopyHints;
+// Temporary: see comment for HintOrder above.
+unsigned CopyHintOrder = 0;
 for (MachineRegisterInfo::reg_instr_iterator
 I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end();
 I != E; ) {
 MachineInstr *mi = &*(I++);
 totalWeight += weight;
 }
 // Get allocation hints from copies.
-if (noHint || !mi->isCopy())
+if (!mi->isCopy() ||
+(TargetHint.first != 0 && !tri.enableMultipleCopyHints()))
 continue;
 unsigned hint = copyHint(mi, li.reg, tri, mri);
 if (!hint)
 continue;
 // Force hweight onto the stack so that x86 doesn't add hidden precision,
 // making the comparison incorrectly pass (i.e., 1 > 1 == true??).
 //
 // FIXME: we probably shouldn't use floats at all.
 volatile float hweight = Hint[hint] += weight;
-if (TargetRegisterInfo::isPhysicalRegister(hint)) {
+if (TargetRegisterInfo::isVirtualRegister(hint) || mri.isAllocatable(hint))
-if (hweight > bestPhys && mri.isAllocatable(hint)) {
+CopyHints.insert(CopyHint(hint, hweight, tri.isPhysicalRegister(hint),
-bestPhys = hweight;
+(tri.enableMultipleCopyHints() ? hint : CopyHintOrder++)));
-hintPhys = hint;
+}
-}
-} else {
+Hint.clear();
-if (hweight > bestVirt) {
-bestVirt = hweight;
+// Pass all the sorted copy hints to mri.
-hintVirt = hint;
+if (updateLI && CopyHints.size()) {
-}
+// Remove a generic hint if previously added by target.
+if (TargetHint.first == 0 && TargetHint.second)
+mri.clearSimpleHint(li.reg);
+for (auto &Hint : CopyHints) {
+if (TargetHint.first != 0 && Hint.Reg == TargetHint.second)
+// Don't add again the target-type hint.
+continue;
+mri.addRegAllocationHint(li.reg, Hint.Reg);
+if (!tri.enableMultipleCopyHints())
+break;
 }
-}
+// Weakly boost the spill weight of hinted registers.
-Hint.clear();
+totalWeight *= 1.01F;
-// Always prefer the physreg hint.
-if (updateLI) {
-if (unsigned hint = hintPhys ? hintPhys : hintVirt) {
-mri.setRegAllocationHint(li.reg, 0, hint);
-// Weakly boost the spill weight of hinted registers.
-totalWeight *= 1.01F;
-}
 }
 // If the live interval was already unspillable, leave it that way.
 if (!Spillable)
 return -1.0;

Mercurial > hg > CbC > CbC_llvm

comparison lib/CodeGen/CalcSpillWeights.cpp @ 134:3a76565eade5 LLVM5.0.1