comparison lib/Target/Mips/MipsInstrFPU.td @ 100:7d135dc70f03 LLVM 3.9

LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
96:6418606d0ead 100:7d135dc70f03
134 } 134 }
135 } 135 }
136 136
137 multiclass ROUND_M<string opstr, InstrItinClass Itin> { 137 multiclass ROUND_M<string opstr, InstrItinClass Itin> {
138 def _D32 : MMRel, ABSS_FT<opstr, FGR32Opnd, AFGR64Opnd, Itin>, FGR_32; 138 def _D32 : MMRel, ABSS_FT<opstr, FGR32Opnd, AFGR64Opnd, Itin>, FGR_32;
139 def _D64 : ABSS_FT<opstr, FGR32Opnd, FGR64Opnd, Itin>, FGR_64 { 139 def _D64 : StdMMR6Rel, ABSS_FT<opstr, FGR32Opnd, FGR64Opnd, Itin>, FGR_64 {
140 let DecoderNamespace = "Mips64"; 140 let DecoderNamespace = "Mips64";
141 } 141 }
142 } 142 }
143 143
144 class MFC1_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC, 144 class MFC1_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
265 FGR_64; 265 FGR_64;
266 266
267 //===----------------------------------------------------------------------===// 267 //===----------------------------------------------------------------------===//
268 // Floating Point Instructions 268 // Floating Point Instructions
269 //===----------------------------------------------------------------------===// 269 //===----------------------------------------------------------------------===//
270 def ROUND_W_S : MMRel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, II_ROUND>, 270 def ROUND_W_S : MMRel, StdMMR6Rel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, II_ROUND>,
271 ABSS_FM<0xc, 16>, ISA_MIPS2; 271 ABSS_FM<0xc, 16>, ISA_MIPS2;
272 let AdditionalPredicates = [NotInMicroMips] in { 272 defm ROUND_W : ROUND_M<"round.w.d", II_ROUND>, ABSS_FM<0xc, 17>, ISA_MIPS2;
273 def TRUNC_W_S : MMRel, StdMMR6Rel, ABSS_FT<"trunc.w.s", FGR32Opnd, FGR32Opnd, II_TRUNC>, 273 def TRUNC_W_S : MMRel, StdMMR6Rel, ABSS_FT<"trunc.w.s", FGR32Opnd, FGR32Opnd, II_TRUNC>,
274 ABSS_FM<0xd, 16>, ISA_MIPS2; 274 ABSS_FM<0xd, 16>, ISA_MIPS2;
275 def CEIL_W_S : MMRel, StdMMR6Rel, ABSS_FT<"ceil.w.s", FGR32Opnd, FGR32Opnd, II_CEIL>, 275 def CEIL_W_S : MMRel, StdMMR6Rel, ABSS_FT<"ceil.w.s", FGR32Opnd, FGR32Opnd, II_CEIL>,
276 ABSS_FM<0xe, 16>, ISA_MIPS2; 276 ABSS_FM<0xe, 16>, ISA_MIPS2;
277 def FLOOR_W_S : MMRel, StdMMR6Rel, ABSS_FT<"floor.w.s", FGR32Opnd, FGR32Opnd, II_FLOOR>, 277 def FLOOR_W_S : MMRel, StdMMR6Rel, ABSS_FT<"floor.w.s", FGR32Opnd, FGR32Opnd, II_FLOOR>,
278 ABSS_FM<0xf, 16>, ISA_MIPS2; 278 ABSS_FM<0xf, 16>, ISA_MIPS2;
279 }
280 def CVT_W_S : MMRel, ABSS_FT<"cvt.w.s", FGR32Opnd, FGR32Opnd, II_CVT>, 279 def CVT_W_S : MMRel, ABSS_FT<"cvt.w.s", FGR32Opnd, FGR32Opnd, II_CVT>,
281 ABSS_FM<0x24, 16>; 280 ABSS_FM<0x24, 16>;
282 281
283 defm ROUND_W : ROUND_M<"round.w.d", II_ROUND>, ABSS_FM<0xc, 17>, ISA_MIPS2;
284 defm TRUNC_W : ROUND_M<"trunc.w.d", II_TRUNC>, ABSS_FM<0xd, 17>, ISA_MIPS2; 282 defm TRUNC_W : ROUND_M<"trunc.w.d", II_TRUNC>, ABSS_FM<0xd, 17>, ISA_MIPS2;
285 defm CEIL_W : ROUND_M<"ceil.w.d", II_CEIL>, ABSS_FM<0xe, 17>, ISA_MIPS2; 283 defm CEIL_W : ROUND_M<"ceil.w.d", II_CEIL>, ABSS_FM<0xe, 17>, ISA_MIPS2;
286 defm FLOOR_W : ROUND_M<"floor.w.d", II_FLOOR>, ABSS_FM<0xf, 17>, ISA_MIPS2; 284 defm FLOOR_W : ROUND_M<"floor.w.d", II_FLOOR>, ABSS_FM<0xf, 17>, ISA_MIPS2;
287 defm CVT_W : ROUND_M<"cvt.w.d", II_CVT>, ABSS_FM<0x24, 17>; 285 defm CVT_W : ROUND_M<"cvt.w.d", II_CVT>, ABSS_FM<0x24, 17>;
288 286
289 let DecoderNamespace = "Mips64" in { 287 let DecoderNamespace = "Mips64" in {
288 let AdditionalPredicates = [NotInMicroMips] in {
290 def ROUND_L_S : ABSS_FT<"round.l.s", FGR64Opnd, FGR32Opnd, II_ROUND>, 289 def ROUND_L_S : ABSS_FT<"round.l.s", FGR64Opnd, FGR32Opnd, II_ROUND>,
291 ABSS_FM<0x8, 16>, FGR_64; 290 ABSS_FM<0x8, 16>, FGR_64;
292 def ROUND_L_D64 : ABSS_FT<"round.l.d", FGR64Opnd, FGR64Opnd, II_ROUND>, 291 def ROUND_L_D64 : ABSS_FT<"round.l.d", FGR64Opnd, FGR64Opnd, II_ROUND>,
293 ABSS_FM<0x8, 17>, FGR_64; 292 ABSS_FM<0x8, 17>, FGR_64;
294 let AdditionalPredicates = [NotInMicroMips] in {
295 def TRUNC_L_S : ABSS_FT<"trunc.l.s", FGR64Opnd, FGR32Opnd, II_TRUNC>, 293 def TRUNC_L_S : ABSS_FT<"trunc.l.s", FGR64Opnd, FGR32Opnd, II_TRUNC>,
296 ABSS_FM<0x9, 16>, FGR_64; 294 ABSS_FM<0x9, 16>, FGR_64;
297 def TRUNC_L_D64 : ABSS_FT<"trunc.l.d", FGR64Opnd, FGR64Opnd, II_TRUNC>, 295 def TRUNC_L_D64 : ABSS_FT<"trunc.l.d", FGR64Opnd, FGR64Opnd, II_TRUNC>,
298 ABSS_FM<0x9, 17>, FGR_64; 296 ABSS_FM<0x9, 17>, FGR_64;
299 def CEIL_L_S : ABSS_FT<"ceil.l.s", FGR64Opnd, FGR32Opnd, II_CEIL>, 297 def CEIL_L_S : ABSS_FT<"ceil.l.s", FGR64Opnd, FGR32Opnd, II_CEIL>,