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comparison test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
96:6418606d0ead 100:7d135dc70f03
41 %28 = bitcast float %27 to i32 41 %28 = bitcast float %27 to i32
42 %29 = icmp ne i32 %28, 0 42 %29 = icmp ne i32 %28, 0
43 br i1 %29, label %IF, label %LOOP29 43 br i1 %29, label %IF, label %LOOP29
44 44
45 IF: ; preds = %LOOP 45 IF: ; preds = %LOOP
46 %30 = call float @llvm.AMDIL.clamp.(float %temp4.0, float 0.000000e+00, float 1.000000e+00) 46 %30 = call float @llvm.AMDGPU.clamp.f32(float %temp4.0, float 0.000000e+00, float 1.000000e+00)
47 %31 = call float @llvm.AMDIL.clamp.(float %temp5.0, float 0.000000e+00, float 1.000000e+00) 47 %31 = call float @llvm.AMDGPU.clamp.f32(float %temp5.0, float 0.000000e+00, float 1.000000e+00)
48 %32 = call float @llvm.AMDIL.clamp.(float %temp6.0, float 0.000000e+00, float 1.000000e+00) 48 %32 = call float @llvm.AMDGPU.clamp.f32(float %temp6.0, float 0.000000e+00, float 1.000000e+00)
49 %33 = call float @llvm.AMDIL.clamp.(float 1.000000e+00, float 0.000000e+00, float 1.000000e+00) 49 %33 = call float @llvm.AMDGPU.clamp.f32(float 1.000000e+00, float 0.000000e+00, float 1.000000e+00)
50 %34 = insertelement <4 x float> undef, float %30, i32 0 50 %34 = insertelement <4 x float> undef, float %30, i32 0
51 %35 = insertelement <4 x float> %34, float %31, i32 1 51 %35 = insertelement <4 x float> %34, float %31, i32 1
52 %36 = insertelement <4 x float> %35, float %32, i32 2 52 %36 = insertelement <4 x float> %35, float %32, i32 2
53 %37 = insertelement <4 x float> %36, float %33, i32 3 53 %37 = insertelement <4 x float> %36, float %33, i32 3
54 call void @llvm.R600.store.swizzle(<4 x float> %37, i32 0, i32 0) 54 call void @llvm.R600.store.swizzle(<4 x float> %37, i32 0, i32 0)
79 %49 = add i32 %48, 1 79 %49 = add i32 %48, 1
80 %50 = bitcast i32 %49 to float 80 %50 = bitcast i32 %49 to float
81 br label %LOOP29 81 br label %LOOP29
82 } 82 }
83 83
84 declare float @llvm.AMDIL.clamp.(float, float, float) #0 84 declare float @llvm.AMDGPU.clamp.f32(float, float, float) #0
85 85
86 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 86 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
87 87
88 attributes #0 = { readnone } 88 attributes #0 = { readnone }