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comparison lib/Target/Mips/MipsSubtarget.cpp @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 60c9769439b8
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
31 #define GET_SUBTARGETINFO_CTOR 31 #define GET_SUBTARGETINFO_CTOR
32 #include "MipsGenSubtargetInfo.inc" 32 #include "MipsGenSubtargetInfo.inc"
33 33
34 // FIXME: Maybe this should be on by default when Mips16 is specified 34 // FIXME: Maybe this should be on by default when Mips16 is specified
35 // 35 //
36 static cl::opt<bool> Mixed16_32( 36 static cl::opt<bool>
37 "mips-mixed-16-32", 37 Mixed16_32("mips-mixed-16-32", cl::init(false),
38 cl::init(false), 38 cl::desc("Allow for a mixture of Mips16 "
39 cl::desc("Allow for a mixture of Mips16 " 39 "and Mips32 code in a single output file"),
40 "and Mips32 code in a single source file"), 40 cl::Hidden);
41 cl::Hidden);
42 41
43 static cl::opt<bool> Mips_Os16( 42 static cl::opt<bool> Mips_Os16("mips-os16", cl::init(false),
44 "mips-os16", 43 cl::desc("Compile all functions that don't use "
45 cl::init(false), 44 "floating point as Mips 16"),
46 cl::desc("Compile all functions that don' use " 45 cl::Hidden);
47 "floating point as Mips 16"), 46
48 cl::Hidden); 47 static cl::opt<bool> Mips16HardFloat("mips16-hard-float", cl::NotHidden,
48 cl::desc("Enable mips16 hard float."),
49 cl::init(false));
49 50
50 static cl::opt<bool> 51 static cl::opt<bool>
51 Mips16HardFloat("mips16-hard-float", cl::NotHidden, 52 Mips16ConstantIslands("mips16-constant-islands", cl::NotHidden,
52 cl::desc("MIPS: mips16 hard float enable."), 53 cl::desc("Enable mips16 constant islands."),
53 cl::init(false)); 54 cl::init(true));
54 55
55 static cl::opt<bool> 56 static cl::opt<bool>
56 Mips16ConstantIslands( 57 GPOpt("mgpopt", cl::Hidden,
57 "mips16-constant-islands", cl::NotHidden, 58 cl::desc("Enable gp-relative addressing of mips small data items"));
58 cl::desc("MIPS: mips16 constant islands enable."),
59 cl::init(true));
60
61 static cl::opt<bool>
62 GPOpt("mgpopt", cl::Hidden,
63 cl::desc("MIPS: Enable gp-relative addressing of small data items"));
64 59
65 void MipsSubtarget::anchor() { } 60 void MipsSubtarget::anchor() { }
66 61
67 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, 62 MipsSubtarget::MipsSubtarget(const Triple &TT, const std::string &CPU,
68 const std::string &FS, bool little, 63 const std::string &FS, bool little,
69 const MipsTargetMachine &TM) 64 const MipsTargetMachine &TM)
70 : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(MipsDefault), 65 : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(MipsDefault),
71 IsLittle(little), IsSingleFloat(false), IsFPXX(false), NoABICalls(false), 66 IsLittle(little), IsSoftFloat(false), IsSingleFloat(false), IsFPXX(false),
72 IsFP64bit(false), UseOddSPReg(true), IsNaN2008bit(false), 67 NoABICalls(false), IsFP64bit(false), UseOddSPReg(true),
73 IsGP64bit(false), HasVFPU(false), HasCnMips(false), HasMips3_32(false), 68 IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false), HasCnMips(false),
74 HasMips3_32r2(false), HasMips4_32(false), HasMips4_32r2(false), 69 HasMips3_32(false), HasMips3_32r2(false), HasMips4_32(false),
75 HasMips5_32r2(false), InMips16Mode(false), 70 HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false),
76 InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false), 71 InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
77 HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), 72 HasDSPR2(false), HasDSPR3(false), AllowMixed16_32(Mixed16_32 | Mips_Os16),
78 HasMSA(false), TM(TM), TargetTriple(TT), TSInfo(*TM.getDataLayout()), 73 Os16(Mips_Os16), HasMSA(false), UseTCCInDIV(false), HasEVA(false), TM(TM),
74 TargetTriple(TT), TSInfo(),
79 InstrInfo( 75 InstrInfo(
80 MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))), 76 MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))),
81 FrameLowering(MipsFrameLowering::create(*this)), 77 FrameLowering(MipsFrameLowering::create(*this)),
82 TLInfo(MipsTargetLowering::create(TM, *this)) { 78 TLInfo(MipsTargetLowering::create(TM, *this)) {
83 79
129 UseSmallSection = false; 125 UseSmallSection = false;
130 } 126 }
131 } 127 }
132 128
133 /// This overrides the PostRAScheduler bit in the SchedModel for any CPU. 129 /// This overrides the PostRAScheduler bit in the SchedModel for any CPU.
134 bool MipsSubtarget::enablePostMachineScheduler() const { return true; } 130 bool MipsSubtarget::enablePostRAScheduler() const { return true; }
135 131
136 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { 132 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
137 CriticalPathRCs.clear(); 133 CriticalPathRCs.clear();
138 CriticalPathRCs.push_back(isGP64bit() ? 134 CriticalPathRCs.push_back(isGP64bit() ?
139 &Mips::GPR64RegClass : &Mips::GPR32RegClass); 135 &Mips::GPR64RegClass : &Mips::GPR32RegClass);
151 // Parse features string. 147 // Parse features string.
152 ParseSubtargetFeatures(CPUName, FS); 148 ParseSubtargetFeatures(CPUName, FS);
153 // Initialize scheduling itinerary for the specified CPU. 149 // Initialize scheduling itinerary for the specified CPU.
154 InstrItins = getInstrItineraryForCPU(CPUName); 150 InstrItins = getInstrItineraryForCPU(CPUName);
155 151
156 if (InMips16Mode && !TM.Options.UseSoftFloat) 152 if (InMips16Mode && !IsSoftFloat)
157 InMips16HardFloat = true; 153 InMips16HardFloat = true;
158 154
159 return *this; 155 return *this;
160 }
161
162 bool MipsSubtarget::abiUsesSoftFloat() const {
163 return TM.Options.UseSoftFloat && !InMips16HardFloat;
164 } 156 }
165 157
166 bool MipsSubtarget::useConstantIslands() { 158 bool MipsSubtarget::useConstantIslands() {
167 DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n"); 159 DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
168 return Mips16ConstantIslands; 160 return Mips16ConstantIslands;