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comparison test/CodeGen/ARM/avoid-cpsr-rmw.ll @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 95c75e76d11b
children 1172e4bd9c6f
comparison
equal deleted inserted replaced
84:f3e34b893a5f 95:afa8332a0e37
1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s 1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-CORTEX
2 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=swift | FileCheck %s 2 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=swift | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SWIFT
3 ; Avoid some 's' 16-bit instruction which partially update CPSR (and add false 3 ; Avoid some 's' 16-bit instruction which partially update CPSR (and add false
4 ; dependency) when it isn't dependent on last CPSR defining instruction. 4 ; dependency) when it isn't dependent on last CPSR defining instruction.
5 ; rdar://8928208 5 ; rdar://8928208
6 6
7 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone { 7 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone {
8 entry: 8 entry:
9 ; CHECK-LABEL: t1: 9 ; CHECK-LABEL: t1:
10 ; CHECK: muls [[REG:(r[0-9]+)]], r3, r2 10 ; CHECK-CORTEX: muls [[REG:(r[0-9]+)]], r3, r2
11 ; CHECK-NEXT: mul [[REG2:(r[0-9]+)]], r1, r0 11 ; CHECK-CORTEX-NEXT: mul [[REG2:(r[0-9]+)]], r1, r0
12 ; CHECK-SWIFT: muls [[REG2:(r[0-9]+)]], r1, r0
13 ; CHECK-SWIFT-NEXT: mul [[REG:(r[0-9]+)]], r2, r3
12 ; CHECK-NEXT: muls r0, [[REG]], [[REG2]] 14 ; CHECK-NEXT: muls r0, [[REG]], [[REG2]]
13 %0 = mul nsw i32 %a, %b 15 %0 = mul nsw i32 %a, %b
14 %1 = mul nsw i32 %c, %d 16 %1 = mul nsw i32 %c, %d
15 %2 = mul nsw i32 %0, %1 17 %2 = mul nsw i32 %0, %1
16 ret i32 %2 18 ret i32 %2
19 ; Avoid partial CPSR dependency via loop backedge. 21 ; Avoid partial CPSR dependency via loop backedge.
20 ; rdar://10357570 22 ; rdar://10357570
21 define void @t2(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind { 23 define void @t2(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind {
22 entry: 24 entry:
23 ; CHECK-LABEL: t2: 25 ; CHECK-LABEL: t2:
24 %tobool7 = icmp eq i32* %ptr2, null 26 br label %while.body
25 br i1 %tobool7, label %while.end, label %while.body
26 27
27 while.body: 28 while.body:
28 ; CHECK: while.body 29 ; CHECK: while.body
29 ; CHECK: mul r{{[0-9]+}} 30 ; CHECK: mul r{{[0-9]+}}
30 ; CHECK-NOT: muls 31 ; CHECK-NOT: muls
31 %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ] 32 %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ]
32 %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ] 33 %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ]
33 %0 = load i32* %ptr1.addr.09, align 4 34 %0 = load i32, i32* %ptr1.addr.09, align 4
34 %arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1 35 %arrayidx1 = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 1
35 %1 = load i32* %arrayidx1, align 4 36 %1 = load i32, i32* %arrayidx1, align 4
36 %arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2 37 %arrayidx3 = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 2
37 %2 = load i32* %arrayidx3, align 4 38 %2 = load i32, i32* %arrayidx3, align 4
38 %arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3 39 %arrayidx4 = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 3
39 %3 = load i32* %arrayidx4, align 4 40 %3 = load i32, i32* %arrayidx4, align 4
40 %add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4 41 %add.ptr = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 4
41 %mul = mul i32 %1, %0 42 %mul = mul i32 %1, %0
42 %mul5 = mul i32 %mul, %2 43 %mul5 = mul i32 %mul, %2
43 %mul6 = mul i32 %mul5, %3 44 %mul6 = mul i32 %mul5, %3
44 store i32 %mul6, i32* %ptr2.addr.08, align 4 45 store i32 %mul6, i32* %ptr2.addr.08, align 4
45 %incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1 46 %incdec.ptr = getelementptr inbounds i32, i32* %ptr2.addr.08, i32 -1
46 %tobool = icmp eq i32* %incdec.ptr, null 47 %tobool = icmp eq i32* %incdec.ptr, null
47 br i1 %tobool, label %while.end, label %while.body 48 br i1 %tobool, label %while.end, label %while.body
48 49
49 while.end: 50 while.end:
50 ret void 51 ret void
53 ; Allow partial CPSR dependency when code size is the priority. 54 ; Allow partial CPSR dependency when code size is the priority.
54 ; rdar://12878928 55 ; rdar://12878928
55 define void @t3(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind minsize { 56 define void @t3(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind minsize {
56 entry: 57 entry:
57 ; CHECK-LABEL: t3: 58 ; CHECK-LABEL: t3:
58 %tobool7 = icmp eq i32* %ptr2, null 59 br label %while.body
59 br i1 %tobool7, label %while.end, label %while.body
60 60
61 while.body: 61 while.body:
62 ; CHECK: while.body 62 ; CHECK: while.body
63 ; CHECK: mul r{{[0-9]+}} 63 ; CHECK: mul r{{[0-9]+}}
64 ; CHECK: muls 64 ; CHECK: muls
65 %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ] 65 %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ]
66 %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ] 66 %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ]
67 %0 = load i32* %ptr1.addr.09, align 4 67 %0 = load i32, i32* %ptr1.addr.09, align 4
68 %arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1 68 %arrayidx1 = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 1
69 %1 = load i32* %arrayidx1, align 4 69 %1 = load i32, i32* %arrayidx1, align 4
70 %arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2 70 %arrayidx3 = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 2
71 %2 = load i32* %arrayidx3, align 4 71 %2 = load i32, i32* %arrayidx3, align 4
72 %arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3 72 %arrayidx4 = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 3
73 %3 = load i32* %arrayidx4, align 4 73 %3 = load i32, i32* %arrayidx4, align 4
74 %add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4 74 %add.ptr = getelementptr inbounds i32, i32* %ptr1.addr.09, i32 4
75 %mul = mul i32 %1, %0 75 %mul = mul i32 %1, %0
76 %mul5 = mul i32 %mul, %2 76 %mul5 = mul i32 %mul, %2
77 %mul6 = mul i32 %mul5, %3 77 %mul6 = mul i32 %mul5, %3
78 store i32 %mul6, i32* %ptr2.addr.08, align 4 78 store i32 %mul6, i32* %ptr2.addr.08, align 4
79 %incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1 79 %incdec.ptr = getelementptr inbounds i32, i32* %ptr2.addr.08, i32 -1
80 %tobool = icmp eq i32* %incdec.ptr, null 80 %tobool = icmp eq i32* %incdec.ptr, null
81 br i1 %tobool, label %while.end, label %while.body 81 br i1 %tobool, label %while.end, label %while.body
82 82
83 while.end: 83 while.end:
84 ret void 84 ret void
90 entry: 90 entry:
91 ; CHECK: t4 91 ; CHECK: t4
92 ; CHECK: vmrs APSR_nzcv, fpscr 92 ; CHECK: vmrs APSR_nzcv, fpscr
93 ; CHECK: if.then 93 ; CHECK: if.then
94 ; CHECK-NOT: movs 94 ; CHECK-NOT: movs
95 %0 = load double* %q, align 4 95 %0 = load double, double* %q, align 4
96 %cmp = fcmp olt double %0, 1.000000e+01 96 %cmp = fcmp olt double %0, 1.000000e+01
97 %incdec.ptr1 = getelementptr inbounds i32* %p, i32 1 97 %incdec.ptr1 = getelementptr inbounds i32, i32* %p, i32 1
98 br i1 %cmp, label %if.then, label %if.else 98 br i1 %cmp, label %if.then, label %if.else
99 99
100 if.then: 100 if.then:
101 store i32 7, i32* %p, align 4 101 store i32 7, i32* %p, align 4
102 %incdec.ptr2 = getelementptr inbounds i32* %p, i32 2 102 %incdec.ptr2 = getelementptr inbounds i32, i32* %p, i32 2
103 store i32 8, i32* %incdec.ptr1, align 4 103 store i32 8, i32* %incdec.ptr1, align 4
104 store i32 9, i32* %incdec.ptr2, align 4 104 store i32 9, i32* %incdec.ptr2, align 4
105 br label %if.end 105 br label %if.end
106 106
107 if.else: 107 if.else:
108 store i32 3, i32* %p, align 4 108 store i32 3, i32* %p, align 4
109 %incdec.ptr5 = getelementptr inbounds i32* %p, i32 2 109 %incdec.ptr5 = getelementptr inbounds i32, i32* %p, i32 2
110 store i32 5, i32* %incdec.ptr1, align 4 110 store i32 5, i32* %incdec.ptr1, align 4
111 store i32 6, i32* %incdec.ptr5, align 4 111 store i32 6, i32* %incdec.ptr5, align 4
112 br label %if.end 112 br label %if.end
113 113
114 if.end: 114 if.end: