Mercurial > hg > CbC > CbC_llvm
comparison test/CodeGen/X86/i486-fence-loop.ll @ 95:afa8332a0e37 LLVM3.8
LLVM 3.8
author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
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date | Tue, 13 Oct 2015 17:48:58 +0900 |
parents | 95c75e76d11b |
children | 803732b1fca8 |
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84:f3e34b893a5f | 95:afa8332a0e37 |
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5 ; cycle could be formed so it tried to use "sub (%eax), [[RHS]]". | 5 ; cycle could be formed so it tried to use "sub (%eax), [[RHS]]". |
6 | 6 |
7 define void @gst_atomic_queue_push(i32* %addr) { | 7 define void @gst_atomic_queue_push(i32* %addr) { |
8 ; CHECK-LABEL: gst_atomic_queue_push: | 8 ; CHECK-LABEL: gst_atomic_queue_push: |
9 ; CHECK: movl (%eax), [[LHS:%e[a-z]+]] | 9 ; CHECK: movl (%eax), [[LHS:%e[a-z]+]] |
10 ; CHECK: lock | 10 ; CHECK: lock orl |
11 ; CHECK-NEXT: orl | |
12 ; CHECK: movl (%eax), [[RHS:%e[a-z]+]] | 11 ; CHECK: movl (%eax), [[RHS:%e[a-z]+]] |
13 ; CHECK: cmpl [[LHS]], [[RHS]] | 12 ; CHECK: cmpl [[LHS]], [[RHS]] |
14 | 13 |
15 entry: | 14 entry: |
16 br label %while.body | 15 br label %while.body |
17 | 16 |
18 while.body: | 17 while.body: |
19 %0 = load volatile i32* %addr, align 4 | 18 %0 = load volatile i32, i32* %addr, align 4 |
20 fence seq_cst | 19 fence seq_cst |
21 %1 = load volatile i32* %addr, align 4 | 20 %1 = load volatile i32, i32* %addr, align 4 |
22 %cmp = icmp sgt i32 %1, %0 | 21 %cmp = icmp sgt i32 %1, %0 |
23 br i1 %cmp, label %while.body, label %if.then | 22 br i1 %cmp, label %while.body, label %if.then |
24 | 23 |
25 if.then: | 24 if.then: |
26 ret void | 25 ret void |