diff test/CodeGen/AMDGPU/bitreverse.ll @ 134:3a76565eade5 LLVM5.0.1

update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children c2174574ed3a
line wrap: on
line diff
--- a/test/CodeGen/AMDGPU/bitreverse.ll	Fri Feb 16 19:10:49 2018 +0900
+++ b/test/CodeGen/AMDGPU/bitreverse.ll	Sat Feb 17 09:57:20 2018 +0900
@@ -15,7 +15,7 @@
 declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1
 
 ; FUNC-LABEL: {{^}}s_brev_i16:
-; SI: s_brev_b32 
+; SI: s_brev_b32
 define amdgpu_kernel void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 {
   %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
   store i16 %brev, i16 addrspace(1)* %out
@@ -113,5 +113,16 @@
   ret void
 }
 
+; FUNC-LABEL: {{^}}missing_truncate_promote_bitreverse:
+; VI: v_bfrev_b32_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
+define float @missing_truncate_promote_bitreverse(i32 %arg) {
+bb:
+  %tmp = trunc i32 %arg to i16
+  %tmp1 = call i16 @llvm.bitreverse.i16(i16 %tmp)
+  %tmp2 = bitcast i16 %tmp1 to half
+  %tmp3 = fpext half %tmp2 to float
+  ret float %tmp3
+}
+
 attributes #0 = { nounwind }
 attributes #1 = { nounwind readnone }