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annotate test/CodeGen/AMDGPU/bitreverse.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children c2174574ed3a
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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3 ; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s
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4
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5 declare i32 @llvm.amdgcn.workitem.id.x() #1
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6
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7 declare i16 @llvm.bitreverse.i16(i16) #1
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8 declare i32 @llvm.bitreverse.i32(i32) #1
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9 declare i64 @llvm.bitreverse.i64(i64) #1
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10
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11 declare <2 x i32> @llvm.bitreverse.v2i32(<2 x i32>) #1
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12 declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) #1
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13
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14 declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1
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15 declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1
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16
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17 ; FUNC-LABEL: {{^}}s_brev_i16:
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18 ; SI: s_brev_b32
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19 define amdgpu_kernel void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 {
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20 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
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21 store i16 %brev, i16 addrspace(1)* %out
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22 ret void
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23 }
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24
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25 ; FUNC-LABEL: {{^}}v_brev_i16:
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26 ; SI: v_bfrev_b32_e32
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27 define amdgpu_kernel void @v_brev_i16(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) #0 {
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28 %val = load i16, i16 addrspace(1)* %valptr
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29 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
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30 store i16 %brev, i16 addrspace(1)* %out
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31 ret void
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32 }
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33
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34 ; FUNC-LABEL: {{^}}s_brev_i32:
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35 ; SI: s_load_dword [[VAL:s[0-9]+]],
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36 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
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37 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
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38 ; SI: buffer_store_dword [[VRESULT]],
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39 ; SI: s_endpgm
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40 define amdgpu_kernel void @s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) #0 {
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41 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
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42 store i32 %brev, i32 addrspace(1)* %out
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43 ret void
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44 }
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45
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46 ; FUNC-LABEL: {{^}}v_brev_i32:
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47 ; SI: {{buffer|flat}}_load_dword [[VAL:v[0-9]+]],
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48 ; SI: v_bfrev_b32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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49 ; SI: buffer_store_dword [[RESULT]],
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50 ; SI: s_endpgm
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51 define amdgpu_kernel void @v_brev_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) #0 {
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52 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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53 %gep = getelementptr i32, i32 addrspace(1)* %valptr, i32 %tid
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54 %val = load i32, i32 addrspace(1)* %gep
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55 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
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56 store i32 %brev, i32 addrspace(1)* %out
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57 ret void
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58 }
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59
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60 ; FUNC-LABEL: {{^}}s_brev_v2i32:
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61 ; SI: s_brev_b32
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62 ; SI: s_brev_b32
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63 define amdgpu_kernel void @s_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> %val) #0 {
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64 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1
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65 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out
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66 ret void
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67 }
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68
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69 ; FUNC-LABEL: {{^}}v_brev_v2i32:
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70 ; SI: v_bfrev_b32_e32
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71 ; SI: v_bfrev_b32_e32
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72 define amdgpu_kernel void @v_brev_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) #0 {
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73 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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74 %gep = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %valptr, i32 %tid
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75 %val = load <2 x i32>, <2 x i32> addrspace(1)* %gep
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76 %brev = call <2 x i32> @llvm.bitreverse.v2i32(<2 x i32> %val) #1
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77 store <2 x i32> %brev, <2 x i32> addrspace(1)* %out
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78 ret void
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79 }
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80
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81 ; FUNC-LABEL: {{^}}s_brev_i64:
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82 define amdgpu_kernel void @s_brev_i64(i64 addrspace(1)* noalias %out, i64 %val) #0 {
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83 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1
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84 store i64 %brev, i64 addrspace(1)* %out
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85 ret void
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86 }
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87
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88 ; FUNC-LABEL: {{^}}v_brev_i64:
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89 ; SI-NOT: v_or_b32_e64 v{{[0-9]+}}, 0, 0
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90 define amdgpu_kernel void @v_brev_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %valptr) #0 {
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91 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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92 %gep = getelementptr i64, i64 addrspace(1)* %valptr, i32 %tid
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93 %val = load i64, i64 addrspace(1)* %gep
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94 %brev = call i64 @llvm.bitreverse.i64(i64 %val) #1
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95 store i64 %brev, i64 addrspace(1)* %out
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96 ret void
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97 }
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98
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99 ; FUNC-LABEL: {{^}}s_brev_v2i64:
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100 define amdgpu_kernel void @s_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %val) #0 {
100
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101 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
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102 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
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103 ret void
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104 }
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105
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106 ; FUNC-LABEL: {{^}}v_brev_v2i64:
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107 define amdgpu_kernel void @v_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrspace(1)* noalias %valptr) #0 {
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108 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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109 %gep = getelementptr <2 x i64> , <2 x i64> addrspace(1)* %valptr, i32 %tid
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110 %val = load <2 x i64>, <2 x i64> addrspace(1)* %gep
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111 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
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112 store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
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113 ret void
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114 }
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115
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116 ; FUNC-LABEL: {{^}}missing_truncate_promote_bitreverse:
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117 ; VI: v_bfrev_b32_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
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118 define float @missing_truncate_promote_bitreverse(i32 %arg) {
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119 bb:
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120 %tmp = trunc i32 %arg to i16
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121 %tmp1 = call i16 @llvm.bitreverse.i16(i16 %tmp)
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122 %tmp2 = bitcast i16 %tmp1 to half
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123 %tmp3 = fpext half %tmp2 to float
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124 ret float %tmp3
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125 }
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126
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127 attributes #0 = { nounwind }
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128 attributes #1 = { nounwind readnone }