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diff test/CodeGen/X86/mmx-bitcast.ll @ 134:3a76565eade5 LLVM5.0.1

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update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 803732b1fca8
children
line wrap: on
line diff
--- a/test/CodeGen/X86/mmx-bitcast.ll	Fri Feb 16 19:10:49 2018 +0900
+++ b/test/CodeGen/X86/mmx-bitcast.ll	Sat Feb 17 09:57:20 2018 +0900
@@ -3,10 +3,10 @@
 
 define i64 @t0(x86_mmx* %p) {
 ; CHECK-LABEL: t0:
-; CHECK:       ## BB#0:
+; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddq %mm0, %mm0
-; CHECK-NEXT:    movd %mm0, %rax
+; CHECK-NEXT:    movq %mm0, %rax
 ; CHECK-NEXT:    retq
   %t = load x86_mmx, x86_mmx* %p
   %u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t)
@@ -16,10 +16,10 @@
 
 define i64 @t1(x86_mmx* %p) {
 ; CHECK-LABEL: t1:
-; CHECK:       ## BB#0:
+; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddd %mm0, %mm0
-; CHECK-NEXT:    movd %mm0, %rax
+; CHECK-NEXT:    movq %mm0, %rax
 ; CHECK-NEXT:    retq
   %t = load x86_mmx, x86_mmx* %p
   %u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t)
@@ -29,10 +29,10 @@
 
 define i64 @t2(x86_mmx* %p) {
 ; CHECK-LABEL: t2:
-; CHECK:       ## BB#0:
+; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddw %mm0, %mm0
-; CHECK-NEXT:    movd %mm0, %rax
+; CHECK-NEXT:    movq %mm0, %rax
 ; CHECK-NEXT:    retq
   %t = load x86_mmx, x86_mmx* %p
   %u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t)
@@ -42,10 +42,10 @@
 
 define i64 @t3(x86_mmx* %p) {
 ; CHECK-LABEL: t3:
-; CHECK:       ## BB#0:
+; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    paddb %mm0, %mm0
-; CHECK-NEXT:    movd %mm0, %rax
+; CHECK-NEXT:    movq %mm0, %rax
 ; CHECK-NEXT:    retq
   %t = load x86_mmx, x86_mmx* %p
   %u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t)
@@ -57,9 +57,9 @@
 
 define void @t4(<1 x i64> %A, <1 x i64> %B) {
 ; CHECK-LABEL: t4:
-; CHECK:       ## BB#0: ## %entry
-; CHECK-NEXT:    movd %rdi, %mm0
-; CHECK-NEXT:    movd %rsi, %mm1
+; CHECK:       ## %bb.0: ## %entry
+; CHECK-NEXT:    movq %rdi, %mm0
+; CHECK-NEXT:    movq %rsi, %mm1
 ; CHECK-NEXT:    paddusw %mm0, %mm1
 ; CHECK-NEXT:    movq _R@{{.*}}(%rip), %rax
 ; CHECK-NEXT:    movq %mm1, (%rax)
@@ -76,7 +76,7 @@
 
 define i64 @t5(i32 %a, i32 %b) nounwind readnone {
 ; CHECK-LABEL: t5:
-; CHECK:       ## BB#0:
+; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    movd %esi, %xmm0
 ; CHECK-NEXT:    movd %edi, %xmm1
 ; CHECK-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
@@ -92,10 +92,10 @@
 
 define <1 x i64> @t6(i64 %t) {
 ; CHECK-LABEL: t6:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    movd %rdi, %mm0
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    movq %rdi, %mm0
 ; CHECK-NEXT:    psllq $48, %mm0
-; CHECK-NEXT:    movd %mm0, %rax
+; CHECK-NEXT:    movq %mm0, %rax
 ; CHECK-NEXT:    retq
   %t1 = insertelement <1 x i64> undef, i64 %t, i32 0
   %t0 = bitcast <1 x i64> %t1 to x86_mmx