Mercurial > hg > CbC > CbC_llvm
diff test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll @ 95:afa8332a0e37 LLVM3.8
LLVM 3.8
| author | Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 13 Oct 2015 17:48:58 +0900 |
| parents | 95c75e76d11b |
| children |
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--- a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll Wed Feb 18 14:56:07 2015 +0900 +++ b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll Tue Oct 13 17:48:58 2015 +0900 @@ -12,17 +12,17 @@ define i32 @interpret_threaded(i8* nocapture %opcodes) nounwind readonly optsize { entry: - %0 = load i8* %opcodes, align 1 ; <i8> [#uses=1] + %0 = load i8, i8* %opcodes, align 1 ; <i8> [#uses=1] %1 = zext i8 %0 to i32 ; <i32> [#uses=1] - %2 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1] + %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %1 ; <i8**> [#uses=1] br label %bb bb: ; preds = %bb.backedge, %entry %indvar = phi i32 [ %phitmp, %bb.backedge ], [ 1, %entry ] ; <i32> [#uses=2] %gotovar.22.0.in = phi i8** [ %gotovar.22.0.in.be, %bb.backedge ], [ %2, %entry ] ; <i8**> [#uses=1] %result.0 = phi i32 [ %result.0.be, %bb.backedge ], [ 0, %entry ] ; <i32> [#uses=6] - %opcodes_addr.0 = getelementptr i8* %opcodes, i32 %indvar ; <i8*> [#uses=4] - %gotovar.22.0 = load i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1] + %opcodes_addr.0 = getelementptr i8, i8* %opcodes, i32 %indvar ; <i8*> [#uses=4] + %gotovar.22.0 = load i8*, i8** %gotovar.22.0.in, align 4 ; <i8*> [#uses=1] indirectbr i8* %gotovar.22.0, [label %RETURN, label %INCREMENT, label %DECREMENT, label %DOUBLE, label %SWAPWORD] RETURN: ; preds = %bb @@ -30,9 +30,9 @@ INCREMENT: ; preds = %bb %3 = add nsw i32 %result.0, 1 ; <i32> [#uses=1] - %4 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %4 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] %5 = zext i8 %4 to i32 ; <i32> [#uses=1] - %6 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1] + %6 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %5 ; <i8**> [#uses=1] br label %bb.backedge bb.backedge: ; preds = %SWAPWORD, %DOUBLE, %DECREMENT, %INCREMENT @@ -43,24 +43,24 @@ DECREMENT: ; preds = %bb %7 = add i32 %result.0, -1 ; <i32> [#uses=1] - %8 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %8 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] %9 = zext i8 %8 to i32 ; <i32> [#uses=1] - %10 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1] + %10 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %9 ; <i8**> [#uses=1] br label %bb.backedge DOUBLE: ; preds = %bb %11 = shl i32 %result.0, 1 ; <i32> [#uses=1] - %12 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %12 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] %13 = zext i8 %12 to i32 ; <i32> [#uses=1] - %14 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1] + %14 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %13 ; <i8**> [#uses=1] br label %bb.backedge SWAPWORD: ; preds = %bb %15 = shl i32 %result.0, 16 ; <i32> [#uses=1] %16 = ashr i32 %result.0, 16 ; <i32> [#uses=1] %17 = or i32 %15, %16 ; <i32> [#uses=1] - %18 = load i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] + %18 = load i8, i8* %opcodes_addr.0, align 1 ; <i8> [#uses=1] %19 = zext i8 %18 to i32 ; <i32> [#uses=1] - %20 = getelementptr inbounds [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1] + %20 = getelementptr inbounds [5 x i8*], [5 x i8*]* @codetable.2928, i32 0, i32 %19 ; <i8**> [#uses=1] br label %bb.backedge }