view llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll @ 266:00f31e85ec16 default tip

Added tag current for changeset 31d058e83c98
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Sat, 14 Oct 2023 10:13:55 +0900
parents 1f2b6ac9f198
children
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; RUN: llc < %s -march=r600 -mtriple=r600-- -mcpu=redwood | FileCheck %s

; This tests for a bug in the SelectionDAG where custom lowered truncated
; vector stores at the end of a basic block were not being added to the
; LegalizedNodes list, which triggered an assertion failure.

; CHECK-LABEL: {{^}}test:
; CHECK: MEM_RAT_CACHELESS STORE_RAW
define amdgpu_kernel void @test(ptr addrspace(1) %out, i32 %cond, <4 x i8> %in) {
entry:
  %0 = icmp eq i32 %cond, 0
  br i1 %0, label %if, label %done

if:
  store <4 x i8> %in, ptr addrspace(1) %out
  br label %done

done:
  ret void
}