Mercurial > hg > Game > Cerium
annotate TaskManager/include/types.h @ 631:30dd8a3deb4a draft
Cell 64 bit tried, but not yet worked.
Cell's list DMA is 32bit.
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
---|---|
date | Wed, 18 Nov 2009 13:32:58 +0900 |
parents | 0e91ddaad798 |
children | 7ba4ad4538b1 |
rev | line source |
---|---|
46 | 1 #ifndef INCLUDED_TYPES |
2 #define INCLUDED_TYPES | |
3 | |
109 | 4 #include <stdint.h> |
5 | |
387
b6fce69839b5
no compile error but not worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
367
diff
changeset
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6 typedef uint16_t uint16; |
109 | 7 typedef uint32_t uint32; |
8 typedef uint64_t uint64; | |
395 | 9 |
631
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Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
626
diff
changeset
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10 // HOST main memory address |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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changeset
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11 // SPU's (void *) is always 32bit (actually 18bit (256kbyte)) |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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12 // memaddr is different from (void *) in SPU. |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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13 // |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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14 #ifdef __SPU__ |
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Cell 64 bit tried, but not yet worked.
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parents:
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15 #if ABIBIT>32 |
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Cell 64 bit tried, but not yet worked.
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parents:
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16 typedef uint64_t memaddr; |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
626
diff
changeset
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17 #else |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
626
diff
changeset
|
18 typedef uint32_t memaddr; |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
626
diff
changeset
|
19 #endif |
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
626
diff
changeset
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20 #else |
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64bit mode worked on Mac OS X.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
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21 typedef char* memaddr; |
631
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Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
626
diff
changeset
|
22 #endif |
395 | 23 |
24 | |
46 | 25 #define SPE_ALIGNMENT 16 |
26 #define SPE_ALIGNMENT_FULL 128 | |
27 #define SPE_ALIGN __attribute__((aligned(SPE_ALIGNMENT))) | |
28 #define SPE_ALIGN_FULL __attribute__((aligned(SPE_ALIGNMENT_FULL)) | |
29 #define ROUND_UP_ALIGN(value, alignment) \ | |
30 (((value) + ((alignment) - 1))&(~((alignment)-1))) | |
31 #define DEFAULT_ALIGNMENT SPE_ALIGNMENT | |
109 | 32 //#define DEFAULT_ALIGNMENT SPE_ALIGNMENT_FULL |
46 | 33 |
58 | 34 #define DMA_MAX_SIZE 16384 |
35 | |
88 | 36 #define round_up16(value) ROUND_UP_ALIGN(value, 16) |
37 #define round_up128(value) ROUND_UP_ALIGN(value, 128) | |
38 | |
298 | 39 // ここも typedef しとくか? |
46 | 40 enum { |
298 | 41 // どの方向かで enum 分けるだろjk... |
109 | 42 // PPE -> SPE |
43 MY_SPE_NOP = 0, | |
46 | 44 MY_SPE_COMMAND_EXIT, |
45 MY_SPE_COMMAND_GO, | |
46 | |
109 | 47 // SPE -> PPE |
46 | 48 MY_SPE_STATUS_BUSY, |
109 | 49 MY_SPE_STATUS_READY, |
50 MY_SPE_COMMAND_MALLOC, | |
46 | 51 }; |
52 | |
109 | 53 #define MAX_USE_SPE_NUM 6 |
54 | |
65 | 55 typedef enum { |
109 | 56 CPU_PPE = 0, // default |
57 CPU_SPE = 1, | |
58 SPE_ANY = CPU_SPE, | |
59 SPE_0 = 2, | |
60 SPE_1 = 3, | |
61 SPE_2 = 4, | |
62 SPE_3 = 5, | |
63 SPE_4 = 6, | |
64 SPE_5 = 7, | |
65 | 65 } CPU_TYPE; |
66 | |
46 | 67 #endif |