Mercurial > hg > Game > Cerium
annotate TaskManager/Cell/spe/CellDmaManager.h @ 1021:47ca99c5cf84 draft
use MailManager
author | yutaka@localhost.localdomain |
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date | Sun, 07 Nov 2010 22:10:29 +0900 |
parents | 16afbf03e5d2 |
children | cf0ad93028e9 |
rev | line source |
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32 | 1 #ifndef INCLUDED_CELL_DMA_MANAGER |
2 #define INCLUDED_CELL_DMA_MANAGER | |
3 | |
307 | 4 #include "base.h" |
611 | 5 #include "types.h" |
307 | 6 #include "DmaManager.h" |
1021 | 7 #include "MailManager.h" |
32 | 8 |
88 | 9 #include <spu_mfcio.h> |
1007 | 10 #include <spu_intrinsics.h> |
88 | 11 |
242 | 12 #define SPU_PROFILE 1 |
13 | |
736 | 14 class Scheduler; |
15 | |
32 | 16 class CellDmaManager : public DmaManager { |
17 public: | |
109 | 18 BASE_NEW_DELETE(CellDmaManager); |
19 | |
88 | 20 typedef struct dma_list { |
631
30dd8a3deb4a
Cell 64 bit tried, but not yet worked.
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
611
diff
changeset
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21 uint32 addr; // should be memaddr, but in Cell's specification... |
88 | 22 uint32 size; |
895
b662e9dd26b0
add alignment of classes in SPU
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents:
736
diff
changeset
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23 } __attribute__ ((aligned (DEFAULT_ALIGNMENT))) DmaList, *DmaListPtr; |
88 | 24 |
672 | 25 |
26 CellDmaManager() ; | |
27 | |
88 | 28 /* variables */ |
999
aed8b3ca5537
Measurement of mainMem_alloc at waiting time. not done.
tkaito
parents:
970
diff
changeset
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29 unsigned int wait_time, busy_time, alloc_busy_time; |
aed8b3ca5537
Measurement of mainMem_alloc at waiting time. not done.
tkaito
parents:
970
diff
changeset
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30 unsigned long long global_busy_time, global_wait_time, global_mail_time, mainMemalloc_time; |
1001 | 31 unsigned long long task_array_load_time; |
88 | 32 |
32 | 33 /* functions */ |
364 | 34 void dma_load(void *buf, memaddr addr, uint32 size, uint32 mask); |
365 | 35 void dma_store(void *buf, memaddr addr, uint32 size, uint32 mask); |
88 | 36 void dma_wait(uint32 mask) ; |
970
1a4849b2acad
change pipeline and TaskArray fast
Yutaka Kinjyo <yutaka@cr.ie.u-ryukyu.ac.jp>
parents:
899
diff
changeset
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37 void dma_wait(uint32 mask, int cmd) ; |
672 | 38 void (CellDmaManager::*start_dmawait_profile)(); |
676 | 39 void (CellDmaManager::*end_dmawait_profile)(unsigned long long *counter); |
672 | 40 void start_profile(); |
41 void stop_profile(); | |
42 | |
43 | |
1001 | 44 void show_dma_wait(Scheduler *s, int cpu); |
88 | 45 |
611 | 46 void mail_write(memaddr data); |
1007 | 47 void mail_write_queue(memaddr data); |
48 void mail_write_finish_list(memaddr data); | |
611 | 49 memaddr mail_read(); |
109 | 50 void dma_loadList(ListDataPtr list, void *buff, uint32 mask); |
51 void dma_storeList(ListDataPtr, void *buff, uint32 mask); | |
672 | 52 |
53 private: | |
54 | |
55 void do_start_dmawait_profile(); | |
676 | 56 void do_end_dmawait_profile(unsigned long long *counter); |
672 | 57 void null_start_dmawait_profile(); |
676 | 58 void null_end_dmawait_profile(unsigned long long *counter); |
672 | 59 |
1021 | 60 MailManagerPtr mail_queue; |
61 | |
672 | 62 |
63 /* end */ | |
899 | 64 } ; |
32 | 65 |
66 #endif |