Mercurial > hg > Game > Cerium
changeset 1221:2a4ba6366394 draft
fix CellDmaManager
| author | Daichi TOMA <amothic@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Sat, 23 Jul 2011 07:16:53 +0900 |
| parents | 5d62049098bc |
| children | d9f2e56bba86 |
| files | TaskManager/Cell/spe/CellDmaManager.cc TaskManager/Cell/spe/CellDmaManager.h TaskManager/Cell/spe/CellScheduler.cc example/Prime/Makefile.def |
| diffstat | 4 files changed, 20 insertions(+), 18 deletions(-) [+] |
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--- a/TaskManager/Cell/spe/CellDmaManager.cc Sat Jul 23 06:22:06 2011 +0900 +++ b/TaskManager/Cell/spe/CellDmaManager.cc Sat Jul 23 07:16:53 2011 +0900 @@ -20,11 +20,11 @@ if ((unsigned long)addr&0xf) { //s->printf("dma_load is not aligned. addr = 0x%lx, size = %d\n", // (unsigned long)addr, size); - return ; + return buf; } - if (size == 0) return ; - if (s) buf = s->allocate(size); + if (size == 0) return buf; + if (s) buf = s->manager->allocate(size); mfc_get((volatile void *)buf, addr, size, mask, 0, 0); return buf; @@ -33,7 +33,7 @@ void * CellDmaManager::get_writebuf(Scheduler *s,memaddr addr, uint32 size) { - void *b = s->allocaet(size); + void *b = s->manager->allocate(size); return b; } @@ -45,10 +45,11 @@ * @param[in] size Size of Store Data * @param[in] mask DMA tag */ -void CellDmaManager::dma_store(void *buf, memaddr addr, uint32 size, uint32 mask) +void* CellDmaManager::dma_store(Scheduler *s,void *buf, memaddr addr, uint32 size, uint32 mask) { - if (size == 0) return ; + if (size == 0) return buf; mfc_put((volatile void *)buf, addr, size, mask, 0, 0); + return buf; } void CellDmaManager::dma_wait(uint32 mask) @@ -197,7 +198,7 @@ void *CellDmaManager::dma_loadList(Scheduler *s, ListDataPtr list, void *buff, uint32 mask) { - buff = s->allocate(list->size); + buff = s->manager->allocate(list->size); mfc_getl(buff, 0, list->element, sizeof(mfc_list_element_t)*list->length, mask, 0, 0); @@ -213,7 +214,7 @@ void * CellDmaManager::get_writebuf(Scheduler *s,ListDataPtr addr, uint32 size) { - void *b = s->allocate(addr->size); + void *b = s->manager->allocate(addr->size); return b; }
--- a/TaskManager/Cell/spe/CellDmaManager.h Sat Jul 23 06:22:06 2011 +0900 +++ b/TaskManager/Cell/spe/CellDmaManager.h Sat Jul 23 07:16:53 2011 +0900 @@ -5,6 +5,7 @@ #include "types.h" #include "DmaManager.h" #include "MailManager.h" +#include "TaskManagerImpl.h" #include <spu_mfcio.h> #include <spu_intrinsics.h> @@ -34,10 +35,10 @@ int task_list_read_count; /* functions */ - void dma_load(Scheduler *s,void *buf, memaddr addr, uint32 size, uint32 mask); - void dma_store(Scheduler *s,void *buf, memaddr addr, uint32 size, uint32 mask); + void *dma_load(Scheduler *s,void *buf, memaddr addr, uint32 size, uint32 mask); + void *dma_store(Scheduler *s,void *buf, memaddr addr, uint32 size, uint32 mask); - void *get_writebuf(Schduler *s, memaddr addr, uint32 size) ; + void *get_writebuf(Scheduler *s, memaddr addr, uint32 size); void dma_wait(uint32 mask) ; void dma_wait(uint32 mask, int cmd) ; @@ -54,7 +55,7 @@ void mail_write_finish_list(memaddr data); memaddr mail_read(); memaddr task_list_mail_read(); - void dma_loadList(Scheduler *s,ListDataPtr list, void *buff, uint32 mask); + void *dma_loadList(Scheduler *s,ListDataPtr list, void *buff, uint32 mask); void dma_storeList(ListDataPtr, void *buff, uint32 mask); uint32 get_tag(); void bound(ListData *);
--- a/TaskManager/Cell/spe/CellScheduler.cc Sat Jul 23 06:22:06 2011 +0900 +++ b/TaskManager/Cell/spe/CellScheduler.cc Sat Jul 23 07:16:53 2011 +0900 @@ -36,9 +36,9 @@ alloc_flag = 1; mainMemNum++; - mail_write((memaddr)MY_SPE_COMMAND_MALLOC); - mail_write((memaddr)id); - mail_write((memaddr)size); + connector->mail_write((memaddr)MY_SPE_COMMAND_MALLOC); + connector->mail_write((memaddr)id); + connector->mail_write((memaddr)size); } void @@ -48,8 +48,8 @@ memaddr addr; while (mainMemNum > 0) { - id = (unsigned long)mail_read(); - addr = mail_read(); + id = (unsigned long)connector->mail_read(); + addr = connector->mail_read(); mainMemList[id] = (memaddr)addr; mainMemNum--;