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view TaskManager/Cell/spe/CellDmaManager.h @ 1048:40cde8c1a6cd default tip
add ScaleXY (not for allExecute...)
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Wed, 08 Dec 2010 06:22:15 +0900 |
parents | 19a57960c436 |
children |
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#ifndef INCLUDED_CELL_DMA_MANAGER #define INCLUDED_CELL_DMA_MANAGER #include "base.h" #include "types.h" #include "DmaManager.h" #include "MailManager.h" #include <spu_mfcio.h> #include <spu_intrinsics.h> #define SPU_PROFILE 1 class Scheduler; class CellDmaManager : public DmaManager { public: BASE_NEW_DELETE(CellDmaManager); typedef struct dma_list { uint32 addr; // should be memaddr, but in Cell's specification... uint32 size; } __attribute__ ((aligned (DEFAULT_ALIGNMENT))) DmaList, *DmaListPtr; CellDmaManager() ; /* variables */ unsigned int wait_time, busy_time, alloc_busy_time; unsigned long long global_busy_time, global_wait_time, global_mail_time, mainMemalloc_time; unsigned long long task_array_load_time; unsigned long long task_list_mail_time; /* functions */ void dma_load(void *buf, memaddr addr, uint32 size, uint32 mask); void dma_store(void *buf, memaddr addr, uint32 size, uint32 mask); void dma_wait(uint32 mask) ; void dma_wait(uint32 mask, int cmd) ; void (CellDmaManager::*start_dmawait_profile)(); void (CellDmaManager::*end_dmawait_profile)(unsigned long long *counter); void start_profile(); void stop_profile(); void show_dma_wait(Scheduler *s, int cpu); void mail_write(memaddr data); void mail_write_queue(memaddr data); void mail_write_finish_list(memaddr data); memaddr mail_read(); memaddr task_list_mail_read(); void dma_loadList(ListDataPtr list, void *buff, uint32 mask); void dma_storeList(ListDataPtr, void *buff, uint32 mask); private: void do_start_dmawait_profile(); void do_end_dmawait_profile(unsigned long long *counter); void null_start_dmawait_profile(); void null_end_dmawait_profile(unsigned long long *counter); MailManagerPtr mail_queue; /* end */ } ; #endif