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annotate level1/modules/dwread.asm @ 2772:0a3f4d8ea6d5

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Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected. Moved the native 6309 code in dwread.asm and dwwrite.asm into the H6309 labeled area and changed IFEQ H6309 to IFNE H6309. Also moved the 57600bps 6809 code to the default location. This change had been done in the old dwread.asm and dwwrite.asm files to make it easier to follow. Though these two files were overwritten from the HDBDOS project dwread.asm and dwwrite.asm files. So this conversion needed to be done again so it made the source easier to follow.
author drencor-xeen
date Wed, 23 Jan 2013 12:36:55 -0600
parents 8b2df903334c
children fea5c20fdbfe
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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2772
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
1 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
2 *
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
3 * DWRead
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
4 * Receive a response from the DriveWire server.
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
5 * Times out if serial port goes idle for more than 1.4 (0.7) seconds.
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
6 * Serial data format: 1-8-N-1
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
7 * 4/12/2009 by Darren Atkinson
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
8 *
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
9 * Entry:
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
10 * X = starting address where data is to be stored
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
11 * Y = number of bytes expected
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
12 *
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
13 * Exit:
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
14 * CC = carry set on framing error, Z set if all bytes received
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
15 * X = starting address of data received
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
16 * Y = checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
17 * U is preserved. All accumulators are clobbered
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
18 *
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
19
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
20 IFNE ARDUINO
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
21 * Note: this is an optimistic routine. It presumes that the server will always be there, and
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
22 * has NO timeout fallback. It is also very short and quick.
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
23 DWRead clra ; clear Carry (no framing error)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
24 pshs u,x,cc ; preserve registers
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
25 leau ,x
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
26 ldx #$0000
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
27 loop@ tst $FF51 ; check for CA1 bit (1=Arduino has byte ready)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
28 bpl loop@ ; loop if not set
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
29 ldb $FF50 ; clear CA1 bit in status register
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
30 stb ,u+ ; save off acquired byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
31 abx ; update checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
32 leay ,-y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
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parents: 2771
diff changeset
33 bne loop@
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
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parents: 2771
diff changeset
34
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
35 leay ,x ; return checksum in Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
36 puls cc,x,u,pc ; restore registers and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
37
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
38 ELSE
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
39
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
40 IFNE JMCPBCK
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
41 * NOTE: There is no timeout currently on here...
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
42 DWRead clra ; clear Carry (no framing error)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
43 deca ; clear Z flag, A = timeout msb ($ff)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
44 tfr cc,b
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
45 pshs u,x,dp,b,a ; preserve registers, push timeout msb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
46 leau ,x
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
47 ldx #$0000
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
48 orcc #IntMasks
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
49 loop@ ldb $FF4C
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
50 bitb #$02
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
51 beq loop@
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
52 ldb $FF44
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
53 stb ,u+
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
54 abx
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
55 leay ,-y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
56 bne loop@
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
57
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
58 tfr x,y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
59 ldb #0
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
60 lda #3
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
61 leas 1,s ; remove timeout msb from stack
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
62 inca ; A = status to be returned in C and Z
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
63 ora ,s ; place status information into the..
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
64 sta ,s ; ..C and Z bits of the preserved CC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
65 leay ,x ; return checksum in Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
66 puls cc,dp,x,u,pc ; restore registers and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
67 ELSE
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
68 IFNE BECKER
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
69 * NOTE: There is no timeout currently on here...
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
70 DWRead clra ; clear Carry (no framing error)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
71 deca ; clear Z flag, A = timeout msb ($ff)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
72 tfr cc,b
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
73 pshs u,x,dp,b,a ; preserve registers, push timeout msb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
74 leau ,x
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
75 ldx #$0000
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
76 orcc #IntMasks
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
77 loop@ ldb $FF41
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
78 bitb #$02
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
79 beq loop@
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
80 ldb $FF42
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
81 stb ,u+
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
82 abx
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
83 leay ,-y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
84 bne loop@
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
85
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
86 tfr x,y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
87 ldb #0
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
88 lda #3
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
89 leas 1,s ; remove timeout msb from stack
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
90 inca ; A = status to be returned in C and Z
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
91 ora ,s ; place status information into the..
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
92 sta ,s ; ..C and Z bits of the preserved CC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
93 leay ,x ; return checksum in Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
94 puls cc,dp,x,u,pc ; restore registers and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
95 ENDC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
96 ENDC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
97 ENDC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
98
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
99 IFEQ BECKER+JMCPBCK+ARDUINO
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
100 IFNE BAUD38400
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
101 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
102 * 38400 bps using 6809 code and timimg
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
103 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
104
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
105 DWRead clra ; clear Carry (no framing error)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
106 deca ; clear Z flag, A = timeout msb ($ff)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
107 tfr cc,b
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
108 pshs u,x,dp,b,a ; preserve registers, push timeout msb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
109 orcc #$50 ; mask interrupts
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
110 tfr a,dp ; set direct page to $FFxx
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
111 setdp $ff
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
112 leau ,x ; U = storage ptr
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
113 ldx #0 ; initialize checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
114 adda #2 ; A = $01 (serial in mask), set Carry
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
115
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
116 * Wait for a start bit or timeout
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
117 rx0010 bcc rxExit ; exit if timeout expired
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
118 ldb #$ff ; init timeout lsb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
119 rx0020 bita <BBIN ; check for start bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
120 beq rxByte ; branch if start bit detected
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
121 subb #1 ; decrement timeout lsb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
122 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
123 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
124 bcc rx0020 ; loop until timeout lsb rolls under
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
125 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
126 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
127 addb ,s ; B = timeout msb - 1
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
128 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
129 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
130 stb ,s ; store decremented timeout msb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
131 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
132 bne rx0010 ; loop if still no start bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
133
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
134 * Read a byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
135 rxByte leay ,-y ; decrement request count
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
136 ldd #$ff80 ; A = timeout msb, B = shift counter
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
137 sta ,s ; reset timeout msb for next byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
138 rx0030 exg a,a
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
139 nop
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
140 lda <BBIN ; read data bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
141 lsra ; shift into carry
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
142 rorb ; rotate into byte accumulator
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
143 lda #$01 ; prep stop bit mask
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
144 bcc rx0030 ; loop until all 8 bits read
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
145
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
146 stb ,u+ ; store received byte to memory
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
147 abx ; update checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
148 ldb #$ff ; set timeout lsb for next byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
149 anda <BBIN ; read stop bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
150 beq rxExit ; exit if framing error
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
151 leay ,y ; test request count
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
152 bne rx0020 ; loop if another byte wanted
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
153 lda #$03 ; setup to return SUCCESS
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
154
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
155 * Clean up, set status and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
156 rxExit leas 1,s ; remove timeout msb from stack
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
157 inca ; A = status to be returned in C and Z
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
158 ora ,s ; place status information into the..
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
159 sta ,s ; ..C and Z bits of the preserved CC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
160 leay ,x ; return checksum in Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
161 puls cc,dp,x,u,pc ; restore registers and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
162 setdp $00
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
163
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
164
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
165 ELSE
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
166 IFNE H6309
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
167 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
168 * 57600 (115200) bps using 6309 native mode
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
169 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
170
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
171 DWRead clrb ; clear Carry (no framing error)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
172 decb ; clear Z flag, B = $FF
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
173 pshs u,x,dp,cc ; preserve registers
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
174 orcc #$50 ; mask interrupts
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
175 * ldmd #1 ; requires 6309 native mode
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
176 tfr b,dp ; set direct page to $FFxx
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
177 setdp $ff
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
178 leay -1,y ; adjust request count
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
179 leau ,x ; U = storage ptr
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
180 tfr 0,x ; initialize checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
181 lda #$01 ; A = serial in mask
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
182 bra rx0030 ; go wait for start bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
183
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
184 * Read a byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
185 rxByte sexw ; 4 cycle delay
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
186 ldw #$006a ; shift counter and timing flags
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
187 clra ; clear carry so next will branch
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
188 rx0010 bcc rx0020 ; branch if even bit number (15 cycles)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
189 nop ; extra (16th) cycle
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
190 rx0020 lda <BBIN ; read bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
191 lsra ; move bit into carry
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
192 rorb ; rotate bit into byte accumulator
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
193 lda #0 ; prep A for 8th data bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
194 lsrw ; bump shift count, timing bit to carry
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
195 bne rx0010 ; loop until 7th data bit has been read
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
196 incw ; W = 1 for subtraction from Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
197 inca ; A = 1 for reading bit 7
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
198 anda <BBIN ; read bit 7
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
199 lsra ; move bit 7 into carry, A = 0
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
200 rorb ; byte is now complete
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
201 stb ,u+ ; store received byte to memory
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
202 abx ; update checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
203 subr w,y ; decrement request count
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
204 inca ; A = 1 for reading stop bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
205 anda <BBIN ; read stop bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
206 bls rxExit ; exit if completed or framing error
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
207
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
208 * Wait for a start bit or timeout
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
209 rx0030 clrw ; initialize timeout counter
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
210 rx0040 bita <BBIN ; check for start bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
211 beq rxByte ; branch if start bit detected
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
212 addw #1 ; bump timeout counter
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
213 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
214 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
215 bcc rx0040 ; loop until timeout rolls over
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
216 lda #$03 ; setup to return TIMEOUT status
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
217
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
218 * Clean up, set status and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
219 rxExit beq rx0050 ; branch if framing error
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
220 eora #$02 ; toggle SUCCESS flag
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
221 rx0050 inca ; A = status to be returned in C and Z
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
222 ora ,s ; place status information into the..
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
223 sta ,s ; ..C and Z bits of the preserved CC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
224 leay ,x ; return checksum in Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
225 puls cc,dp,x,u,pc ; restore registers and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
226 setdp $00
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
227
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
228
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
229 ELSE
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
230 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
231 * 57600 (115200) bps using 6809 code and timimg
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
232 *******************************************************
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
233
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
234 DWRead clra ; clear Carry (no framing error)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
235 deca ; clear Z flag, A = timeout msb ($ff)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
236 tfr cc,b
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
237 pshs u,x,dp,b,a ; preserve registers, push timeout msb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
238 orcc #$50 ; mask interrupts
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
239 tfr a,dp ; set direct page to $FFxx
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
240 setdp $ff
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
241 leau ,x ; U = storage ptr
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
242 ldx #0 ; initialize checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
243 lda #$01 ; A = serial in mask
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
244 bra rx0030 ; go wait for start bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
245
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
246 * Read a byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
247 rxByte leau 1,u ; bump storage ptr
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
248 leay ,-y ; decrement request count
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
249 lda <BBIN ; read bit 0
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
250 lsra ; move bit 0 into Carry
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
251 ldd #$ff20 ; A = timeout msb, B = shift counter
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
252 sta ,s ; reset timeout msb for next byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
253 rorb ; rotate bit 0 into byte accumulator
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
254 rx0010 lda <BBIN ; read bit (d1, d3, d5)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
255 lsra
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
256 rorb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
257 bita 1,s ; 5 cycle delay
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
258 bcs rx0020 ; exit loop after reading bit 5
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
259 lda <BBIN ; read bit (d2, d4)
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
260 lsra
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
261 rorb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
262 leau ,u
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
263 bra rx0010
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
264
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
265 rx0020 lda <BBIN ; read bit 6
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
266 lsra
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
267 rorb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
268 leay ,y ; test request count
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
269 beq rx0050 ; branch if final byte of request
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
270 lda <BBIN ; read bit 7
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
271 lsra
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
272 rorb ; byte is now complete
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
273 stb -1,u ; store received byte to memory
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
274 abx ; update checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
275 lda <BBIN ; read stop bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
276 anda #$01 ; mask out other bits
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
277 beq rxExit ; exit if framing error
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
278
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
279 * Wait for a start bit or timeout
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
280 rx0030 bita <BBIN ; check for start bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
281 beq rxByte ; branch if start bit detected
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
282 bita <BBIN ; again
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
283 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
284 ldb #$ff ; init timeout lsb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
285 rx0040 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
286 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
287 subb #1 ; decrement timeout lsb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
288 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
289 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
290 bcc rx0040 ; loop until timeout lsb rolls under
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
291 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
292 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
293 addb ,s ; B = timeout msb - 1
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
294 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
295 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
296 stb ,s ; store decremented timeout msb
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
297 bita <BBIN
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
298 beq rxByte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
299 bcs rx0030 ; loop if timeout hasn't expired
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
300 bra rxExit ; exit due to timeout
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
301
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
302 rx0050 lda <BBIN ; read bit 7 of final byte
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
303 lsra
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
304 rorb ; byte is now complete
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
305 stb -1,u ; store received byte to memory
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
306 abx ; calculate final checksum
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
307 lda <BBIN ; read stop bit
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
308 anda #$01 ; mask out other bits
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
309 ora #$02 ; return SUCCESS if no framing error
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
310
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
311 * Clean up, set status and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
312 rxExit leas 1,s ; remove timeout msb from stack
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
313 inca ; A = status to be returned in C and Z
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
314 ora ,s ; place status information into the..
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
315 sta ,s ; ..C and Z bits of the preserved CC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
316 leay ,x ; return checksum in Y
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
317 puls cc,dp,x,u,pc ; restore registers and return
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
318 setdp $00
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
319
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
320 ENDC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
321 ENDC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
322 ENDC
0a3f4d8ea6d5 Found ENDC in wrong location in dwread.asm and dwwrite.asm. Corrected.
drencor-xeen
parents: 2771
diff changeset
323