Mercurial > hg > Members > kono > nitros9-code
annotate defs/systype @ 2011:484c5493599a
Slight massaging for looks
| author | boisy |
|---|---|
| date | Mon, 06 Mar 2006 04:08:59 +0000 |
| parents | 83453a4c9e51 |
| children | e396d4f24b27 |
| rev | line source |
|---|---|
| 1541 | 1 IFNE SYSTYPE-1 |
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Added ifeq statements at top to allow for multiple use's of same def
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2 |
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c07686556109
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3 SYSTYPE set 1 |
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c07686556109
Added ifeq statements at top to allow for multiple use's of same def
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4 |
| 1200 | 5 ******************************************************************** |
| 1377 | 6 * SysType - NitrOS-9 System Specific Definitions |
| 1200 | 7 * |
| 8 * $Id$ | |
| 9 * | |
| 10 * Edt/Rev YYYY/MM/DD Modified by | |
| 11 * Comment | |
| 12 * ------------------------------------------------------------------ | |
| 13 * 1998/10/13 Boisy G. Pitre | |
| 14 * Added defs by Bruce Isted from his Eliminator archive. | |
| 15 * | |
| 16 * 1998/10/31 Boisy G. Pitre | |
| 17 * Merged cc3global.defs into this file. | |
| 18 * | |
| 19 * 2002/04/30 Boisy G. Pitre | |
| 20 * Merged Level One and Level Two sysdefs. | |
| 1216 | 21 * |
| 22 * 2002/06/22 Boisy G. Pitre | |
| 23 * Removed PIA.U4 and PIA.U8, improved comments | |
| 1417 | 24 * |
| 25 * 2003/11/05 Robert Gault | |
| 26 * Made changes in window globals and grfdrv memory to handle regW | |
| 27 * in 6809 systems. | |
| 28 * | |
| 29 * 2003/11/30 Boisy G. Pitre | |
| 30 * Statics now are prefaced with V. to identify them easier in source. | |
| 1658 | 31 * |
| 32 * 2004/07/18 Boisy G. Pitre | |
| 33 * Moved CoCo 3 Window stuff into cc3iodefs | |
| 1200 | 34 |
| 61 | 35 nam SysType |
| 1147 | 36 IFEQ Level-1 |
| 1363 | 37 ttl NitrOS-9 Level 1 System Type Definitions |
| 1439 | 38 ELSE |
| 1147 | 39 IFEQ Level-2 |
| 1363 | 40 ttl NitrOS-9 Level 2 System Type Definitions |
| 1386 | 41 ENDC |
| 42 IFEQ Level-3 | |
| 1363 | 43 ttl NitrOS-9 Level 3 System Type Definitions |
| 1147 | 44 ENDC |
| 1439 | 45 ENDC |
| 61 | 46 |
| 47 | |
| 48 ********************** | |
| 49 * CPU Type Definitions | |
| 50 * | |
| 51 Color set 1 | |
| 52 Color3 set 2 | |
| 1147 | 53 IFEQ Level-1 |
| 61 | 54 CPUType set Color |
| 1147 | 55 ELSE |
| 61 | 56 CPUType set Color3 |
| 1147 | 57 ENDC |
| 58 | |
| 61 | 59 |
| 60 ****************************** | |
| 61 * Clock Speed Type Definitions | |
| 62 * | |
| 63 OneMHz equ 1 | |
| 64 TwoMHz equ 2 | |
| 1147 | 65 IFEQ CPUType-Color |
| 61 | 66 CPUSpeed set OneMHz |
| 1147 | 67 ELSE |
| 61 | 68 CPUSpeed set TwoMHz |
| 1147 | 69 ENDC |
| 70 | |
| 61 | 71 |
| 72 ********************************** | |
| 73 * Power Line Frequency Definitions | |
| 74 * | |
| 75 Hz50 equ 1 Assemble clock for 50 hz power | |
| 76 Hz60 equ 2 Assemble clock for 60 hz power | |
| 77 PwrLnFrq set Hz60 Set to Appropriate freq | |
| 78 | |
| 1147 | 79 |
| 61 | 80 ********************************** |
| 81 * Ticks per second | |
| 82 * | |
| 1147 | 83 IFEQ PwrLnFrq-Hz50 |
| 1269 | 84 TkPerSec set 50 |
| 1147 | 85 ELSE |
| 1269 | 86 TkPerSec set 60 |
| 1147 | 87 ENDC |
| 88 | |
| 61 | 89 |
| 90 ****************** | |
| 91 * ACIA type set up | |
| 92 * | |
| 93 org 1 | |
| 94 ACIA6850 rmb 1 MC6850 acia. | |
| 95 ACIA6551 rmb 1 SY6551 acia. | |
| 96 ACIA2661 rmb 1 SC2661 acia. | |
| 97 ACIATYPE set ACIA6551 | |
| 98 | |
| 1147 | 99 |
| 61 | 100 **************************************** |
| 101 * Special character Bit position equates | |
| 102 * | |
| 103 SHIFTBIT equ %00000001 | |
| 104 CNTRLBIT equ %00000010 | |
| 105 ALTERBIT equ %00000100 | |
| 106 UPBIT equ %00001000 | |
| 107 DOWNBIT equ %00010000 | |
| 108 LEFTBIT equ %00100000 | |
| 109 RIGHTBIT equ %01000000 | |
| 110 SPACEBIT equ %10000000 | |
| 111 | |
| 1147 | 112 |
| 61 | 113 ****************** |
| 1216 | 114 * Device addresses for miscellaneous hardware |
| 61 | 115 * |
| 116 A.AciaP set $FF68 Aciapak Address | |
| 117 A.ModP set $FF6C ModPak Address | |
| 118 DPort set $FF40 Disk controller base address | |
| 119 MPI.Slct set $FF7F Multi-Pak slot select | |
| 120 MPI.Slot set $03 Multi-Pak default slot | |
| 64 | 121 PIA0Base equ $FF00 |
| 122 PIA1Base equ $FF20 | |
| 1216 | 123 |
| 61 | 124 |
| 1147 | 125 ****************** |
| 61 | 126 * VDG Devices |
| 127 * | |
| 128 A.TermV set $FFC0 VDG Term | |
| 129 A.V1 set $FFC1 Possible additional VDG Devices | |
| 130 A.V2 set $FFC2 | |
| 131 A.V3 set $FFC3 | |
| 132 A.V4 set $FFC4 | |
| 133 A.V5 set $FFC5 | |
| 134 A.V6 set $FFC6 | |
| 135 A.V7 set $FFC7 | |
| 136 | |
| 1200 | 137 |
| 1147 | 138 IFEQ Level-1 |
| 61 | 139 |
| 140 ************************************************* | |
| 141 * | |
| 1417 | 142 * NitrOS-9 Level 1 Section |
| 61 | 143 * |
| 144 ************************************************* | |
| 145 | |
| 146 HW.Page set $FF Device descriptor hardware page | |
| 147 | |
| 1147 | 148 ELSE |
| 61 | 149 |
| 150 ************************************************* | |
| 151 * | |
| 1417 | 152 * NitrOS-9 Level 2 Section |
| 61 | 153 * |
| 154 ************************************************* | |
| 155 | |
| 156 **************************************** | |
| 157 * Dynamic Address Translator Definitions | |
| 158 * | |
| 159 DAT.BlCt equ 8 D.A.T. blocks/address space | |
| 160 DAT.BlSz equ (256/DAT.BlCt)*256 D.A.T. block size | |
| 161 DAT.ImSz equ DAT.BlCt*2 D.A.T. Image size | |
| 162 DAT.Addr equ -(DAT.BlSz/256) D.A.T. MSB Address bits | |
| 163 DAT.Task equ $FF91 Task Register address | |
| 164 DAT.TkCt equ 32 Number of DAT Tasks | |
| 165 DAT.Regs equ $FFA0 DAT Block Registers base address | |
| 166 DAT.Free equ $333E Free Block Number | |
| 167 DAT.BlMx equ $3F Maximum Block number | |
| 168 DAT.BMSz equ $40 Memory Block Map size | |
| 169 DAT.WrPr equ 0 no write protect | |
| 170 DAT.WrEn equ 0 no write enable | |
| 171 SysTask equ 0 Coco System Task number | |
| 172 IOBlock equ $3F | |
| 173 ROMBlock equ $3F | |
| 174 IOAddr equ $7F | |
| 175 ROMCount equ 1 number of blocks of ROM (High RAM Block) | |
| 176 RAMCount equ 1 initial blocks of RAM | |
| 177 MoveBlks equ DAT.BlCt-ROMCount-2 Block numbers used for copies | |
| 178 BlockTyp equ 1 chk only first bytes of RAM block | |
| 179 ByteType equ 2 chk entire block of RAM | |
| 180 Limited equ 1 chk only upper memory for ROM modules | |
| 181 UnLimitd equ 2 chk all NotRAM for modules | |
| 182 * NOTE: this check assumes any NotRAM with a module will | |
| 183 * always start with $87CD in first two bytes of block | |
| 184 RAMCheck equ BlockTyp chk only beg bytes of block | |
| 185 ROMCheck equ Limited chk only upper few blocks for ROM | |
| 186 LastRAM equ IOBlock maximum RAM block number | |
| 187 | |
| 188 *************************** | |
| 189 * Color Computer 3 Specific | |
| 190 * | |
|
1242
bdd2f61d5dbc
Fixed case issues in several files (thanks Rodney H.)
boisy
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191 MappedIO equ true (Actually False but it works better this way) |
| 61 | 192 |
| 193 ******************** | |
| 194 * Hardware addresses | |
| 195 * | |
| 196 GIMERegs equ $FF00 Base address of GIME registers | |
| 197 IrqEnR equ $FF92 GIME IRQ enable/status register | |
| 198 BordReg equ $FF9A Border color register | |
| 199 PalAdr equ $FFB0 Palette registers | |
| 200 | |
| 201 HW.Page set $07 Device descriptor hardware page | |
| 202 | |
| 1147 | 203 ENDC |
| 204 ENDC | |
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373
c07686556109
Added ifeq statements at top to allow for multiple use's of same def
boisy
parents:
359
diff
changeset
|
205 |