annotate level1/modules/dwread.asm @ 2711:a1e65a5ef4cf lwtools-port

Moved Atari SIO read/write routines into main dwread.asm and dwwrite.asm
author Boisy Pitre <boisy.pitre@nuance.com>
date Tue, 24 Jul 2012 10:09:58 -0500 (2012-07-24)
parents 963688cd0596
children 8399491c0821
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1 *******************************************************
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2 *
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3 * DWRead
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4 * Receive a response from the DriveWire server.
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5 * Times out if serial port goes idle for more than 1.4 (0.7) seconds.
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6 * Serial data format: 1-8-N-1
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7 * 4/12/2009 by Darren Atkinson
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8 *
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9 * Entry:
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10 * X = starting address where data is to be stored
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11 * Y = number of bytes expected
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12 *
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13 * Exit:
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14 * CC = carry set on framing error, Z set if all bytes received
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15 * X = starting address of data received
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16 * Y = checksum
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17 * U is preserved. All accumulators are clobbered
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18 *
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19
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20
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21 IFNE atari
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22 * ATARI SIO Version
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23 DWRead
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24 clrb clear carry
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25 pshs cc,a,x,y,u
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26 tfr x,u
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27 ldx #$0000
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28 orcc #$50
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29 * lda D.IRQENSHDW
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30 * sta IRQEN
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31 * ora #%00100000
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32 * enable the serial input interrupt
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33
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34 ldb SERIN read what is in the buffer
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35 lda #$13
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36 sta SKCTL
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37 sta SKRES
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38
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39 inloop@
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40 lda D.IRQENSHDW
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41 ora #%00100000
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42 sta IRQEN
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43 ldd #$0000
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44 loop@
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45 subd #$0001
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46 beq outtahere@
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47 pshs b
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48 ldb IRQST
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49 bitb #%00100000
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50 puls b
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51 bne loop@
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52 ldb SERIN
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53 lda D.IRQENSHDW
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54 sta IRQEN
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55 * check for framing error
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56 lda SKSTAT
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57 bpl outtahere@ framing error
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58 lsla
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59 bpl outtahere@ data input overrun
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60 stb ,u+
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61 abx
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62 leay -1,y
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63 bne inloop@
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64 stx 4,s
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65 bye
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66 sta SKRES clear framing or data input overrun bits
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67 puls cc,a,x,y,u,pc
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68 outtahere@
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69 sta SKRES clear framing or data input overrun bits
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70 puls cc,a
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71 stx 2,s
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72 orcc #$01
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73 puls x,y,u,pc
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74
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75 ELSE
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76 IFNE BECKER
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77
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78 * NOTE: There is no timeout currently on here...
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79 DWRead pshs cc,d,x,u
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80 leau ,x
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81 ldx #$0000
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82 orcc #IntMasks
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83 loop@ ldb $FF41
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84 bitb #$02
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85 beq loop@
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86 ldb $FF42
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87 stb ,u+
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88 abx
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89 leay -1,y
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90 bne loop@
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91
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92 tfr x,y
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93 puls cc
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94 andcc #^Carry
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95 orcc #Zero
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96 puls d,x,u,pc
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97
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98 ELSE
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99 IFNE BAUD38400
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100 *******************************************************
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101 * 38400 bps using 6809 code and timimg
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102 *******************************************************
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103
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104 DWRead clra ; clear Carry (no framing error)
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105 deca ; clear Z flag, A = timeout msb ($ff)
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106 tfr cc,b
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107 pshs u,x,dp,b,a ; preserve registers, push timeout msb
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108 orcc #$50 ; mask interrupts
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109 tfr a,dp ; set direct page to $FFxx
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110 setdp $ff
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111 leau ,x ; U = storage ptr
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112 ldx #0 ; initialize checksum
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113 adda #2 ; A = $01 (serial in mask), set Carry
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114
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115 * Wait for a start bit or timeout
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116 rx0010 bcc rxExit ; exit if timeout expired
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117 ldb #$ff ; init timeout lsb
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118 rx0020 bita <BBIN ; check for start bit
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119 beq rxByte ; branch if start bit detected
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120 subb #1 ; decrement timeout lsb
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121 bita <BBIN
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122 beq rxByte
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123 bcc rx0020 ; loop until timeout lsb rolls under
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124 bita <BBIN
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125 beq rxByte
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126 addb ,s ; B = timeout msb - 1
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127 bita <BBIN
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128 beq rxByte
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129 stb ,s ; store decremented timeout msb
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130 bita <BBIN
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131 bne rx0010 ; loop if still no start bit
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132
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133 * Read a byte
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134 rxByte leay ,-y ; decrement request count
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135 ldd #$ff80 ; A = timeout msb, B = shift counter
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136 sta ,s ; reset timeout msb for next byte
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137 rx0030 exg a,a
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138 nop
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139 lda <BBIN ; read data bit
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140 lsra ; shift into carry
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141 rorb ; rotate into byte accumulator
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142 lda #$01 ; prep stop bit mask
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143 bcc rx0030 ; loop until all 8 bits read
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144
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145 stb ,u+ ; store received byte to memory
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146 abx ; update checksum
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147 ldb #$ff ; set timeout lsb for next byte
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148 anda <BBIN ; read stop bit
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149 beq rxExit ; exit if framing error
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150 leay ,y ; test request count
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151 bne rx0020 ; loop if another byte wanted
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152 lda #$03 ; setup to return SUCCESS
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153
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154 * Clean up, set status and return
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155 rxExit leas 1,s ; remove timeout msb from stack
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156 inca ; A = status to be returned in C and Z
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157 ora ,s ; place status information into the..
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158 sta ,s ; ..C and Z bits of the preserved CC
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159 leay ,x ; return checksum in Y
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160 puls cc,dp,x,u,pc ; restore registers and return
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161 setdp $00
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162
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163
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164 ELSE
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165 IFNE H6309-1
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166 *******************************************************
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167 * 57600 (115200) bps using 6809 code and timimg
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168 *******************************************************
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169
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170 DWRead clra ; clear Carry (no framing error)
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171 deca ; clear Z flag, A = timeout msb ($ff)
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172 tfr cc,b
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173 pshs u,x,dp,b,a ; preserve registers, push timeout msb
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174 orcc #$50 ; mask interrupts
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175 tfr a,dp ; set direct page to $FFxx
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176 setdp $ff
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177 leau ,x ; U = storage ptr
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178 ldx #0 ; initialize checksum
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179 lda #$01 ; A = serial in mask
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180 bra rx0030 ; go wait for start bit
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181
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182 * Read a byte
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183 rxByte leau 1,u ; bump storage ptr
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184 leay ,-y ; decrement request count
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185 lda <BBIN ; read bit 0
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186 lsra ; move bit 0 into Carry
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187 ldd #$ff20 ; A = timeout msb, B = shift counter
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188 sta ,s ; reset timeout msb for next byte
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189 rorb ; rotate bit 0 into byte accumulator
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190 rx0010 lda <BBIN ; read bit (d1, d3, d5)
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191 lsra
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192 rorb
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193 bita 1,s ; 5 cycle delay
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194 bcs rx0020 ; exit loop after reading bit 5
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195 lda <BBIN ; read bit (d2, d4)
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196 lsra
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197 rorb
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198 leau ,u
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199 bra rx0010
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200
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201 rx0020 lda <BBIN ; read bit 6
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202 lsra
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203 rorb
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204 leay ,y ; test request count
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205 beq rx0050 ; branch if final byte of request
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206 lda <BBIN ; read bit 7
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207 lsra
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208 rorb ; byte is now complete
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209 stb -1,u ; store received byte to memory
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210 abx ; update checksum
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211 lda <BBIN ; read stop bit
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212 anda #$01 ; mask out other bits
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213 beq rxExit ; exit if framing error
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214
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215 * Wait for a start bit or timeout
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216 rx0030 bita <BBIN ; check for start bit
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217 beq rxByte ; branch if start bit detected
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218 bita <BBIN ; again
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219 beq rxByte
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220 ldb #$ff ; init timeout lsb
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221 rx0040 bita <BBIN
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222 beq rxByte
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223 subb #1 ; decrement timeout lsb
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224 bita <BBIN
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225 beq rxByte
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226 bcc rx0040 ; loop until timeout lsb rolls under
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227 bita <BBIN
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228 beq rxByte
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229 addb ,s ; B = timeout msb - 1
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230 bita <BBIN
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231 beq rxByte
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232 stb ,s ; store decremented timeout msb
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233 bita <BBIN
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234 beq rxByte
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235 bcs rx0030 ; loop if timeout hasn't expired
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236 bra rxExit ; exit due to timeout
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237
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238 rx0050 lda <BBIN ; read bit 7 of final byte
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239 lsra
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240 rorb ; byte is now complete
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241 stb -1,u ; store received byte to memory
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242 abx ; calculate final checksum
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243 lda <BBIN ; read stop bit
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244 anda #$01 ; mask out other bits
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245 ora #$02 ; return SUCCESS if no framing error
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246
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247 * Clean up, set status and return
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248 rxExit leas 1,s ; remove timeout msb from stack
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249 inca ; A = status to be returned in C and Z
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250 ora ,s ; place status information into the..
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251 sta ,s ; ..C and Z bits of the preserved CC
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252 leay ,x ; return checksum in Y
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253 puls cc,dp,x,u,pc ; restore registers and return
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254 setdp $00
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255
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256
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257 ELSE
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258 *******************************************************
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259 * 57600 (115200) bps using 6309 native mode
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260 *******************************************************
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261
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262 DWRead clrb ; clear Carry (no framing error)
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263 decb ; clear Z flag, B = $FF
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264 pshs u,x,dp,cc ; preserve registers
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265 orcc #$50 ; mask interrupts
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266 * ldmd #1 ; requires 6309 native mode
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267 tfr b,dp ; set direct page to $FFxx
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268 setdp $ff
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269 leay -1,y ; adjust request count
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270 leau ,x ; U = storage ptr
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271 tfr 0,x ; initialize checksum
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272 lda #$01 ; A = serial in mask
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273 bra rx0030 ; go wait for start bit
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274
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275 * Read a byte
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276 rxByte sexw ; 4 cycle delay
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277 ldw #$006a ; shift counter and timing flags
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278 clra ; clear carry so next will branch
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279 rx0010 bcc rx0020 ; branch if even bit number (15 cycles)
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280 nop ; extra (16th) cycle
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281 rx0020 lda <BBIN ; read bit
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282 lsra ; move bit into carry
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283 rorb ; rotate bit into byte accumulator
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284 lda #0 ; prep A for 8th data bit
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285 lsrw ; bump shift count, timing bit to carry
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286 bne rx0010 ; loop until 7th data bit has been read
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287 incw ; W = 1 for subtraction from Y
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288 inca ; A = 1 for reading bit 7
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289 anda <BBIN ; read bit 7
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290 lsra ; move bit 7 into carry, A = 0
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291 rorb ; byte is now complete
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292 stb ,u+ ; store received byte to memory
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293 abx ; update checksum
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294 subr w,y ; decrement request count
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295 inca ; A = 1 for reading stop bit
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296 anda <BBIN ; read stop bit
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297 bls rxExit ; exit if completed or framing error
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298
2231
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299 * Wait for a start bit or timeout
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300 rx0030 clrw ; initialize timeout counter
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301 rx0040 bita <BBIN ; check for start bit
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302 beq rxByte ; branch if start bit detected
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303 addw #1 ; bump timeout counter
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304 bita <BBIN
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305 beq rxByte
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306 bcc rx0040 ; loop until timeout rolls over
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307 lda #$03 ; setup to return TIMEOUT status
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308
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309 * Clean up, set status and return
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310 rxExit beq rx0050 ; branch if framing error
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311 eora #$02 ; toggle SUCCESS flag
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312 rx0050 inca ; A = status to be returned in C and Z
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313 ora ,s ; place status information into the..
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314 sta ,s ; ..C and Z bits of the preserved CC
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315 leay ,x ; return checksum in Y
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316 puls cc,dp,x,u,pc ; restore registers and return
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317 setdp $00
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318
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319 ENDC
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320 ENDC
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321 ENDC
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Boisy Pitre <boisy.pitre@nuance.com>
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322 ENDC