Mercurial > hg > Members > kono > nitros9-code
annotate level1/modules/dw4read.asm @ 2741:d1976224b314
Found duplicated code and IFNE H6309-1 statements in dwwrite.asm. Verified it was duplicated code. Must have been accidently copied at some point. Removed second copy of this IFNE H6309-1.
Changed H6309-1 to H6309 and moved the real H6309 code into this routine and moved the standard 6809 57600bps code to the last "else" section. This was done to dwread.asm, dwwrite.asm, dw4write.asm, and dw4read.asm.
Test compiled and everything still seems to compile as it should.
| author | drencor-xeen |
|---|---|
| date | Sun, 06 Jan 2013 11:12:22 -0600 |
| parents | b839b516cb35 |
| children | b44abaa5da88 |
| rev | line source |
|---|---|
|
2741
d1976224b314
Found duplicated code and IFNE H6309-1 statements in dwwrite.asm. Verified it was duplicated code. Must have been accidently copied at some point. Removed second copy of this IFNE H6309-1.
drencor-xeen
parents:
2602
diff
changeset
|
1 IFNE H6309 |
| 2576 | 2 |
| 3 ******************************************************* | |
| 4 * | |
| 5 * DWRead - 6309 native Turbo Edition 115k / 230k | |
| 6 * Receive a response from the DriveWire server. | |
| 7 * Times out if no data received within 1.3 (0.66) seconds. | |
| 8 * | |
| 9 * THIS VERSION REQUIRES ONE OR MORE SYNC BYTES | |
| 10 * WHERE THE THE FINAL SYNC BYTE IS $C0 AND ANY | |
| 11 * PRECEDING SYNC BYTES ARE $FF. | |
| 12 * | |
| 13 * THE DATA BYTES MUST BE TRANSMITTED IN REVERSE | |
| 14 * BIT ORDER (MOST-SIGNIFICANT FIRST). | |
| 15 * | |
| 16 * Serial data format: 8-N-2 (TWO STOP BITS MANDATORY) | |
| 17 * | |
| 18 * Entry: | |
| 19 * X = storage address for incoming data | |
| 20 * Y = number of bytes requested | |
| 21 * | |
| 22 * Exit: | |
| 23 * CC = Z set on success, cleared on timeout | |
| 24 * Y = checksum | |
| 25 * U is preserved | |
| 26 * All others clobbered | |
| 27 * | |
| 28 BBIN equ $FF22 ; bit banger input port | |
| 29 | |
| 30 DWRead clra ; ACCA = 0, clear Carry | |
| 31 pshs u,dp,a,cc ; save registers (A allocates space for status) | |
| 32 orcc #$50 ; mask interrupts | |
| 33 deca ; select hardware page.. | |
| 34 tfr a,dp ; ..as the direct page | |
| 35 ldu #BBIN ; point U at input port | |
| 36 tfr y,w ; W = request count | |
| 37 leay ,x ; Y = storage ptr | |
| 38 ldx #0 ; initialize timeout counter | |
| 39 stx <$FF92 ; disable GIME interrupts | |
| 40 ldd <$FF92 ; clear spurious interrupts | |
| 41 | |
| 42 * Turn off PIA interrupt sources except for the CD input pin. | |
| 43 lda <$FF01 ; save PIA 0 controls on the stack | |
| 44 ldb <$FF03 | |
| 45 pshs d | |
| 46 andd #$FCFC ; clear IRQ enables | |
| 47 sta <$FF01 ; set new control state for PIA 0 | |
| 48 stb <$FF03 | |
| 49 lda <$FF00 ; ensure that IRQ outputs are cleared | |
| 50 ldb <$FF02 | |
| 51 lda <$FF21 ; save PIA 1 controls on the stack | |
| 52 ldb <$FF23 | |
| 53 pshs d | |
| 54 andd #$FCFC ; clear FIRQ enables | |
| 55 inca ; set CD FIRQ enable | |
| 56 sta <$FF21 ; set new control state for PIA 1 | |
| 57 stb <$FF23 | |
| 58 | |
| 59 * Wait for Sync Byte(s) or Timeout | |
| 60 sync1 ldd #$0102 ; ACCA = serial in mask, ACCB = shift counter | |
| 61 sync2 bita ,u ; sample input | |
| 62 beq sync3 ; branch if low | |
| 63 leax -1,x ; decrement timeout counter | |
| 64 bne sync1 ; loop if timeout has not expired | |
| 65 bra rxDone ; exit due to timeout | |
| 66 sync3 lsrb ; have there been 2 consecutive low samples? | |
| 67 bcc sync2 ; keep waiting if no | |
| 68 ldx #0 ; initialize checksum | |
| 69 sync4 bita ,u ; sample input | |
| 70 bne rxByte ; branch if input has returned hi | |
| 71 rorb ; bump secondary timeout counter | |
| 72 bcc sync4 ; branch if not timeout | |
| 73 bra rxDone ; exit due to timeout | |
| 74 | |
| 75 * Byte receiver loop | |
| 76 rxByte lda <$FF20 ; reset FIRQ | |
| 77 sync ; wait for start bit | |
| 78 leau ,u | |
| 79 lda ,u ; bit 0 | |
| 80 lsra | |
| 81 rolb | |
| 82 lda ,u++ ; bit 1 | |
| 83 lsra | |
| 84 rolb | |
| 85 lda -2,u ; bit 2 | |
| 86 lsra | |
| 87 rolb | |
| 88 lda ,--u ; bit 3 | |
| 89 lsra | |
| 90 rolb | |
| 91 lda ,u++ ; bit 4 | |
| 92 lsra | |
| 93 rolb | |
| 94 lda ,--u ; bit 5 | |
| 95 lsra | |
| 96 rolb | |
| 97 lda ,u+ ; bit 6 | |
| 98 lsra | |
| 99 rolb | |
| 100 nop | |
| 101 lda ,-u ; bit 7 | |
| 102 lsra | |
| 103 rolb | |
| 104 abx ; update checksum | |
| 105 stb ,y+ ; put byte to storage | |
| 106 decw ; decrement counter | |
| 107 bne rxByte ; loop if more bytes to read | |
| 108 clra ; status = SUCCESS | |
| 109 rxDone sta 5,s ; store status on stack | |
| 110 | |
| 111 * Restore previous PIA control settings | |
| 112 puls d ; restore original PIA 1 controls | |
| 113 sta <$FF21 | |
| 114 stb <$FF23 | |
| 115 puls d ; restore original PIA 0 controls | |
| 116 sta <$FF01 | |
| 117 stb <$FF03 | |
| 118 lda <$FF20 ; make sure the CD FIRQ has been cleared | |
| 119 | |
| 2602 | 120 IFEQ NITROS9-1 |
| 2576 | 121 * Restoration of GIME interrupts in NitrOS9 |
| 122 ldd >D.IRQER ; retrieve shadow copy of IRQ/FIRQ enable regs | |
| 123 std <$FF92 ; restore GIME | |
| 124 ldd <$FF92 ; clear spurious interrupts | |
| 125 ENDIF | |
| 126 | |
| 127 * Clean up and return | |
| 128 leay ,x ; return checksum in Y | |
| 129 puls cc,a,dp,u ; ACCA = status; restore IRQ masks, DP and U | |
| 130 tsta ; set CC.Z if status = SUCCESS | |
| 131 rts ; return | |
| 132 | |
| 133 ELSE | |
| 134 | |
| 2574 | 135 ******************************************************* |
| 136 * | |
| 137 * DWRead - 6809 Turbo Edition 115k / 230k | |
| 138 * Receive a response from the DriveWire server. | |
| 139 * Times out if no data received within 1.3 (0.66) seconds. | |
| 140 * | |
| 141 * THIS VERSION REQUIRES ONE OR MORE SYNC BYTES | |
| 142 * WHERE THE THE FINAL SYNC BYTE IS $C0 AND ANY | |
| 143 * PRECEDING SYNC BYTES ARE $FF. | |
| 144 * | |
| 145 * THE DATA BYTES MUST BE TRANSMITTED IN REVERSE | |
| 146 * BIT ORDER (MOST-SIGNIFICANT FIRST). | |
| 147 * | |
| 148 * Serial data format: 8-N-2 (TWO STOP BITS MANDATORY) | |
| 149 * | |
| 150 * Entry: | |
| 151 * X = storage address for incoming data | |
| 152 * Y = number of bytes required | |
| 153 * | |
| 154 * Exit: | |
| 155 * CC = Z set on success, cleared on timeout | |
| 156 * Y = checksum | |
| 157 * U is preserved | |
| 158 * All others clobbered | |
| 159 * | |
| 160 *BBIN equ $FF22 ; bit banger input port | |
| 161 SETDP $FF | |
| 162 DWRead pshs y,x,dp,a,cc ; save registers (A allocates space for status) | |
| 163 orcc #$50 ; mask interrupts | |
| 164 lda #$FF ; select hardware page.. | |
| 165 tfr a,dp ; ..as the direct page | |
| 166 ldx #0 ; initialize timeout counter | |
| 167 stx <$FF92 ; disable GIME interrupts | |
| 168 ldd <$FF92 ; clear spurious interrupts | |
| 169 | |
| 170 * Turn off PIA interrupt sources except for the bit banger's CD input pin. | |
| 171 * Also enable sound output from the DAC to stabilize the single-bit sound line. | |
| 172 lda <$FF01 ; save PIA 0 controls on the stack | |
| 173 ldb <$FF03 | |
| 174 pshs d | |
| 175 anda #$F6 ; clear IRQ enables and audio mux selects | |
| 176 andb #$F6 | |
| 177 sta <$FF01 ; set new control state for PIA 0 | |
| 178 stb <$FF03 | |
| 179 lda <$FF00 ; ensure the IRQ outputs are cleared | |
| 180 ldb <$FF02 | |
| 181 lda <$FF21 ; save PIA 1 controls on the stack | |
| 182 ldb <$FF23 | |
| 183 pshs d,cc ; CC allocates space for byte adjustment value | |
| 184 anda #$FC ; clear FIRQ enables and sound enable | |
| 185 andb #$F6 | |
| 186 addd #$0108 ; set CD FIRQ enable and sound enable | |
| 187 sta <$FF21 ; set new control state for PIA 1 | |
| 188 stb <$FF23 | |
| 189 | |
| 190 * Setup byte adjustment value | |
| 191 ldd #$01FE ; ACCA = serial in mask; ACCB = byte adjust mask | |
| 192 andb <BBIN ; ACCB = byte adjust value | |
| 193 stb ,s ; save in pre-allocated stack space | |
| 194 | |
| 195 * Wait for Sync Byte(s) or Timeout | |
| 196 sync1 ldb #2 ; set counter to wait for 2 low samples | |
| 197 sync2 bita <BBIN ; sample input | |
| 198 beq sync3 ; branch if low | |
| 199 leax ,-x ; decrement timeout counter | |
| 200 bne sync1 ; loop if timeout has not expired | |
| 201 bra rxDone ; exit due to timeout | |
| 202 sync3 lsrb ; have there been 2 consecutive low samples? | |
| 203 bcc sync2 ; keep waiting if no | |
| 204 ldx 8,s ; point X to storage buffer and.. | |
| 205 leax -1,x ; ..adjust for pre-increment | |
| 206 sync4 bita <BBIN ; sample input | |
| 207 bne rxStart ; branch if input has returned hi | |
| 208 rorb ; bump secondary timeout counter | |
| 209 bcc sync4 ; branch if not timeout | |
| 210 bra rxDone ; exit due to timeout | |
| 211 rxStart lda <$FF20 ; reset FIRQ | |
| 212 sync ; wait for the first byte's start bit | |
| 213 jmp <rxFirst,pcr ; 4-cycle equivalent of: bra rxFirst | |
| 214 | |
| 215 * Byte receiver loop | |
| 216 rxNext sync ; wait for start bit | |
| 217 sta ,x ; store previous data byte | |
| 218 rxFirst lda <BBIN ; bit 0 | |
| 219 asla | |
| 220 nop | |
| 221 adda <BBIN ; bit 1 | |
| 222 asla | |
| 223 adda >BBIN ; bit 2 | |
| 224 asla | |
| 225 nop | |
| 226 adda <BBIN ; bit 3 | |
| 227 asla | |
| 228 clrb ; ACCB = 0 | |
| 229 adda <BBIN ; bit 4 | |
| 230 asla | |
| 231 incb ; ACCB = 1 | |
| 232 adda <BBIN ; bit 5 | |
| 233 asla | |
| 234 adda >BBIN ; bit 6 | |
| 235 asla | |
| 236 abx ; increment storage ptr | |
| 237 adda <BBIN ; bit 7 | |
| 238 adda ,s ; adjust byte value | |
| 239 bita <$FF20 ; reset FIRQ | |
| 240 leay -1,y ; decrement counter | |
| 241 bne rxNext ; loop if more bytes to read | |
| 242 sta ,x ; store final byte | |
| 243 clra ; status = SUCCESS | |
| 244 rxDone sta 6,s ; store status on stack | |
| 245 leas 1,s ; pop byte adjustment value | |
| 246 | |
| 247 * Restore previous PIA control settings | |
| 248 puls d ; restore original PIA 1 controls | |
| 249 sta <$FF21 | |
| 250 stb <$FF23 | |
| 251 puls d ; restore original PIA 0 controls | |
| 252 sta <$FF01 | |
| 253 stb <$FF03 | |
| 254 lda <$FF20 ; make sure the CD FIRQ has been cleared | |
| 255 | |
| 2602 | 256 IFEQ NITROS9-1 |
| 2574 | 257 * Restoration of GIME interrupts in NitrOS9 |
| 258 ldd >D.IRQER ; retrieve shadow copy of IRQ/FIRQ enable regs | |
| 259 std <$FF92 ; restore GIME | |
| 260 ldd <$FF92 ; clear spurious interrupts | |
| 2576 | 261 ENDIF |
| 2574 | 262 |
| 263 * Checksum computation | |
| 264 clrb ; initialize checksum LSB | |
| 265 puls cc,a,dp,x,y ; restore IRQ masks, DP and the caller params | |
| 266 tsta ; timeout error? | |
| 267 bne rxExit ; branch if yes | |
| 268 sumLoop addb ,x+ ; get one byte and add to.. | |
| 269 adca #0 ; ..the 16-bit checksum in ACCD | |
| 270 leay -1,y ; decrement counter | |
| 271 bne sumLoop ; loop until all data summed | |
| 272 andcc #$FE ; clear carry (no framing error) | |
| 273 rxExit tfr d,y ; move checksum into Y without affecting CC.Z | |
| 274 rts ; return | |
| 2576 | 275 |
| 276 ENDC |