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annotate level1/modules/clock2_ds1315.asm @ 1724:f389c6bca482

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New clock2_*.asm files split from single clock2.asm for more source clarity
author boisy
date Fri, 20 Aug 2004 11:11:58 +0000
parents
children 9d95e3246a61
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1724
f389c6bca482 New clock2_*.asm files split from single clock2.asm for more source clarity
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1 ********************************************************************
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2 * Clock2 - Dallas Semiconductor DS1315 RTC Driver
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3 *
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4 * $Id$
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5 *
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6 * The Burke & Burke HD Controller as well as Cloud-9's products
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7 * use the DS1315.
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8 *
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9 * Edt/Rev YYYY/MM/DD Modified by
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10 * Comment
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11 * ------------------------------------------------------------------
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12 * 1 2004/08/18 Boisy G. Pitre
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13 * Separated clock2 modules for source clarity.
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14
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15 nam Clock2
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16 ttl Dallas Semiconductor DS1315 RTC Driver
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17
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18 ifp1
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19 use defsfile
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20 endc
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21
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22 tylg set Sbrtn+Objct
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23 atrv set ReEnt+rev
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24 rev set $00
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25 edition set 1
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26
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27 IFNE BNB
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28 RTC.Base equ $FF5C In SCS* Decode
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29 ELSE
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30 RTC.Base equ $FF7C Fully decoded RTC
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31 ENDC
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32 RTC.Zero equ -4 Send zero bit by writing this offset
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33 RTC.One equ -3 Send one bit by writing this offset
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34 RTC.Read equ 0 Read data from this offset
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35
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36
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37 mod eom,name,tylg,atrv,JmpTable,RTC.Base
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38
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39 name fcs "Clock2"
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40 fcb edition
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41
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42 IFNE MPIFlag
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43 SlotSlct fcb MPI.Slot-1 Slot constant for MPI select code
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44 ENDC
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45
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46 JmpTable
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47 rts
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48 nop
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49 nop
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50 bra GetTime
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51 nop
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52
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53 SetTime pshs u,y,cc
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54 leay SendBCD,pcr Send bytes of clock
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55 bra TfrTime
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56
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57 GetTime pshs u,y,cc
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58 leay ReadBCD,pcr Read bytes of clock
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59
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60 TfrTime orcc #IntMasks turn off interrupts
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61 ldu M$Mem,pcr Get base address
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62
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63 IFNE MPIFlag
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64 ldb >MPI.Slct Select slot
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65 pshs b
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66 andb #$F0
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67 orb SlotSlct,pcr
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68 stb >MPI.Slct
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69 ENDC
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70
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71 lbsr SendMsg Initialize clock
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72 ldx #D.Sec
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73 ldb #8 Tfr 8 bytes
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74
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75 tfrloop jsr ,y Tfr 1 byte
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76
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77 bitb #$03
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78 beq skipstuf Skip over day-of-week, etc.
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79 leax -1,x
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80 skipstuf decb
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81 bne tfrloop
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82
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83 IFNE MPIFlag
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84 puls b
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85 stb >MPI.Slct restore MPAK slot
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86 ENDC
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87
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88 puls u,y,cc,pc
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89
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90 ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C
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91 * Enable clock with message $C53AA35CC53AA35C
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92 SendMsg lda RTC.Read,u Send Initialization message to clock
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93 leax <ClkMsg,pcr
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94 ldb #8
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95 msgloop lda ,x+
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96 bsr SendByte
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97 decb
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98 bne msgloop
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99 rts
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100
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101 SendBCD pshs b Send byte to clock, first converting to BCD
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102 bitb #$03
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103 bne BCDskip Send zero for day-of-week, etc.
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104 lda #0
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105 bra SndBCDGo
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106 BCDskip lda ,x
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107 SndBCDGo tfr a,b
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108 bra binenter
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109 binloop adda #6
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110 binenter subb #10
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111 bhs binloop
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112 puls b
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113 SendByte coma Send one byte to clock
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114 rora
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115 bcc sendone
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116 sendzero tst RTC.Zero,u
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117 lsra
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118 bcc sendone
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119 bne sendzero
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120 rts
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121 sendone tst RTC.One,u
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122 lsra
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123 bcc sendone
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124 bne sendzero
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125 rts
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126
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127 ReadBCD pshs b
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128 ldb #$80 High bit will rotate out after we read 8 bits
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129 readbit lda RTC.Read,u Read a bit
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130 lsra
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131 rorb Shift it into B
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132 bcc readbit Stop when marker bit appears
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133 tfr b,a
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134 bra BCDEnter Convert BCD number to Binary
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135 BCDLoop subb #6 by subtracting 6 for each $10
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136 BCDEnter suba #$10
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137 bhs BCDLoop
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138 stb ,x
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139 puls b,pc
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140
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141
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142
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143 emod
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144 eom equ *
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145 end
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146