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diff defs/dgndefs @ 1804:6e5fa42c2fb1

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Cleaned up defs files
author boisy
date Thu, 14 Apr 2005 17:10:37 +0000
parents e6e8a44ab20a
children 812b7ef7e21c
line wrap: on
line diff
--- a/defs/dgndefs	Thu Apr 14 01:41:06 2005 +0000
+++ b/defs/dgndefs	Thu Apr 14 17:10:37 2005 +0000
@@ -1,12 +1,29 @@
+	IFNE	DGNDEFS-1
+                         
+DGNDEFS set   1         
+                         
+********************************************************************
+* DgnDefs - Dragon I/O Definitions
 *
-* Deinitions for ports on Dragon 32/64/Alpha.
+* $Id$
 *
-* 2004/11/16. P.Harvey-Smith.
-* 	Fixed the stupid error I made in the defines below
-*	that made all the non DPxxxxx defines equal to FF00 !!!
+* Edt/Rev  YYYY/MM/DD  Modified by
+* Comment
+* ------------------------------------------------------------------
+*          2004/11/16  P.Harvey-Smith.
+* Fixed the stupid error I made in the defines below that made all the
+* non DPxxxxx defines equal to FF00 !!!
+
+         nam   DgnDefs  
+         ttl   Dragon I/O Definitions
+                         
+********************
+* CCIO Static Memory
 *
-
-IO		equ		$ff00		; IO page on Dragon
+* Definitions for ports on Dragon 32/64/Alpha.
+*
+*
+IO		equ		$ff00		IO page on Dragon
 
 *
 * Most of these symbols will be defined twice, as some 
@@ -16,90 +33,85 @@
 * The versions starting DP must be used with DP=$FF.
 *
 
-*Pia 0 and 1 standard on all Dragons.
-
-DPPIA0DA	EQU		$00		; Side A Data/DDR
-DPPIA0CRA	EQU		$01		; Side A Control.
-DPPIA0DB	EQU		$02		; Side B Data/DDR
-DPPIA0CRB	EQU		$03		; Side B Control.
+* PIA 0 and 1 standard on all Dragons.
+DPPIA0DA	EQU		$00		Side A Data/DDR
+DPPIA0CRA	EQU		$01		Side A Control.
+DPPIA0DB	EQU		$02		Side B Data/DDR
+DPPIA0CRB	EQU		$03		Side B Control.
 
-PIA0DA		EQU		DPPIA0DA+IO	; Side A Data/DDR
-PIA0CRA		EQU		DPPIA0CRA+IO	; Side A Control.
-PIA0DB		EQU		DPPIA0DB+IO	; Side A Data/DDR
-PIA0CRB		EQU		DPPIA0CRB+IO	; Side A Control.
+PIA0DA		EQU		DPPIA0DA+IO	Side A Data/DDR
+PIA0CRA		EQU		DPPIA0CRA+IO	Side A Control.
+PIA0DB		EQU		DPPIA0DB+IO	Side A Data/DDR
+PIA0CRB		EQU		DPPIA0CRB+IO	Side A Control.
 
-DPPIA1DA	EQU		$20		; Side A Data/DDR
-DPPIA1CRA	EQU		$21		; Side A Control.
-DPPIA1DB	EQU		$22		; Side B Data/DDR
-DPPIA1CRB	EQU		$23		; Side B Control.
+DPPIA1DA	EQU		$20		Side A Data/DDR
+DPPIA1CRA	EQU		$21		Side A Control.
+DPPIA1DB	EQU		$22		Side B Data/DDR
+DPPIA1CRB	EQU		$23		Side B Control.
 
-PIA1DA		EQU		DPPIA1DA+IO	; Side A Data/DDR
-PIA1CRA		EQU		DPPIA1CRA+IO	; Side A Control.
-PIA1DB		EQU		DPPIA1DB+IO	; Side A Data/DDR
-PIA1CRB		EQU		DPPIA1CRB+IO	; Side A Control.
+PIA1DA		EQU		DPPIA1DA+IO	Side A Data/DDR
+PIA1CRA		EQU		DPPIA1CRA+IO	Side A Control.
+PIA1DB		EQU		DPPIA1DB+IO	Side A Data/DDR
+PIA1CRB		EQU		DPPIA1CRB+IO	Side A Control.
 
-* Dragon Alpha has a third PIA at FF24.
+* Dragon Alpha has a third PIA at $FF24.
+DPPIA2DA	EQU		$24		Side A Data/DDR
+DPPIA2CRA	EQU		$25		Side A Control.
+DPPIA2DB	EQU		$26		Side B Data/DDR
+DPPIA2CRB	EQU		$27		Side B Control.
 
-DPPIA2DA	EQU		$24		; Side A Data/DDR
-DPPIA2CRA	EQU		$25		; Side A Control.
-DPPIA2DB	EQU		$26		; Side B Data/DDR
-DPPIA2CRB	EQU		$27		; Side B Control.
+PIA2DA		EQU		DPPIA2DA+IO	Side A Data/DDR
+PIA2CRA		EQU		DPPIA2CRA+IO	Side A Control.
+PIA2DB		EQU		DPPIA2DB+IO	Side A Data/DDR
+PIA2CRB		EQU		DPPIA2CRB+IO	Side A Control.
 
-PIA2DA		EQU		DPPIA2DA+IO	; Side A Data/DDR
-PIA2CRA		EQU		DPPIA2CRA+IO	; Side A Control.
-PIA2DB		EQU		DPPIA2DB+IO	; Side A Data/DDR
-PIA2CRB		EQU		DPPIA2CRB+IO	; Side A Control.
-
-;WD2797 Floppy disk controler, used in Alpha Note registers in reverse order !
-DPCmdRegA	EQU		$2F		; command/status			
-DPTrkRegA	EQU		$2E		; Track register
-DPSecRegA	EQU		$2D		; Sector register
-DPDataRegA	EQU		$2C		; Data register
+* WD2797 Floppy disk controler, used in Alpha Note registers in reverse order !
+DPCmdRegA	EQU		$2F		command/status			
+DPTrkRegA	EQU		$2E		Track register
+DPSecRegA	EQU		$2D		Sector register
+DPDataRegA	EQU		$2C		Data register
 
-CmdRegA		EQU		DPCMDREG+IO	; command/status			
-TrkRegA		EQU		DPTRKREG+IO	; Track register
-SecRegA		EQU		DPSECREG+IO	; Sector register
-DataRegA	EQU		DPDATAREG+IO	; Data register
-
-; Constants for Alpha AY-8912 sound chip, which is used to control
-; Drive select and motor on the Alpha
+CmdRegA		EQU		DPCMDREG+IO	command/status			
+TrkRegA		EQU		DPTRKREG+IO	Track register
+SecRegA		EQU		DPSECREG+IO	Sector register
+DataRegA	EQU		DPDATAREG+IO	Data register
 
-AYIOREG		EQU		$0E			; AY-8912, IO Register number.
-AYIdle		EQU		$00			; Make AY Idle.
-AYWriteReg	EQU		$01			; Write AY Register
-AYReadReg	EQU		$02			; Read AY Register
-AYREGLatch	EQU		$03			; Latch register into AY
+* Constants for Alpha AY-8912 sound chip, which is used to control
+* Drive select and motor on the Alpha
+AYIOREG		EQU		$0E		AY-8912, IO Register number.
+AYIdle		EQU		$00		Make AY Idle.
+AYWriteReg	EQU		$01		Write AY Register
+AYReadReg	EQU		$02		Read AY Register
+AYREGLatch	EQU		$03		Latch register into AY
 
-DSMask		EQU		$03			; Drive select mask.
-MotorMask	EQU		$04			; Motor enable mask
-DDENMask	EQU		$08			; DDEN Mask
-ENPMask		EQU		$10			; Enable Precomp mask
-NMIMask		EQU		$20			; NMI enable Mask
+DSMask		EQU		$03		Drive select mask.
+MotorMask	EQU		$04		Motor enable mask
+DDENMask	EQU		$08		DDEN Mask
+ENPMask		EQU		$10		Enable Precomp mask
+NMIMask		EQU		$20		NMI enable Mask
 
-; Dragon 64/Alpha Serial port.
-DPAciaData	EQU		$04		; Acia Rx/Tx Register
-DPAciaStat	EQU		$05		; Acia status register
-DPAciaCmd	EQU		$06		; Acia command register
-DPAciaCtrl	EQU		$07		; Acia control register
-
-;DragonDos Cartrage IO for WD2797
+* Dragon 64/Alpha Serial port.
+DPAciaData	EQU		$04		ACIA Rx/Tx Register
+DPAciaStat	EQU		$05		ACIA status register
+DPAciaCmd	EQU		$06		ACIA command register
+DPAciaCtrl	EQU		$07		ACIA control register
 
-;WD2797 Floppy disk controler, used in DragonDos.
-DPCmdRegD	EQU		$40		; command/status			
-DPTrkRegD	EQU		$41		; Track register
-DPSecRegD	EQU		$42		; Sector register
-DPDataRegD	EQU		$43		; Data register
+* DragonDos Cartrage IO for WD2797
+* WD2797 Floppy disk controler, used in DragonDos.
+DPCmdRegD	EQU		$40		command/status			
+DPTrkRegD	EQU		$41		Track register
+DPSecRegD	EQU		$42		Sector register
+DPDataRegD	EQU		$43		Data register
 
-CmdRegD		EQU		DPCMDREG+IO	; command/status			
-TrkRegD		EQU		DPTRKREG+IO	; Track register
-SecRegD		EQU		DPSECREG+IO	; Sector register
-DataRegD	EQU		DPDATAREG+IO	; Data register
+CmdRegD		EQU		DPCMDREG+IO	command/status			
+TrkRegD		EQU		DPTRKREG+IO	Track register
+SecRegD		EQU		DPSECREG+IO	Sector register
+DataRegD	EQU		DPDATAREG+IO	Data register
 
-DPDSKCTL	EQU		$48			; Disk DS/motor control reg
+DPDSKCTL	EQU		$48		Disk DS/motor control reg
 DSKCTL		EQU		DPDSKCTL+IO		
 
-; Disk IO bitmasks (DragonDos).
-
+* Disk IO bitmasks (DragonDos).
 NMIEnD    	EQU		%00100000 
 WPCEnD    	EQU   	%00010000 
 SDensEnD  	EQU   	%00001000 
@@ -110,11 +122,10 @@
 Drive3D		EQU		%00000011
 
 
-; Disk IO bitmasks (Dragon Alpha).
-
-NMIEnA    	EQU		%10000000	; This is just a guess, but in current code just used as a flag 
-WPCEnA    	EQU   	%01000000 	; Acording to circuit trace by R.Harding.
-SDensEnA  	EQU   	%00000000 	; DDen is pulled low on the alpha, so always enabled.
+* Disk IO bitmasks (Dragon Alpha).
+NMIEnA    	EQU		%10000000	This is just a guess, but in current code just used as a flag 
+WPCEnA    	EQU   	%01000000 	According to circuit trace by R.Harding.
+SDensEnA  	EQU   	%00000000 	DDen is pulled low on the alpha, so always enabled.
 MotorOnA  	EQU   	%00010000 	
 Drive0A		EQU		%00000001
 Drive1A		EQU		%00000010
@@ -144,3 +155,4 @@
 DensMask 	EQU   	%00000001 
 T80Mask  	EQU   	%00000010 
 
+		ENDC