Mercurial > hg > Members > kono > nitros9-code
changeset 1265:50eb02f90812
Removed older bootlists.
Split clock into two modules: Clock and Clock2
| author | boisy |
|---|---|
| date | Tue, 19 Aug 2003 04:06:04 +0000 |
| parents | 64a0273a846a |
| children | 7cb546cb7e80 |
| files | level2/coco3/bootfiles/makefile level2/coco3/bootfiles/makefile.cust level2/coco3/bootlists/bootlist_vdg level2/coco3/bootlists/bootlist_win40 level2/coco3/bootlists/bootlist_win80 level2/coco3/bootlists/standard.bl level2/coco3_6309/bootfiles/makefile level2/coco3_6309/bootfiles/makefile.cust level2/coco3_6309/bootlists/bootlist_vdg level2/coco3_6309/bootlists/bootlist_win40 level2/coco3_6309/bootlists/bootlist_win80 level2/coco3_6309/bootlists/standard.bl level2/modules/clock.asm level2/modules/clock2.asm level2/modules/makefile |
| diffstat | 15 files changed, 862 insertions(+), 901 deletions(-) [+] |
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--- a/level2/coco3/bootfiles/makefile Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/coco3/bootfiles/makefile Tue Aug 19 04:06:04 2003 +0000 @@ -23,7 +23,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILE_WIN40 = $(MD)/os9p2 $(MD)/ioman $(MD)/init \ $(MD)/rbf.mn \ @@ -36,7 +36,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILE_WIN80 = $(MD)/os9p2 $(MD)/ioman $(MD)/init \ $(MD)/rbf.mn \ @@ -49,7 +49,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILES = bootfile_vdg bootfile_win40 bootfile_win80 KERNELS = kernel_stock
--- a/level2/coco3/bootfiles/makefile.cust Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/coco3/bootfiles/makefile.cust Tue Aug 19 04:06:04 2003 +0000 @@ -28,7 +28,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_tc3 + $(MD)/clock_60hz $(MD)/clock2_tc3 BOOTFILE_1773_ROM = $(MD)/rominfo @@ -36,7 +36,7 @@ BOOTFILE_ROM = $(MD)/rominfo $(MD)/os9p2 $(MD)/init $(MD)/ioman \ $(MD)/scf.mn $(MD)/sio.dr $(MD)/term_t1.dd \ $(MD)/sspak.dr $(MD)/ssp.dd \ - $(MD)/clock_soft $(MD)/cc3go_rom \ + $(MD)/clock_60hz $(MD)/clock2_soft \ $(CD)/shell $(CD)/mdir $(CD)/mfree $(CD)/procs BOOTFILE_DW = $(MD)/os9p2 $(MD)/ioman $(MD)/init \ @@ -59,7 +59,7 @@ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/vrn.dr $(MD)/vi.dd $(MD)/ftdd.dd \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(C9)/drivewire/clock_dw_l2 + $(MD)/clock_60hz $(C9)/drivewire/level2/clock2_dw # OS-9 disk bootfile to allow booting from Ken-Ton SCSI controller # This is a custom boot for Boisy's system @@ -79,7 +79,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_tc3 + $(MD)/clock_60hz $(MD)/clock2_tc3 # OS-9 disk bootfile to allow booting from Ken-Ton SCSI controller BOOTFILE_KENTON = $(C9)/superscsi/superscsi_ktlr_l2.dr \ @@ -96,7 +96,7 @@ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(3PD)/s16550/s16550_large.dr $(3PD)/s16550/t2_s16550.dd \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILES = bootfile_1773 bootfile_drivewire bootfile_tc3 bootfile_kenton bootfile_rom KERNELS = kernel_1773 kernel_tc3 kernel_drivewire kernel_kenton kernel_rom
--- a/level2/coco3/bootlists/bootlist_vdg Mon Aug 18 23:09:22 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,22 +0,0 @@ -* OS-9 Level Two Bootlist (VDG term, 40 track DS) -MODULES/KERNEL/os9p2 -MODULES/SYSMODS/ioman -MODULES/SYSMODS/init -MODULES/RBF/rbf.mn -MODULES/RBF/cc3disk.dr -MODULES/RBF/d0_40d.dd -MODULES/RBF/d1_40d.dd -MODULES/RBF/ddd0_40d.dd -MODULES/SCF/scf.mn -MODULES/SCF/cc3io.dr -MODULES/SCF/vdgint.io -MODULES/SCF/keydrv_cc3.sb -MODULES/SCF/joydrv_joy.sb -MODULES/SCF/snddrv_cc3.sb -MODULES/SCF/term_vdg.dt -MODULES/PIPE/pipeman.mn -MODULES/PIPE/piper.dr -MODULES/PIPE/pipe.dd -MODULES/CLOCKS/clock_soft -MODULES/SYSMODS/cc3go -
--- a/level2/coco3/bootlists/bootlist_win40 Mon Aug 18 23:09:22 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,30 +0,0 @@ -* OS-9 Level Two Bootlist (40x24 term, 40 track DS) -MODULES/KERNEL/os9p2 -MODULES/SYSMODS/ioman -MODULES/SYSMODS/init -MODULES/RBF/rbf.mn -MODULES/RBF/cc3disk.dr -MODULES/RBF/d0_40d.dd -MODULES/RBF/d1_40d.dd -MODULES/RBF/ddd0_40d.dd -MODULES/SCF/scf.mn -MODULES/SCF/cc3io.dr -MODULES/SCF/windint.io -MODULES/SCF/keydrv_cc3.sb -MODULES/SCF/joydrv_joy.sb -MODULES/SCF/snddrv_cc3.sb -MODULES/SCF/term_win40.dt -MODULES/SCF/w.dw -MODULES/SCF/w1.dw -MODULES/SCF/w2.dw -MODULES/SCF/w3.dw -MODULES/SCF/w4.dw -MODULES/SCF/w5.dw -MODULES/SCF/w6.dw -MODULES/SCF/w7.dw -MODULES/PIPE/pipeman.mn -MODULES/PIPE/piper.dr -MODULES/PIPE/pipe.dd -MODULES/CLOCKS/clock_soft -MODULES/SYSMODS/cc3go -
--- a/level2/coco3/bootlists/bootlist_win80 Mon Aug 18 23:09:22 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,30 +0,0 @@ -* OS-9 Level Two Bootlist (80x24 term, 40 track DS) -MODULES/KERNEL/os9p2 -MODULES/SYSMODS/ioman -MODULES/SYSMODS/init -MODULES/RBF/rbf.mn -MODULES/RBF/cc3disk.dr -MODULES/RBF/d0_40d.dd -MODULES/RBF/d1_40d.dd -MODULES/RBF/ddd0_40d.dd -MODULES/SCF/scf.mn -MODULES/SCF/cc3io.dr -MODULES/SCF/windint.io -MODULES/SCF/keydrv_cc3.sb -MODULES/SCF/joydrv_joy.sb -MODULES/SCF/snddrv_cc3.sb -MODULES/SCF/term_win80.dt -MODULES/SCF/w.dw -MODULES/SCF/w1.dw -MODULES/SCF/w2.dw -MODULES/SCF/w3.dw -MODULES/SCF/w4.dw -MODULES/SCF/w5.dw -MODULES/SCF/w6.dw -MODULES/SCF/w7.dw -MODULES/PIPE/pipeman.mn -MODULES/PIPE/piper.dr -MODULES/PIPE/pipe.dd -MODULES/CLOCKS/clock_soft -MODULES/SYSMODS/cc3go -
--- a/level2/coco3/bootlists/standard.bl Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/coco3/bootlists/standard.bl Tue Aug 19 04:06:04 2003 +0000 @@ -94,11 +94,11 @@ * ../MODULES/SCF/scf.mn * -* CoCo 3 I/O driver and subroutine modules +* CoCo 3 I/O driver * Joystick modules: choose Joystick OR * (M)icrosoft or (L)ogitech mouse using 6551 or 6552 ACIA ../MODULES/SCF/cc3io.dr -../MODULES/SCF/keydrv_cc3.sb +../MODULES/SCF/keydrv_cc3.sb ../MODULES/SCF/snddrv_cc3.sb ../MODULES/SCF/joydrv_joy.sb *../MODULES/SCF/joydrv_6551M.sb @@ -175,26 +175,30 @@ *************************************** * Clock Section * -* Select only one clock module. +* Select one clock module depending upon your power line frequency +* (60Hz = USA/Canada; 50Hz = Europe, Australia) +../MODULES/CLOCKS/clock_60hz +*../MODULES/CLOCKS/clock_50hz +* Select one clock2 module that supports your real-time clock, if any. * Besides support for the internal software clock, the following * hardware clocks are supported: Burke & Burke, Disto 2-N-1, Disto 4-N-1, * Eliminator, Harris, SmartWatch, TC^3, DriveWire -../MODULES/CLOCKS/clock_soft -*../MODULES/CLOCKS/clock_bnb -*../MODULES/CLOCKS/clock_disto2 -*../MODULES/CLOCKS/clock_disto4 -*../MODULES/CLOCKS/clock_elim -*../MODULES/CLOCKS/clock_harris -*../MODULES/CLOCKS/clock_smart -*../MODULES/CLOCKS/clock_tc3 -*../MODULES/CLOCKS/clock_dw +../MODULES/CLOCKS/clock2_soft +*../MODULES/CLOCKS/clock2_bnb +*../MODULES/CLOCKS/clock2_disto2 +*../MODULES/CLOCKS/clock2_disto4 +*../MODULES/CLOCKS/clock2_elim +*../MODULES/CLOCKS/clock2_harris +*../MODULES/CLOCKS/clock2_smart +*../MODULES/CLOCKS/clock2_tc3 +*../MODULES/CLOCKS/clock2_dw * *************************************** * System Kick-Start Module * * Choose which startup module you wish to use. (cc3go_dd is recommended * for most configurations.) -* +* * Alternatively, this module can reside in the root directory of the * boot device, saving precious system RAM. ../MODULES/SYSMODS/cc3go_dd
--- a/level2/coco3_6309/bootfiles/makefile Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/coco3_6309/bootfiles/makefile Tue Aug 19 04:06:04 2003 +0000 @@ -23,7 +23,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILE_WIN40 = $(MD)/os9p2 $(MD)/ioman $(MD)/init \ $(MD)/rbf.mn \ @@ -36,7 +36,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILE_WIN80 = $(MD)/os9p2 $(MD)/ioman $(MD)/init \ $(MD)/rbf.mn \ @@ -49,7 +49,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILES = bootfile_vdg bootfile_win40 bootfile_win80 KERNELS = kernel_stock
--- a/level2/coco3_6309/bootfiles/makefile.cust Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/coco3_6309/bootfiles/makefile.cust Tue Aug 19 04:06:04 2003 +0000 @@ -28,7 +28,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_tc3 + $(MD)/clock_60hz $(MD)/clock2_tc3 BOOTFILE_1773_ROM = $(MD)/rominfo @@ -36,7 +36,7 @@ BOOTFILE_ROM = $(MD)/rominfo $(MD)/os9p2 $(MD)/init $(MD)/ioman \ $(MD)/scf.mn $(MD)/sio.dr $(MD)/term_t1.dd \ $(MD)/sspak.dr $(MD)/ssp.dd \ - $(MD)/clock_soft $(MD)/cc3go_rom \ + $(MD)/clock_60hz $(MD)/clock2_soft \ $(CD)/shell $(CD)/mdir $(CD)/mfree $(CD)/procs BOOTFILE_DW = $(MD)/os9p2 $(MD)/ioman $(MD)/init \ @@ -59,7 +59,7 @@ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/vrn.dr $(MD)/vi.dd $(MD)/ftdd.dd \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(C9)/drivewire/clock_dw_l2 + $(MD)/clock_60hz $(C9)/drivewire/level2/clock2_dw # OS-9 disk bootfile to allow booting from Ken-Ton SCSI controller # This is a custom boot for Boisy's system @@ -79,7 +79,7 @@ $(MD)/w.dw $(MD)/w1.dw $(MD)/w2.dw $(MD)/w3.dw $(MD)/w4.dw \ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_tc3 + $(MD)/clock_60hz $(MD)/clock2_tc3 # OS-9 disk bootfile to allow booting from Ken-Ton SCSI controller BOOTFILE_KENTON = $(C9)/superscsi/superscsi_ktlr_l2.dr \ @@ -96,7 +96,7 @@ $(MD)/w5.dw $(MD)/w6.dw $(MD)/w7.dw \ $(3PD)/s16550/s16550_large.dr $(3PD)/s16550/t2_s16550.dd \ $(MD)/pipeman.mn $(MD)/piper.dr $(MD)/pipe.dd \ - $(MD)/clock_soft + $(MD)/clock_60hz $(MD)/clock2_soft BOOTFILES = bootfile_1773 bootfile_drivewire bootfile_tc3 bootfile_kenton bootfile_rom KERNELS = kernel_1773 kernel_tc3 kernel_drivewire kernel_kenton kernel_rom
--- a/level2/coco3_6309/bootlists/bootlist_vdg Mon Aug 18 23:09:22 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,22 +0,0 @@ -* OS-9 Level Two Bootlist (VDG term, 40 track DS) -MODULES/KERNEL/os9p2 -MODULES/SYSMODS/ioman -MODULES/SYSMODS/init -MODULES/RBF/rbf.mn -MODULES/RBF/cc3disk.dr -MODULES/RBF/d0_40d.dd -MODULES/RBF/d1_40d.dd -MODULES/RBF/ddd0_40d.dd -MODULES/SCF/scf.mn -MODULES/SCF/cc3io.dr -MODULES/SCF/vdgint.io -MODULES/SCF/keydrv_cc3.sb -MODULES/SCF/joydrv_joy.sb -MODULES/SCF/snddrv_cc3.sb -MODULES/SCF/term_vdg.dt -MODULES/PIPE/pipeman.mn -MODULES/PIPE/piper.dr -MODULES/PIPE/pipe.dd -MODULES/CLOCKS/clock_soft -MODULES/SYSMODS/cc3go -
--- a/level2/coco3_6309/bootlists/bootlist_win40 Mon Aug 18 23:09:22 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,30 +0,0 @@ -* OS-9 Level Two Bootlist (40x24 term, 40 track DS) -MODULES/KERNEL/os9p2 -MODULES/SYSMODS/ioman -MODULES/SYSMODS/init -MODULES/RBF/rbf.mn -MODULES/RBF/cc3disk.dr -MODULES/RBF/d0_40d.dd -MODULES/RBF/d1_40d.dd -MODULES/RBF/ddd0_40d.dd -MODULES/SCF/scf.mn -MODULES/SCF/cc3io.dr -MODULES/SCF/windint.io -MODULES/SCF/keydrv_cc3.sb -MODULES/SCF/joydrv_joy.sb -MODULES/SCF/snddrv_cc3.sb -MODULES/SCF/term_win40.dt -MODULES/SCF/w.dw -MODULES/SCF/w1.dw -MODULES/SCF/w2.dw -MODULES/SCF/w3.dw -MODULES/SCF/w4.dw -MODULES/SCF/w5.dw -MODULES/SCF/w6.dw -MODULES/SCF/w7.dw -MODULES/PIPE/pipeman.mn -MODULES/PIPE/piper.dr -MODULES/PIPE/pipe.dd -MODULES/CLOCKS/clock_soft -MODULES/SYSMODS/cc3go -
--- a/level2/coco3_6309/bootlists/bootlist_win80 Mon Aug 18 23:09:22 2003 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,30 +0,0 @@ -* OS-9 Level Two Bootlist (80x24 term, 40 track DS) -MODULES/KERNEL/os9p2 -MODULES/SYSMODS/ioman -MODULES/SYSMODS/init -MODULES/RBF/rbf.mn -MODULES/RBF/cc3disk.dr -MODULES/RBF/d0_40d.dd -MODULES/RBF/d1_40d.dd -MODULES/RBF/ddd0_40d.dd -MODULES/SCF/scf.mn -MODULES/SCF/cc3io.dr -MODULES/SCF/windint.io -MODULES/SCF/keydrv_cc3.sb -MODULES/SCF/joydrv_joy.sb -MODULES/SCF/snddrv_cc3.sb -MODULES/SCF/term_win80.dt -MODULES/SCF/w.dw -MODULES/SCF/w1.dw -MODULES/SCF/w2.dw -MODULES/SCF/w3.dw -MODULES/SCF/w4.dw -MODULES/SCF/w5.dw -MODULES/SCF/w6.dw -MODULES/SCF/w7.dw -MODULES/PIPE/pipeman.mn -MODULES/PIPE/piper.dr -MODULES/PIPE/pipe.dd -MODULES/CLOCKS/clock_soft -MODULES/SYSMODS/cc3go -
--- a/level2/coco3_6309/bootlists/standard.bl Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/coco3_6309/bootlists/standard.bl Tue Aug 19 04:06:04 2003 +0000 @@ -94,11 +94,11 @@ * ../MODULES/SCF/scf.mn * -* CoCo 3 I/O driver and subroutine modules +* CoCo 3 I/O driver * Joystick modules: choose Joystick OR * (M)icrosoft or (L)ogitech mouse using 6551 or 6552 ACIA ../MODULES/SCF/cc3io.dr -../MODULES/SCF/keydrv_cc3.sb +../MODULES/SCF/keydrv_cc3.sb ../MODULES/SCF/snddrv_cc3.sb ../MODULES/SCF/joydrv_joy.sb *../MODULES/SCF/joydrv_6551M.sb @@ -175,26 +175,30 @@ *************************************** * Clock Section * -* Select only one clock module. +* Select one clock module depending upon your power line frequency +* (60Hz = USA/Canada; 50Hz = Europe, Australia) +../MODULES/CLOCKS/clock_60hz +*../MODULES/CLOCKS/clock_50hz +* Select one clock2 module that supports your real-time clock, if any. * Besides support for the internal software clock, the following * hardware clocks are supported: Burke & Burke, Disto 2-N-1, Disto 4-N-1, * Eliminator, Harris, SmartWatch, TC^3, DriveWire -../MODULES/CLOCKS/clock_soft -*../MODULES/CLOCKS/clock_bnb -*../MODULES/CLOCKS/clock_disto2 -*../MODULES/CLOCKS/clock_disto4 -*../MODULES/CLOCKS/clock_elim -*../MODULES/CLOCKS/clock_harris -*../MODULES/CLOCKS/clock_smart -*../MODULES/CLOCKS/clock_tc3 -*../MODULES/CLOCKS/clock_dw +../MODULES/CLOCKS/clock2_soft +*../MODULES/CLOCKS/clock2_bnb +*../MODULES/CLOCKS/clock2_disto2 +*../MODULES/CLOCKS/clock2_disto4 +*../MODULES/CLOCKS/clock2_elim +*../MODULES/CLOCKS/clock2_harris +*../MODULES/CLOCKS/clock2_smart +*../MODULES/CLOCKS/clock2_tc3 +*../MODULES/CLOCKS/clock2_dw * *************************************** * System Kick-Start Module * * Choose which startup module you wish to use. (cc3go_dd is recommended * for most configurations.) -* +* * Alternatively, this module can reside in the root directory of the * boot device, saving precious system RAM. ../MODULES/SYSMODS/cc3go_dd
--- a/level2/modules/clock.asm Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/modules/clock.asm Tue Aug 19 04:06:04 2003 +0000 @@ -1,5 +1,5 @@ ******************************************************************** -* Clock - Clocks for OS-9 Level Two/NitrOS-9 +* Clock - Clock for OS-9 Level Two/NitrOS-9 * * Clock module for CoCo 3 and TC9 OS9 Level 2 and NitrOS-9 * @@ -10,13 +10,20 @@ * * $Id$ * -* Ed. Comments Who YY/MM/DD +* Edt/Rev YYYY/MM/DD Modified by +* Comment * ------------------------------------------------------------------ -* NitrOS-9 2.00 distribution ??/??/?? -* Back-ported to OS-9 Level Two BGP 03/01/01 +* ????/??/?? +* NitrOS-9 2.00 distribution. +* +* 9r4 2003/01/01 Boisy G. Pitre +* Back-ported to OS-9 Level Two. +* +* 9r5 2003/08/18 Boisy G. Pitre +* Separated clock into Clock and Clock2 for modularity. nam Clock - ttl Clocks for OS-9 Level Two/NitrOS-9 + ttl Clock for OS-9 Level Two/NitrOS-9 TkPerTS equ 2 ticks per time slice GI.Toggl equ %00000001 GIME CART* IRQ enable bit, for CC3 @@ -29,65 +36,17 @@ ENDC Edtn equ 9 -Vrsn equ 4 NitrOS-9 version - -* -* Setup for specific RTC chip -* - IFNE RTCDriveWire -RTC.Base equ $0000 - ENDC - - IFNE RTCElim -RTC.Sped equ $20 32.768 KHz, rate=0 -RTC.Strt equ $06 binary, 24 Hour, DST disabled -RTC.Stop equ $86 bit 7 set stops clock to allow setting time -RTC.Base equ $FF72 I don't know base for this chip. - ENDC - - IFNE RTCDsto2+RTCDsto4 -RTC.Base equ $FF50 Base address of clock - ENDC - - IFNE RTCBB+RTCTc3 - IFNE RTCBB -RTC.Base equ $FF5C In SCS* Decode - ELSE -RTC.Base equ $FF7C Fully decoded RTC - ENDC -RTC.Zero equ -4 Send zero bit by writing this offset -RTC.One equ -3 Send one bit by writing this offset -RTC.Read equ 0 Read data from this offset - ENDC - - IFNE RTCSmart -RTC.Base equ $4004 We map the clock into this addr -RTC.Zero equ -4 Send zero bit by writing this offset -RTC.One equ -3 Send one bit by writing this offset -RTC.Read equ 0 Read data from this offset - ENDC - - IFNE RTCHarrs -RTC.Base equ $FF60 Base address for clock - ENDC - - IFNE RTCSoft -RTC.Base equ 0 Have to have one defined. - ENDC +Vrsn equ 5 *------------------------------------------------------------ * * Start of module * - mod len,name,Systm+Objct,ReEnt+Vrsn,Init,RTC.Base + mod len,name,Systm+Objct,ReEnt+Vrsn,Init,0 name fcs "Clock" fcb Edtn - IFNE MPIFlag -SlotSlct fcb MPI.Slot-1 Slot constant for MPI select code - ENDC - * * Table to set up Service Calls: * @@ -244,9 +203,13 @@ blo VIRQend No, skip time update and alarm check clr <D.Sec Reset second count to zero - lbsr UpdTime +* +* Call GetTime entry point in Clock2 +* + ldx <D.Clock2 get entry point to Clock2 + jsr $03,x call GetTime entry point - ldd >WGlobal+G.AlPID +NoGet ldd >WGlobal+G.AlPID ble VIRQend Quit if no Alarm set ldd >WGlobal+G.AlPckt+3 Does Hour/Minute agree? cmpd <D.Hour @@ -314,463 +277,6 @@ clrb rts -*------------------------------------------------------------ -* -* Update time subroutines -* -* The subroutine UpdTime is called once per minute. On systems -* with an RTC, UpdTime reads the RTC and sets the D.Time variables. -* - -* -* Eliminator time update (lacks MPI slot select ability) -* - IFNE RTCElim -UpdTime ldx M$Mem,pcr get RTC base address from fake memory requirement - ldb #$0A UIP status register address - stb ,x generate address strobe - lda 1,x get UIP status - bpl NoUIP Update In Progress, go shift next RTC read - lda #TkPerSec/2 set up next RTC read attempt in 1/2 second - sta <D.Tick save tick - bra UpdTExit and return - -NoUIP decb year register address - stb ,x generate address strobe - lda 1,x get year - sta <D.Year - decb month register address - stb ,x - lda 1,x - sta <D.Month - decb day of month register address - stb ,x - lda 1,x - sta <D.Day - ldb #4 hour register address - stb ,x - lda 1,x - sta <D.Hour - ldb #2 minute register address - stb ,x - lda 1,x - sta <D.Min - clrb second register address - stb ,x - lda 1,x -SaveSec sta <D.Sec -UpdTExit rts - ENDC - -* -* Disto 2-in-1 RTC time update -* - IFNE RTCDsto2 -UpdTime pshs a,cc Save old interrupt status and mask IRQs - bsr RTCPre - - bsr GetVal Get Year - bsr GetVal Get Month - bsr GetVal Get Day - decb ldb #5 - stb 2,x - decb - lda ,x - anda #3 - bsr GetVal1 Get Hour - bsr GetVal Get Minute - bsr GetVal Get Second - -RTCPost clr >$FFD9 2 MHz (Really should check $A0 first) - puls cc,b - - IFNE MPIFlag - stb >MPI.Slct Restore saved "currently" selected MPak slot - ENDC - - clrb - rts - -RTCPre orcc #IntMasks - - IFNE MPIFlag - ldb >MPI.Slct Save currently selected MPak slot on stack - stb 3,s - andb #$F0 - orb >SlotSlct,pcr Get slot to select - stb >MPI.Slct Select MPak slot for clock - ENDC - - ldy #D.Time - ldx M$Mem,pcr - clr 1,x - ldb #12 - clr >$FFD8 1 MHz - rts - -GetVal stb 2,x - decb - lda ,x read tens digit from clock - anda #$0f -GetVal1 pshs b save b - ldb #10 - mul multiply by 10 to get value - stb ,y save 10s value - puls b set up clock for ones digit - stb 2,x - decb - lda ,x read ones digit from clock - anda #$0f - adda ,y add ones + tens - sta ,y+ store clock value into time packet - rts - - ENDC - -* -* Disto 4-in-1 RTC time update -* - IFNE RTCDsto4 -UpdTime equ * - IFNE MPIFlag - pshs cc Save old interrupt status and mask IRQs - orcc #IntMasks - ldb >MPI.Slct Save currently selected MPak slot on stack - pshs b - andb #$F0 - orb >SlotSlct,pcr Select MPak slot for clock - stb >MPI.Slct - ENDC - - ldx M$Mem,pcr - ldy #D.Time Start with seconds - - ldb #11 - bsr GetVal Get Year - bsr GetVal Get Month - bsr GetVal Get Day - lda #3 Mask tens digit of hour to remove AM/PM bit - bsr GetVal1 Get Hour - bsr GetVal Get Minute - bsr GetVal Get Second - - IFNE MPIFlag - puls b Restore saved "currently" selected MPak slot - stb >MPI.Slct - puls cc,pc Restore previous IRQ status - ELSE - rts No MPI, don't need to mess with slot, CC - ENDC - -GetVal lda #$0f Mask to apply to tens digit -GetVal1 stb 1,x - decb - anda ,x read ones digit from clock - pshs b save b - ldb #10 - mul multiply by 10 to get value - stb ,y Add to ones digit - puls b - stb 1,x - decb - lda ,x read tens digit from clock and mask it - anda #$0f - adda ,y - sta ,y+ - rts - - ENDC - - -* -* Update time from DriveWire -* - IFNE RTCDriveWire - - use bbwrite.asm - -UpdTime pshs y,x,cc - lda #'# Time packet - orcc #IntMasks Disable interrupts - lbsr SerWrite - bsr SerRead Read year byte - bcs UpdLeave - sta <D.Year - bsr SerRead Read month byte - bcs UpdLeave - sta <D.Month - bsr SerRead Read day byte - bcs UpdLeave - sta <D.Day - bsr SerRead Read hour byte - bcs UpdLeave - sta <D.Hour - bsr SerRead Read minute byte - bcs UpdLeave - sta <D.Min - bsr SerRead Read second byte - bcs UpdLeave - sta <D.Sec - bsr SerRead Read day of week (0-6) byte -UpdLeave puls cc,x,y,pc - - use bbread.asm - - ENDC - -* -* Update time from B&B RTC -* - IFNE RTCBB+RTCTc3 -UpdTime pshs u,y,cc - leay ReadBCD,pcr Read bytes of clock - -TfrTime orcc #IntMasks turn off interrupts - ldu M$Mem,pcr Get base address - - IFNE MPIFlag - ldb >MPI.Slct Select slot - pshs b - andb #$F0 - orb SlotSlct,pcr - stb >MPI.Slct - ENDC - - lbsr SendMsg Initialize clock - ldx #D.Sec - ldb #8 Tfr 8 bytes - -tfrloop jsr ,y Tfr 1 byte - - bitb #$03 - beq skipstuf Skip over day-of-week, etc. - leax -1,x -skipstuf decb - bne tfrloop - - IFNE MPIFlag - puls b - stb >MPI.Slct restore MPAK slot - ENDC - - puls u,y,cc,pc - -ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C -* Enable clock with message $C53AA35CC53AA35C -SendMsg lda RTC.Read,u Send Initialization message to clock - leax <ClkMsg,pcr - ldb #8 -msgloop lda ,x+ - bsr SendByte - decb - bne msgloop - rts - -SendBCD pshs b Send byte to clock, first converting to BCD - bitb #$03 - bne BCDskip Send zero for day-of-week, etc. - lda #0 - bra SndBCDGo -BCDskip lda ,x -SndBCDGo tfr a,b - bra binenter -binloop adda #6 -binenter subb #10 - bhs binloop - puls b -SendByte coma Send one byte to clock - rora - bcc sendone -sendzero tst RTC.Zero,u - lsra - bcc sendone - bne sendzero - rts -sendone tst RTC.One,u - lsra - bcc sendone - bne sendzero - rts - - -ReadBCD pshs b - ldb #$80 High bit will rotate out after we read 8 bits -readbit lda RTC.Read,u Read a bit - lsra - rorb Shift it into B - bcc readbit Stop when marker bit appears - tfr b,a - bra BCDEnter Convert BCD number to Binary -BCDLoop subb #6 by subtracting 6 for each $10 -BCDEnter suba #$10 - bhs BCDLoop - stb ,x - puls b,pc - - ENDC - - -* -* Update time from Smartwatch RTC -* - IFNE RTCSmart -UpdTime pshs cc - orcc #IntMasks Disable interrupts - lda >MPI.Slct Get MPI slot - ldb <$90 Get GIME shadow of $FF90 - pshs b,a - anda #$F0 - ora >SlotSlct,pcr Get new slot to select - anda #$03 *** TEST *** - sta >MPI.Slct And select it - andb #$FC - stb >$FF90 ROM mapping = 16k internal, 16k external - ldb >$FFA2 Read GIME for $4000-$5fff - pshs b - lda #$3E - sta >$FFA2 Put block $3E at $4000-$5fff - clr >$FFDE Map RAM/ROM, to map in external ROM - lbsr SendMsg Initialize clock - ldx #D.Sec Start with seconds - lda #$08 - sta ,-s Set up loop counter = 8 -L021E ldb #$08 -L0220 lda >RTC.Read+RTC.Base Read one bit - lsra - ror ,x Put bit into time - decb End of bit loop - bne L0220 - lda ,s Check loop counter - cmpa #$08 - beq L023D Fill "seconds" twice (ignore 1st value) - cmpa #$04 - bne L0239 - ldb ,x Save 4th value read at $34 (day of week?) - stb $0A,x - bra L023D And overwrite "day" with day -L0239 leax -$01,x Go to next time to read - bsr BCD2Dec Convert 1,x from BCD to decimal -L023D dec ,s - bne L021E End of loop for reading time - leas $01,s Done with loop counter - clr >$FFDF Map all RAM - puls b - stb >$FFA2 Put back original memory block - puls b,a - sta >MPI.Slct - stb >$FF90 Restore original ROM mapping - puls cc,pc Re-enable interrupts - -* Convert BCD to a normal number - -BCD2Dec lda $01,x - clrb -B2DLoop cmpa #$10 - bcs B2DDone - suba #$10 - addb #$0A - bra B2DLoop -B2DDone pshs a - addb ,s+ - stb $01,x - rts - -ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C - -* Send above "string" to smartwatch, one bit at a time - -SendMsg leax <ClkMsg,pcr - lda >RTC.Read+RTC.Base Tell clock we're going to start??? - lda #$08 - sta ,-s Store counter = 8 -L006B ldb #$08 Start of outer loop, 8 bytes to send - lda ,x+ Get byte to send -L006F lsra Start of inner loop, 8 bits to send - bcs L0077 - tst >RTC.Zero+RTC.Base Send a "zero" bit - bra L007A -L0077 tst >RTC.One+RTC.Base Send a "one" bit -L007A decb - bne L006F End of inner loop - dec ,s End of outer loop - bne L006B - puls pc,a - - ENDC - -* -* Update time from Harris RTC -* - IFNE RTCHarrs -UpdTime pshs cc - orcc #IntMasks Disable interrupts - - ldu M$Mem,pcr Get base address - ldy #D.Time Pointer to time in system map - - lda #%00001100 Init command register (Normal,Int. Disabled, - sta $11,u Run,24-hour mode, 32kHz) - - lda ,u Read base address to set-up clock regs for read - lda 6,u Get year - sta ,y+ - lda 4,u Get month - sta ,y+ - lda 5,u Get day - sta ,y+ - lda 1,u Get hour - sta ,y+ - lda 2,u Get minute - sta ,y+ - lda 3,u Get second - sta ,y+ - - puls cc,pc Re-enable interrupts - ENDC -* -* -* Software time update -* -* - - IFNE RTCSoft -UpdTime lda <D.Min grab current minute - inca minute+1 - cmpa #60 End of hour? - blo UpdMin no, Set start of minute - ldd <D.Day get day, hour - incb hour+1 - cmpb #24 End of Day? - blo UpdHour ..no - inca day+1 - leax months-1,pcr point to months table with offset-1: Jan = +1 - ldb <D.Month this month - cmpa b,x end of month? - bls UpdDay ..no, update the day - cmpb #2 yes, is it Feb? - bne NoLeap ..no, ok - ldb <D.Year else get year - andb #$03 check for leap year: good until 2099 - cmpd #$1D00 29th on leap year? - beq UpdDay ..yes, skip it -NoLeap ldd <D.Year else month+1 - incb month+1 - cmpb #13 end of year? - blo UpdMonth ..no - inca year+1 - ldb #$01 set month to jan -UpdMonth std <D.Year save year, month - lda #$01 day=1st -UpdDay clrb hour=midnite -UpdHour std <D.Day save day,hour - clra minute=00 -UpdMin clrb seconds=00 - std <D.Min save min,secs -UpdTExit rts - ENDC - -months fcb 31,28,31,30,31,30,31,31,30,31,30,31 Days in each month - *------------------------------------------------------------ * @@ -906,142 +412,12 @@ sta <D.Tick * -* No RTC, just end (Also for SmartWatch, temporarily) -* - IFNE RTCSoft+RTCSmart+RTCDriveWire - rts - ENDC - -* -* Set Eliminator RTC from D.Time -* - IFNE RTCElim - pshs cc save interrupt status - orcc #IntMasks disable IRQs - ldx M$Mem,pcr get RTC base address from fake memory requirement - ldy #D.Time point [Y] to time variables in DP - ldd #$0B*256+RTC.Stop - bsr UpdatCk0 stop clock before setting it - ldb #RTC.Sped - bsr UpdatCk0 set crystal speed, output rate - bsr UpdatClk go set year - bsr UpdatClk go set month - bsr UpdatClk go set day of month - bsr UpdatCk0 go set day of week (value doesn't matter) - bsr UpdatCk0 go set hours alarm (value doesn't matter) - bsr UpdatClk go set hour - bsr UpdatCk0 go set minutes alarm (value doesn't matter) - bsr UpdatClk go set minute - bsr UpdatCk0 go set seconds alarm (value doesn't matter) - bsr UpdatClk go set second - ldd #$0B*256+RTC.Strt - bsr UpdatCk0 go start clock - puls cc Recover IRQ status - clrb - rts - -UpdatClk ldb ,y+ get data from D.Time variables in DP -UpdatCk0 std ,x generate address strobe, save data - deca set [A] to next register down - rts - ENDC - -* -* Set Disto 2-in-1 RTC from Time variables -* - IFNE RTCDsto2 - pshs a,cc - lbsr RTCPre Initialize - - bsr SetVal Set Year - bsr SetVal Set Month - bsr SetVal Set Day - ldd #$0805 $08 in A, $05 in B - bsr SetVal1 Set Hour (OR value in A ($08) with hour) - bsr SetVal Set Minute - bsr SetVal Set Second - - lbra RTCPost Clean up + return +* Call SetTime entry point in Clock2 + ldx <D.Clock2 get entry point to Clock2 + jsr $06,x else call GetTime entry point -SetVal clra -SetVal1 stb 2,x Set Clock address - decb - pshs b - ldb ,y+ Get current value -DvLoop subb #10 Get Tens digit in A, ones digit in B - bcs DvDone - inca - bra DvLoop -DvDone addb #10 - sta ,x Store tens digit - tfr b,a - puls b Get back original clock address - stb 2,x - decb - sta ,x Store ones digit - rts - ENDC - -* -* Set Disto 4-in-1 RTC from Time variables -* - IFNE RTCDsto4 - pshs cc - orcc #IntMasks - - IFNE MPIFlag - ldb >MPI.Slct Save currently selected MPak slot - pshs b - andb #$F0 - orb >SlotSlct,pcr Get slot to select - stb >MPI.Slct Select MPak slot for clock - ENDC +NoSet rts - ldy #D.Time+6 - ldx M$Mem,pcr - clrb - bsr SetVal Set Second - bsr SetVal Set Minute - bsr SetVal Set Hour - bsr SetVal Set Day - bsr SetVal Set Month - bsr SetVal Set Year - - IFNE MPIFlag - puls b Restore old MPAK slot - stb >MPI.Slct - ENDC - - puls cc - clrb No error - rts - -SetVal clr ,-s Create variable for tens digit - lda ,-y Get current value -DvLoop suba #10 Get Tens digit on stack, ones digit in A - bcs DvDone - inc ,s - bra DvLoop -DvDone adda #10 - stb 1,x Set Clock address - incb - sta ,x Store ones digit - stb 1,x - incb - puls a - sta ,x Store tens digit - rts - ENDC - -* -* Set B&B RTC from Time variables -* - IFNE RTCBB+RTCTc3 - pshs u,y,cc - leay SendBCD,pcr Send bytes of clock - lbra TfrTime - ENDC - *------------------------------------------------------------ * read/write RTC Non Volatile RAM (NVRAM) * @@ -1134,37 +510,8 @@ comb set Carry for error puls b,pc recover error code, return... ENDC -* -* Set Harris 1770 RTC from Time variables -* - IFNE RTCHarrs - pshs cc - orcc #IntMasks Disable interrupts - ldu M$Mem,pcr Get base address - ldy #D.Time Pointer to time in system map - - lda #%00000100 Init command register (Normal,Int. Disabled, - sta $11,u STOP clock,24-hour mode, 32kHz) - - lda ,y+ Get year - sta 6,u - lda ,y+ Get month - sta 4,u - lda ,y+ Get day - sta 5,u - lda ,y+ Get hour - sta 1,u - lda ,y+ Get minute - sta 2,u - lda ,y Get second - sta 3,u - - lda #%00001100 Init command register (Normal,Int. Disabled, - sta $11,u START clock,24-hour mode, 32kHz) - - puls cc,pc Re-enable interrupts - ENDC +Clock2 fcs "Clock2" *-------------------------------------------------- * @@ -1176,7 +523,24 @@ * service code above to handle future F$STime calls. * * -Init ldx #PIA0Base point to PIA0 +Init ldx <D.Proc save user proc + pshs x + ldx <D.SysPrc make sys for link + stx <D.Proc + + leax <Clock2,pcr + lda #Systm+Objct + os9 F$Link + +* And here, we restore the original D.Proc value + puls x + stx <D.Proc restore user proc + + bcc LinkOk + lda #E$MNF + jmp <D.Crash +LinkOk sty <D.Clock2 save entry point +InitCont ldx #PIA0Base point to PIA0 clra no error for return... pshs cc save IRQ enable status (and Carry clear) orcc #IntMasks stop interrupts @@ -1216,20 +580,10 @@ sta <D.IRQER save shadow register sta >IRQEnR enable GIME VBORD IRQs -* -* RTC-specific initializations here -* - IFNE RTCDsto4 - ldx M$Mem,pcr - ldd #$010F Set mode for RTC chip - stb 1,x - sta ,x - ldd #$0504 - sta ,x - stb ,x - ENDC - - puls cc,pc recover IRQ enable status and return +* Call Clock2 init routine + ldy <D.Clock2 get entry point to Clock2 + jsr ,y call init entry point of Clock2 +InitRts puls cc,pc recover IRQ enable status and return emod len equ *
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/level2/modules/clock2.asm Tue Aug 19 04:06:04 2003 +0000 @@ -0,0 +1,732 @@ +******************************************************************** +* Clock2 - Real-Time Clock Subroutines +* +* $Id$ +* +* Edt/Rev YYYY/MM/DD Modified by +* Comment +* ------------------------------------------------------------------ +* 1 2003/08/18 Boisy G. Pitre +* Stripped from clock.asm in order to modularize clocks. + + nam Clock2 + ttl Real-Time Clock Subroutines + + IFP1 + use defsfile + ENDC + +* +* Setup for specific RTC chip +* + IFNE RTCDriveWire +RTC.Base equ $0000 + ENDC + + IFNE RTCElim +RTC.Sped equ $20 32.768 KHz, rate=0 +RTC.Strt equ $06 binary, 24 Hour, DST disabled +RTC.Stop equ $86 bit 7 set stops clock to allow setting time +RTC.Base equ $FF72 I don't know base for this chip. + ENDC + + IFNE RTCDsto2+RTCDsto4 +RTC.Base equ $FF50 Base address of clock + ENDC + + IFNE RTCBB+RTCTc3 + IFNE RTCBB +RTC.Base equ $FF5C In SCS* Decode + ELSE +RTC.Base equ $FF7C Fully decoded RTC + ENDC +RTC.Zero equ -4 Send zero bit by writing this offset +RTC.One equ -3 Send one bit by writing this offset +RTC.Read equ 0 Read data from this offset + ENDC + + IFNE RTCSmart +RTC.Base equ $4004 We map the clock into this addr +RTC.Zero equ -4 Send zero bit by writing this offset +RTC.One equ -3 Send one bit by writing this offset +RTC.Read equ 0 Read data from this offset + ENDC + + IFNE RTCHarrs +RTC.Base equ $FF60 Base address for clock + ENDC + + IFNE RTCSoft +RTC.Base equ 0 Have to have one defined. + ENDC + +*------------------------------------------------------------ +* +* Start of module +* + mod len,name,Systm+Objct,ReEnt+0,JmpTable,RTC.Base + +name fcs "Clock2" + fcb 1 + + IFNE MPIFlag +SlotSlct fcb MPI.Slot-1 Slot constant for MPI select code + ENDC + +* Jump table for RTC +* +* Entry points: +* - Init +* - SetTime +* - GetTime +JmpTable + lbra Init + bra GetTime + nop + lbra SetTime + +* +* GetTime Subroutine +* +* This subroutine is called by the main clock module. +* + +* +* Eliminator time update (lacks MPI slot select ability) +* +GetTime equ * + IFNE RTCElim + ldx M$Mem,pcr get RTC base address from fake memory requirement + ldb #$0A UIP status register address + stb ,x generate address strobe + lda 1,x get UIP status + bpl NoUIP Update In Progress, go shift next RTC read + lda #TkPerSec/2 set up next RTC read attempt in 1/2 second + sta <D.Tick save tick + bra UpdTExit and return + +NoUIP decb year register address + stb ,x generate address strobe + lda 1,x get year + sta <D.Year + decb month register address + stb ,x + lda 1,x + sta <D.Month + decb day of month register address + stb ,x + lda 1,x + sta <D.Day + ldb #4 hour register address + stb ,x + lda 1,x + sta <D.Hour + ldb #2 minute register address + stb ,x + lda 1,x + sta <D.Min + clrb second register address + stb ,x + lda 1,x +SaveSec sta <D.Sec +UpdTExit rts + ENDC + +* +* Disto 2-in-1 RTC time update +* + IFNE RTCDsto2 + pshs a,cc Save old interrupt status and mask IRQs + bsr RTCPre + + bsr GetVal Get Year + bsr GetVal Get Month + bsr GetVal Get Day + decb ldb #5 + stb 2,x + decb + lda ,x + anda #3 + bsr GetVal1 Get Hour + bsr GetVal Get Minute + bsr GetVal Get Second + +RTCPost clr >$FFD9 2 MHz (Really should check $A0 first) + puls cc,b + + IFNE MPIFlag + stb >MPI.Slct Restore saved "currently" selected MPak slot + ENDC + + clrb + rts + +RTCPre orcc #IntMasks + + IFNE MPIFlag + ldb >MPI.Slct Save currently selected MPak slot on stack + stb 3,s + andb #$F0 + orb >SlotSlct,pcr Get slot to select + stb >MPI.Slct Select MPak slot for clock + ENDC + + ldy #D.Time + ldx M$Mem,pcr + clr 1,x + ldb #12 + clr >$FFD8 1 MHz + rts + +GetVal stb 2,x + decb + lda ,x read tens digit from clock + anda #$0f +GetVal1 pshs b save b + ldb #10 + mul multiply by 10 to get value + stb ,y save 10s value + puls b set up clock for ones digit + stb 2,x + decb + lda ,x read ones digit from clock + anda #$0f + adda ,y add ones + tens + sta ,y+ store clock value into time packet + rts + + ENDC + +* +* Disto 4-in-1 RTC time update +* + IFNE RTCDsto4 + IFNE MPIFlag + pshs cc Save old interrupt status and mask IRQs + orcc #IntMasks + ldb >MPI.Slct Save currently selected MPak slot on stack + pshs b + andb #$F0 + orb >SlotSlct,pcr Select MPak slot for clock + stb >MPI.Slct + ENDC + + ldx M$Mem,pcr + ldy #D.Time Start with seconds + + ldb #11 + bsr GetVal Get Year + bsr GetVal Get Month + bsr GetVal Get Day + lda #3 Mask tens digit of hour to remove AM/PM bit + bsr GetVal1 Get Hour + bsr GetVal Get Minute + bsr GetVal Get Second + + IFNE MPIFlag + puls b Restore saved "currently" selected MPak slot + stb >MPI.Slct + puls cc,pc Restore previous IRQ status + ELSE + rts No MPI, don't need to mess with slot, CC + ENDC + +GetVal lda #$0f Mask to apply to tens digit +GetVal1 stb 1,x + decb + anda ,x read ones digit from clock + pshs b save b + ldb #10 + mul multiply by 10 to get value + stb ,y Add to ones digit + puls b + stb 1,x + decb + lda ,x read tens digit from clock and mask it + anda #$0f + adda ,y + sta ,y+ + rts + + ENDC + + +* +* Update time from DriveWire +* + IFNE RTCDriveWire + + bra DoDW + + use bbwrite.asm + +DoDW pshs y,x,cc + lda #'# Time packet + orcc #IntMasks Disable interrupts + lbsr SerWrite + bsr SerRead Read year byte + bcs UpdLeave + sta <D.Year + bsr SerRead Read month byte + bcs UpdLeave + sta <D.Month + bsr SerRead Read day byte + bcs UpdLeave + sta <D.Day + bsr SerRead Read hour byte + bcs UpdLeave + sta <D.Hour + bsr SerRead Read minute byte + bcs UpdLeave + sta <D.Min + bsr SerRead Read second byte + bcs UpdLeave + sta <D.Sec + bsr SerRead Read day of week (0-6) byte +UpdLeave puls cc,x,y,pc + + use bbread.asm + + ENDC + +* +* Update time from B&B RTC +* + IFNE RTCBB+RTCTc3 + pshs u,y,cc + leay ReadBCD,pcr Read bytes of clock + +TfrTime orcc #IntMasks turn off interrupts + ldu M$Mem,pcr Get base address + + IFNE MPIFlag + ldb >MPI.Slct Select slot + pshs b + andb #$F0 + orb SlotSlct,pcr + stb >MPI.Slct + ENDC + + lbsr SendMsg Initialize clock + ldx #D.Sec + ldb #8 Tfr 8 bytes + +tfrloop jsr ,y Tfr 1 byte + + bitb #$03 + beq skipstuf Skip over day-of-week, etc. + leax -1,x +skipstuf decb + bne tfrloop + + IFNE MPIFlag + puls b + stb >MPI.Slct restore MPAK slot + ENDC + + puls u,y,cc,pc + +ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C +* Enable clock with message $C53AA35CC53AA35C +SendMsg lda RTC.Read,u Send Initialization message to clock + leax <ClkMsg,pcr + ldb #8 +msgloop lda ,x+ + bsr SendByte + decb + bne msgloop + rts + +SendBCD pshs b Send byte to clock, first converting to BCD + bitb #$03 + bne BCDskip Send zero for day-of-week, etc. + lda #0 + bra SndBCDGo +BCDskip lda ,x +SndBCDGo tfr a,b + bra binenter +binloop adda #6 +binenter subb #10 + bhs binloop + puls b +SendByte coma Send one byte to clock + rora + bcc sendone +sendzero tst RTC.Zero,u + lsra + bcc sendone + bne sendzero + rts +sendone tst RTC.One,u + lsra + bcc sendone + bne sendzero + rts + + +ReadBCD pshs b + ldb #$80 High bit will rotate out after we read 8 bits +readbit lda RTC.Read,u Read a bit + lsra + rorb Shift it into B + bcc readbit Stop when marker bit appears + tfr b,a + bra BCDEnter Convert BCD number to Binary +BCDLoop subb #6 by subtracting 6 for each $10 +BCDEnter suba #$10 + bhs BCDLoop + stb ,x + puls b,pc + + ENDC + + +* +* Update time from Smartwatch RTC +* + IFNE RTCSmart + pshs cc + orcc #IntMasks Disable interrupts + lda >MPI.Slct Get MPI slot + ldb <$90 Get GIME shadow of $FF90 + pshs b,a + anda #$F0 + ora >SlotSlct,pcr Get new slot to select + anda #$03 *** TEST *** + sta >MPI.Slct And select it + andb #$FC + stb >$FF90 ROM mapping = 16k internal, 16k external + ldb >$FFA2 Read GIME for $4000-$5fff + pshs b + lda #$3E + sta >$FFA2 Put block $3E at $4000-$5fff + clr >$FFDE Map RAM/ROM, to map in external ROM + lbsr SendMsg Initialize clock + ldx #D.Sec Start with seconds + lda #$08 + sta ,-s Set up loop counter = 8 +L021E ldb #$08 +L0220 lda >RTC.Read+RTC.Base Read one bit + lsra + ror ,x Put bit into time + decb End of bit loop + bne L0220 + lda ,s Check loop counter + cmpa #$08 + beq L023D Fill "seconds" twice (ignore 1st value) + cmpa #$04 + bne L0239 + ldb ,x Save 4th value read at $34 (day of week?) + stb $0A,x + bra L023D And overwrite "day" with day +L0239 leax -$01,x Go to next time to read + bsr BCD2Dec Convert 1,x from BCD to decimal +L023D dec ,s + bne L021E End of loop for reading time + leas $01,s Done with loop counter + clr >$FFDF Map all RAM + puls b + stb >$FFA2 Put back original memory block + puls b,a + sta >MPI.Slct + stb >$FF90 Restore original ROM mapping + puls cc,pc Re-enable interrupts + +* Convert BCD to a normal number + +BCD2Dec lda $01,x + clrb +B2DLoop cmpa #$10 + bcs B2DDone + suba #$10 + addb #$0A + bra B2DLoop +B2DDone pshs a + addb ,s+ + stb $01,x + rts + +ClkMsg fcb $C5,$3A,$A3,$5C,$C5,$3A,$A3,$5C + +* Send above "string" to smartwatch, one bit at a time + +SendMsg leax <ClkMsg,pcr + lda >RTC.Read+RTC.Base Tell clock we're going to start??? + lda #$08 + sta ,-s Store counter = 8 +L006B ldb #$08 Start of outer loop, 8 bytes to send + lda ,x+ Get byte to send +L006F lsra Start of inner loop, 8 bits to send + bcs L0077 + tst >RTC.Zero+RTC.Base Send a "zero" bit + bra L007A +L0077 tst >RTC.One+RTC.Base Send a "one" bit +L007A decb + bne L006F End of inner loop + dec ,s End of outer loop + bne L006B + puls pc,a + + ENDC + +* +* Update time from Harris RTC +* + IFNE RTCHarrs + pshs cc + orcc #IntMasks Disable interrupts + + ldu M$Mem,pcr Get base address + ldy #D.Time Pointer to time in system map + + lda #%00001100 Init command register (Normal,Int. Disabled, + sta $11,u Run,24-hour mode, 32kHz) + + lda ,u Read base address to set-up clock regs for read + lda 6,u Get year + sta ,y+ + lda 4,u Get month + sta ,y+ + lda 5,u Get day + sta ,y+ + lda 1,u Get hour + sta ,y+ + lda 2,u Get minute + sta ,y+ + lda 3,u Get second + sta ,y+ + + puls cc,pc Re-enable interrupts + ENDC +* +* +* Software time update +* +* + + IFNE RTCSoft + lda <D.Min grab current minute + inca minute+1 + cmpa #60 End of hour? + blo UpdMin no, Set start of minute + ldd <D.Day get day, hour + incb hour+1 + cmpb #24 End of Day? + blo UpdHour ..no + inca day+1 + leax months-1,pcr point to months table with offset-1: Jan = +1 + ldb <D.Month this month + cmpa b,x end of month? + bls UpdDay ..no, update the day + cmpb #2 yes, is it Feb? + bne NoLeap ..no, ok + ldb <D.Year else get year + andb #$03 check for leap year: good until 2099 + cmpd #$1D00 29th on leap year? + beq UpdDay ..yes, skip it +NoLeap ldd <D.Year else month+1 + incb month+1 + cmpb #13 end of year? + blo UpdMonth ..no + inca year+1 + ldb #$01 set month to jan +UpdMonth std <D.Year save year, month + lda #$01 day=1st +UpdDay clrb hour=midnite +UpdHour std <D.Day save day,hour + clra minute=00 +UpdMin clrb seconds=00 + std <D.Min save min,secs +UpdTExit rts + ENDC + +months fcb 31,28,31,30,31,30,31,31,30,31,30,31 Days in each month + + +SetTime equ * +* +* Set Eliminator RTC from D.Time +* + IFNE RTCElim + pshs cc save interrupt status + orcc #IntMasks disable IRQs + ldx M$Mem,pcr get RTC base address from fake memory requirement + ldy #D.Time point [Y] to time variables in DP + ldd #$0B*256+RTC.Stop + bsr UpdatCk0 stop clock before setting it + ldb #RTC.Sped + bsr UpdatCk0 set crystal speed, output rate + bsr UpdatClk go set year + bsr UpdatClk go set month + bsr UpdatClk go set day of month + bsr UpdatCk0 go set day of week (value doesn't matter) + bsr UpdatCk0 go set hours alarm (value doesn't matter) + bsr UpdatClk go set hour + bsr UpdatCk0 go set minutes alarm (value doesn't matter) + bsr UpdatClk go set minute + bsr UpdatCk0 go set seconds alarm (value doesn't matter) + bsr UpdatClk go set second + ldd #$0B*256+RTC.Strt + bsr UpdatCk0 go start clock + puls cc Recover IRQ status + clrb + rts + +UpdatClk ldb ,y+ get data from D.Time variables in DP +UpdatCk0 std ,x generate address strobe, save data + deca set [A] to next register down + rts + ENDC + +* +* Set Disto 2-in-1 RTC from Time variables +* + IFNE RTCDsto2 + pshs a,cc + lbsr RTCPre Initialize + + bsr SetVal Set Year + bsr SetVal Set Month + bsr SetVal Set Day + ldd #$0805 $08 in A, $05 in B + bsr SetVal1 Set Hour (OR value in A ($08) with hour) + bsr SetVal Set Minute + bsr SetVal Set Second + + lbra RTCPost Clean up + return + +SetVal clra +SetVal1 stb 2,x Set Clock address + decb + pshs b + ldb ,y+ Get current value +DvLoop subb #10 Get Tens digit in A, ones digit in B + bcs DvDone + inca + bra DvLoop +DvDone addb #10 + sta ,x Store tens digit + tfr b,a + puls b Get back original clock address + stb 2,x + decb + sta ,x Store ones digit + rts + ENDC + +* +* Set Disto 4-in-1 RTC from Time variables +* + IFNE RTCDsto4 + pshs cc + orcc #IntMasks + + IFNE MPIFlag + ldb >MPI.Slct Save currently selected MPak slot + pshs b + andb #$F0 + orb >SlotSlct,pcr Get slot to select + stb >MPI.Slct Select MPak slot for clock + ENDC + + ldy #D.Time+6 + ldx M$Mem,pcr + clrb + bsr SetVal Set Second + bsr SetVal Set Minute + bsr SetVal Set Hour + bsr SetVal Set Day + bsr SetVal Set Month + bsr SetVal Set Year + + IFNE MPIFlag + puls b Restore old MPAK slot + stb >MPI.Slct + ENDC + + puls cc + clrb No error + rts + +SetVal clr ,-s Create variable for tens digit + lda ,-y Get current value +DvLoop suba #10 Get Tens digit on stack, ones digit in A + bcs DvDone + inc ,s + bra DvLoop +DvDone adda #10 + stb 1,x Set Clock address + incb + sta ,x Store ones digit + stb 1,x + incb + puls a + sta ,x Store tens digit + rts + ENDC + +* +* Set B&B RTC from Time variables +* + IFNE RTCBB+RTCTc3 + pshs u,y,cc + leay SendBCD,pcr Send bytes of clock + lbra TfrTime + ENDC + +* +* Set Harris 1770 RTC from Time variables +* + IFNE RTCHarrs + pshs cc + orcc #IntMasks Disable interrupts + + ldu M$Mem,pcr Get base address + ldy #D.Time Pointer to time in system map + + lda #%00000100 Init command register (Normal,Int. Disabled, + sta $11,u STOP clock,24-hour mode, 32kHz) + + lda ,y+ Get year + sta 6,u + lda ,y+ Get month + sta 4,u + lda ,y+ Get day + sta 5,u + lda ,y+ Get hour + sta 1,u + lda ,y+ Get minute + sta 2,u + lda ,y Get second + sta 3,u + + lda #%00001100 Init command register (Normal,Int. Disabled, + sta $11,u START clock,24-hour mode, 32kHz) + + puls cc,pc Re-enable interrupts + ENDC + + +* +* RTC-specific initializations here +* +Init equ * + IFNE RTCDsto4 + ldx M$Mem,pcr + ldd #$010F Set mode for RTC chip + stb 1,x + sta ,x + ldd #$0504 + sta ,x + stb ,x + ENDC + + rts + +Term equ * + rts + + + emod +len equ * + end
--- a/level2/modules/makefile Mon Aug 18 23:09:22 2003 +0000 +++ b/level2/modules/makefile Tue Aug 19 04:06:04 2003 +0000 @@ -21,8 +21,9 @@ BOOTTRACK = rel_32 rel_40 rel_80 $(BOOTERS) os9p1 KERNEL = os9p2 os9p3_perr os9p4_regdump SYSMODS = ioman init cc3go_h0 cc3go_dd -CLOCKS = clock_elim clock_disto2 clock_disto4 clock_bnb \ - clock_smart clock_harris clock_tc3 clock_soft +CLOCKS = clock_60hz clock_50hz \ + clock2_elim clock2_disto2 clock2_disto4 clock2_bnb \ + clock2_smart clock2_harris clock2_tc3 clock2_soft RBF = rbf.mn \ cc3disk.dr cc3hdisk.dr rammer.dr \ @@ -179,30 +180,60 @@ $(AS) $(AFLAGS) $(ASOUT)$@ $< # Clocks +clock_60hz: clock.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< -aPwrLnFrq=60 + +clock_50hz: clock.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< -aTkPerSec=50 + clock_elim: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKELIM) +clock2_elim: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKELIM) + clock_disto2: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKDISTO2) +clock2_disto2: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKDISTO2) + clock_disto4: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKDISTO4) +clock2_disto4: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKDISTO4) + clock_bnb: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKBNB) +clock2_bnb: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKBNB) + clock_smart: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKSMART) +clock2_smart: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKSMART) + clock_harris: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKHARRIS) +clock2_harris: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKHARRIS) + clock_tc3: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKTC3) +clock2_tc3: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKTC3) + clock_soft: clock.asm $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKSOFT) +clock2_soft: clock2.asm + $(AS) $(AFLAGS) $(ASOUT)$@ $< $(CLOCKSOFT) + clean: $(CD) KERNEL; make $@ $(RM) $(ALLOBJS)