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annotate test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll @ 120:1172e4bd9c6f

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update 4.0.0
author mir3636
date Fri, 25 Nov 2016 19:14:25 +0900
parents 54457678186b
children 803732b1fca8
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1 ; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s -check-prefix=CYCLONE --check-prefix=ALL
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2 ; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=kryo < %s | FileCheck %s -check-prefix=KRYO --check-prefix=ALL
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3
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4 ; rdar://11481771
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5 ; rdar://13713797
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6
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7 define void @t1() nounwind ssp {
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8 entry:
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9 ; ALL-LABEL: t1:
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10 ; ALL-NOT: fmov
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11 ; CYCLONE: movi.2d v0, #0000000000000000
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12 ; CYCLONE: movi.2d v1, #0000000000000000
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13 ; CYCLONE: movi.2d v2, #0000000000000000
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14 ; CYCLONE: movi.2d v3, #0000000000000000
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15 ; KRYO: movi v0.2d, #0000000000000000
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16 ; KRYO: movi v1.2d, #0000000000000000
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17 ; KRYO: movi v2.2d, #0000000000000000
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18 ; KRYO: movi v3.2d, #0000000000000000
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19 tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
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20 ret void
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21 }
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22
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23 define void @t2() nounwind ssp {
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24 entry:
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25 ; ALL-LABEL: t2:
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26 ; ALL-NOT: mov w0, wzr
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27 ; ALL: mov w0, #0
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28 ; ALL: mov w1, #0
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29 tail call void @bari(i32 0, i32 0) nounwind
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30 ret void
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31 }
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32
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33 define void @t3() nounwind ssp {
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34 entry:
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35 ; ALL-LABEL: t3:
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36 ; ALL-NOT: mov x0, xzr
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37 ; ALL: mov x0, #0
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38 ; ALL: mov x1, #0
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39 tail call void @barl(i64 0, i64 0) nounwind
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40 ret void
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41 }
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42
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43 define void @t4() nounwind ssp {
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44 ; ALL-LABEL: t4:
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45 ; ALL-NOT: fmov
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46 ; CYCLONE: movi.2d v0, #0000000000000000
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47 ; CYCLONE: movi.2d v1, #0000000000000000
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48 ; KRYO: movi v0.2d, #0000000000000000
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49 ; KRYO: movi v1.2d, #0000000000000000
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50 tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
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51 ret void
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52 }
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53
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54 declare void @bar(double, double, double, double)
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55 declare void @bari(i32, i32)
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56 declare void @barl(i64, i64)
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57 declare void @barf(float, float)
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58
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59 ; We used to produce spills+reloads for a Q register with zero cycle zeroing
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60 ; enabled.
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61 ; ALL-LABEL: foo:
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62 ; ALL-NOT: str {{q[0-9]+}}
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63 ; ALL-NOT: ldr {{q[0-9]+}}
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64 define double @foo(i32 %n) {
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65 entry:
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66 br label %for.body
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67
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68 for.body:
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69 %phi0 = phi double [ 1.0, %entry ], [ %v0, %for.body ]
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70 %i.076 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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71 %conv21 = sitofp i32 %i.076 to double
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72 %call = tail call fast double @sin(double %conv21)
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73 %cmp.i = fcmp fast olt double %phi0, %call
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74 %v0 = select i1 %cmp.i, double %call, double %phi0
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75 %inc = add nuw nsw i32 %i.076, 1
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76 %cmp = icmp slt i32 %inc, %n
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77 br i1 %cmp, label %for.body, label %for.end
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78
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79 for.end:
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80 ret double %v0
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81 }
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82
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83 declare double @sin(double)