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annotate lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.cpp @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children afa8332a0e37
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1 //===-- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax ===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9
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10 #include "SystemZInstPrinter.h"
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11 #include "llvm/MC/MCExpr.h"
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12 #include "llvm/MC/MCInstrInfo.h"
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13 #include "llvm/Support/raw_ostream.h"
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14
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15 using namespace llvm;
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16
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17 #define DEBUG_TYPE "asm-printer"
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18
0
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19 #include "SystemZGenAsmWriter.inc"
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20
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21 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
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22 unsigned Index, raw_ostream &O) {
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23 O << Disp;
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24 if (Base) {
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25 O << '(';
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26 if (Index)
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27 O << '%' << getRegisterName(Index) << ',';
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28 O << '%' << getRegisterName(Base) << ')';
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29 } else
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30 assert(!Index && "Shouldn't have an index without a base");
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31 }
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32
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33 void SystemZInstPrinter::printOperand(const MCOperand &MO, raw_ostream &O) {
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34 if (MO.isReg())
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35 O << '%' << getRegisterName(MO.getReg());
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36 else if (MO.isImm())
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37 O << MO.getImm();
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38 else if (MO.isExpr())
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39 O << *MO.getExpr();
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40 else
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41 llvm_unreachable("Invalid operand");
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42 }
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43
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44 void SystemZInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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45 StringRef Annot) {
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46 printInstruction(MI, O);
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47 printAnnotation(O, Annot);
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48 }
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49
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50 void SystemZInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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51 O << '%' << getRegisterName(RegNo);
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52 }
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53
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54 void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum,
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55 raw_ostream &O) {
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56 int64_t Value = MI->getOperand(OpNum).getImm();
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57 assert(isUInt<4>(Value) && "Invalid u4imm argument");
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58 O << Value;
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59 }
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60
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61 void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum,
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62 raw_ostream &O) {
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63 int64_t Value = MI->getOperand(OpNum).getImm();
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64 assert(isUInt<6>(Value) && "Invalid u6imm argument");
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65 O << Value;
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66 }
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67
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68 void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum,
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69 raw_ostream &O) {
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70 int64_t Value = MI->getOperand(OpNum).getImm();
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71 assert(isInt<8>(Value) && "Invalid s8imm argument");
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72 O << Value;
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73 }
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74
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75 void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum,
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76 raw_ostream &O) {
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77 int64_t Value = MI->getOperand(OpNum).getImm();
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78 assert(isUInt<8>(Value) && "Invalid u8imm argument");
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79 O << Value;
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80 }
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81
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82 void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum,
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83 raw_ostream &O) {
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84 int64_t Value = MI->getOperand(OpNum).getImm();
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85 assert(isInt<16>(Value) && "Invalid s16imm argument");
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86 O << Value;
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87 }
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88
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89 void SystemZInstPrinter::printU16ImmOperand(const MCInst *MI, int OpNum,
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90 raw_ostream &O) {
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91 int64_t Value = MI->getOperand(OpNum).getImm();
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92 assert(isUInt<16>(Value) && "Invalid u16imm argument");
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93 O << Value;
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94 }
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95
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96 void SystemZInstPrinter::printS32ImmOperand(const MCInst *MI, int OpNum,
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97 raw_ostream &O) {
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98 int64_t Value = MI->getOperand(OpNum).getImm();
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99 assert(isInt<32>(Value) && "Invalid s32imm argument");
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100 O << Value;
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101 }
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102
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103 void SystemZInstPrinter::printU32ImmOperand(const MCInst *MI, int OpNum,
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104 raw_ostream &O) {
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105 int64_t Value = MI->getOperand(OpNum).getImm();
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106 assert(isUInt<32>(Value) && "Invalid u32imm argument");
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107 O << Value;
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108 }
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109
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110 void SystemZInstPrinter::printAccessRegOperand(const MCInst *MI, int OpNum,
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111 raw_ostream &O) {
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112 uint64_t Value = MI->getOperand(OpNum).getImm();
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113 assert(Value < 16 && "Invalid access register number");
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114 O << "%a" << (unsigned int)Value;
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115 }
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116
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117 void SystemZInstPrinter::printPCRelOperand(const MCInst *MI, int OpNum,
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118 raw_ostream &O) {
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119 const MCOperand &MO = MI->getOperand(OpNum);
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120 if (MO.isImm()) {
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121 O << "0x";
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122 O.write_hex(MO.getImm());
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123 } else
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124 O << *MO.getExpr();
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125 }
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126
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127 void SystemZInstPrinter::printOperand(const MCInst *MI, int OpNum,
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128 raw_ostream &O) {
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129 printOperand(MI->getOperand(OpNum), O);
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130 }
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131
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132 void SystemZInstPrinter::printBDAddrOperand(const MCInst *MI, int OpNum,
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133 raw_ostream &O) {
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134 printAddress(MI->getOperand(OpNum).getReg(),
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135 MI->getOperand(OpNum + 1).getImm(), 0, O);
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136 }
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137
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138 void SystemZInstPrinter::printBDXAddrOperand(const MCInst *MI, int OpNum,
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139 raw_ostream &O) {
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140 printAddress(MI->getOperand(OpNum).getReg(),
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141 MI->getOperand(OpNum + 1).getImm(),
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142 MI->getOperand(OpNum + 2).getReg(), O);
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143 }
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144
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145 void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
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146 raw_ostream &O) {
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147 unsigned Base = MI->getOperand(OpNum).getReg();
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148 uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
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149 uint64_t Length = MI->getOperand(OpNum + 2).getImm();
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150 O << Disp << '(' << Length;
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151 if (Base)
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152 O << ",%" << getRegisterName(Base);
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153 O << ')';
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154 }
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155
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156 void SystemZInstPrinter::printCond4Operand(const MCInst *MI, int OpNum,
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157 raw_ostream &O) {
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158 static const char *const CondNames[] = {
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159 "o", "h", "nle", "l", "nhe", "lh", "ne",
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160 "e", "nlh", "he", "nl", "le", "nh", "no"
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161 };
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162 uint64_t Imm = MI->getOperand(OpNum).getImm();
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163 assert(Imm > 0 && Imm < 15 && "Invalid condition");
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164 O << CondNames[Imm - 1];
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165 }