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annotate test/CodeGen/AArch64/arm64-clrsb.ll @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
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children 1172e4bd9c6f
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=arm64 | FileCheck %s
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2
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3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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4 target triple = "arm64-apple-ios7.0.0"
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5
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6 ; Function Attrs: nounwind readnone
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7 declare i32 @llvm.ctlz.i32(i32, i1) #0
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8 declare i64 @llvm.ctlz.i64(i64, i1) #1
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9
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10 ; Function Attrs: nounwind ssp
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11 define i32 @clrsb32(i32 %x) #2 {
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12 entry:
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13 %shr = ashr i32 %x, 31
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14 %xor = xor i32 %shr, %x
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15 %mul = shl i32 %xor, 1
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16 %add = or i32 %mul, 1
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17 %0 = tail call i32 @llvm.ctlz.i32(i32 %add, i1 false)
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18
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19 ret i32 %0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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20 ; CHECK-LABEL: clrsb32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 ; CHECK: cls [[TEMP:w[0-9]+]], [[TEMP]]
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22 }
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23
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24 ; Function Attrs: nounwind ssp
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25 define i64 @clrsb64(i64 %x) #3 {
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26 entry:
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27 %shr = ashr i64 %x, 63
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28 %xor = xor i64 %shr, %x
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29 %mul = shl nsw i64 %xor, 1
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30 %add = or i64 %mul, 1
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31 %0 = tail call i64 @llvm.ctlz.i64(i64 %add, i1 false)
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32
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33 ret i64 %0
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34 ; CHECK-LABEL: clrsb64
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35 ; CHECK: cls [[TEMP:x[0-9]+]], [[TEMP]]
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36 }