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annotate test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
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children 60c9769439b8
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 ; DAGCombine to transform a conversion of an extract_vector_elt to an
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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4 ; extract_vector_elt of a conversion, which saves a round trip of copies
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 ; of the value to a GPR and back to and FPR.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 ; rdar://11855286
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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7 define double @foo0(<2 x i64> %a) nounwind {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 ; CHECK: scvtf.2d [[REG:v[0-9]+]], v0, #9
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 ; CHECK-NEXT: ins.d v0[0], [[REG]][1]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 %vecext = extractelement <2 x i64> %a, i32 1
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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11 %fcvt_n = tail call double @llvm.aarch64.neon.vcvtfxs2fp.f64.i64(i64 %vecext, i32 9)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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12 ret double %fcvt_n
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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13 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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14
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 declare double @llvm.aarch64.neon.vcvtfxs2fp.f64.i64(i64, i32) nounwind readnone