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annotate test/CodeGen/Mips/2013-11-18-fp64-const0.ll @ 77:54457678186b

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children
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95c75e76d11b LLVM 3.4
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1 ; RUN: llc -march=mips -mattr=-fp64 < %s | FileCheck -check-prefix=CHECK-FP32 %s
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2 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck -check-prefix=CHECK-FP64 %s
0
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4 ; This test case is a simplified version of an llvm-stress generated test with
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5 ; seed=3718491962.
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6 ; It originally failed on MIPS32 with FP64 with the following error:
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7 ; LLVM ERROR: ran out of registers during register allocation
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8 ; This was caused by impossible register class restrictions caused by the use
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9 ; of BuildPairF64 instead of BuildPairF64_64.
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11 define void @autogen_SD3718491962() {
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12 BB:
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13 ; CHECK-FP32: mtc1 $zero, $f{{[0-3]*[02468]}}
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14 ; CHECK-FP32: mtc1 $zero, $f{{[0-3]*[13579]}}
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15
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16 ; CHECK-FP64: mtc1 $zero, $f{{[0-9]+}}
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17 ; CHECK-FP64-NOT: mtc1 $zero,
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18 ; FIXME: A redundant mthc1 is currently emitted. Add a -NOT when it is
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19 ; eliminated
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21 %Cmp = fcmp ule double 0.000000e+00, undef
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22 %Cmp11 = fcmp ueq double 0xFDBD965CF1BB7FDA, undef
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23 br label %CF88
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25 CF88: ; preds = %CF86
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26 %Sl18 = select i1 %Cmp, i1 %Cmp11, i1 %Cmp
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27 br i1 %Sl18, label %CF88, label %CF85
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29 CF85: ; preds = %CF88
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30 ret void
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31 }