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annotate test/CodeGen/ARM/2007-05-09-tailmerge-2.ll @ 83:60c9769439b8

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LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents 95c75e76d11b
children afa8332a0e37
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1 ; RUN: llc < %s -march=arm | FileCheck %s
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2
0
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3 ; Check that calls to baz and quux are tail-merged.
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4 ; CHECK: bl _baz
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5 ; CHECK-NOT: bl _baz
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6 ; CHECK: bl _quux
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7 ; CHECK-NOT: bl _quux
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0
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9 ; PR1628
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10
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11 ; ModuleID = 'tail.c'
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12 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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13 target triple = "i686-apple-darwin8"
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14
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15 define i32 @f(i32 %i, i32 %q) {
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16 entry:
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17 %i_addr = alloca i32 ; <i32*> [#uses=2]
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18 %q_addr = alloca i32 ; <i32*> [#uses=2]
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19 %retval = alloca i32, align 4 ; <i32*> [#uses=1]
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20 store i32 %i, i32* %i_addr
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21 store i32 %q, i32* %q_addr
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22 %tmp = load i32* %i_addr ; <i32> [#uses=1]
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23 %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
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24 %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
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25 %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
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26 br i1 %toBool, label %cond_true, label %cond_false
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27
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28 cond_true: ; preds = %entry
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29 %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
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30 %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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31 %tmp7 = load i32* %q_addr ; <i32> [#uses=1]
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32 %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
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33 %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
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34 %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
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35 br i1 %toBool10, label %cond_true11, label %cond_false15
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36
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37 cond_false: ; preds = %entry
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38 %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
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39 %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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40 %tmp27 = load i32* %q_addr ; <i32> [#uses=1]
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41 %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
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42 %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
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43 %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
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44 br i1 %toBool210, label %cond_true11, label %cond_false15
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45
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46 cond_true11: ; preds = %cond_next
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47 %tmp13 = call i32 (...)* @foo( ) ; <i32> [#uses=0]
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48 %tmp14 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
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49 br label %cond_next18
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50
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51 cond_false15: ; preds = %cond_next
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52 %tmp16 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
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53 %tmp17 = call i32 (...)* @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
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54 br label %cond_next18
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55
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56 cond_next18: ; preds = %cond_false15, %cond_true11
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57 %tmp19 = call i32 (...)* @bar( ) ; <i32> [#uses=0]
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58 br label %return
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59
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60 return: ; preds = %cond_next18
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61 %retval20 = load i32* %retval ; <i32> [#uses=1]
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62 ret i32 %retval20
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63 }
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64
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65 declare i32 @bar(...)
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66
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67 declare i32 @baz(...)
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68
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69 declare i32 @foo(...)
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70
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71 declare i32 @quux(...)