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annotate test/CodeGen/ARM/fast-isel-pic.ll @ 100:7d135dc70f03

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children
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95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
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1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
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2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARMv7
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parents: 95
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3 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -arm-force-fast-isel -relocation-model=pic -mtriple=thumbv7-none-linux-gnueabi | FileCheck %s --check-prefix=THUMB-ELF
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parents: 95
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4 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -arm-force-fast-isel -relocation-model=pic -mtriple=armv7-none-linux-gnueabi | FileCheck %s --check-prefix=ARMv7-ELF
0
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5
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6 @g = global i32 0, align 4
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7
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8 define i32 @LoadGV() {
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9 entry:
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10 ; THUMB: LoadGV
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11 ; THUMB: movw [[reg0:r[0-9]+]],
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12 ; THUMB: movt [[reg0]],
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13 ; THUMB: add [[reg0]], pc
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14 ; THUMB-ELF: LoadGV
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15 ; THUMB-ELF: ldr r[[reg0:[0-9]+]],
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parents: 95
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16 ; THUMB-ELF: add r[[reg0]], pc
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17 ; THUMB-ELF: ldr r[[reg0]], [r[[reg0]]]
0
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18 ; ARM: LoadGV
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19 ; ARM: ldr [[reg1:r[0-9]+]],
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20 ; ARM: add [[reg1]], pc, [[reg1]]
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21 ; ARMv7: LoadGV
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22 ; ARMv7: movw [[reg2:r[0-9]+]],
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23 ; ARMv7: movt [[reg2]],
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24 ; ARMv7: add [[reg2]], pc, [[reg2]]
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25 ; ARMv7-ELF: LoadGV
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26 ; ARMv7-ELF: ldr r[[reg2:[0-9]+]],
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27 ; ARMv7-ELF: .LPC
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28 ; ARMv7-ELF-NEXT: ldr r[[reg2]], [pc, r[[reg2]]]
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parents: 95
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29 ; ARMv7-ELF: ldr r[[reg2]], [r[[reg2]]]
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30 %tmp = load i32, i32* @g
0
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31 ret i32 %tmp
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32 }
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33
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34 @i = external global i32
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35
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36 define i32 @LoadIndirectSymbol() {
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37 entry:
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38 ; THUMB: LoadIndirectSymbol
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39 ; THUMB: movw r[[reg3:[0-9]+]],
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40 ; THUMB: movt r[[reg3]],
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41 ; THUMB: add r[[reg3]], pc
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42 ; THUMB: ldr r[[reg3]], [r[[reg3]]]
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43 ; THUMB-ELF: LoadIndirectSymbol
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44 ; THUMB-ELF: ldr r[[reg3:[0-9]+]],
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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45 ; THUMB-ELF: ldr r[[reg4:[0-9]+]], [r[[reg3]]]
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parents: 95
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46 ; THUMB-ELF: ldr r0, [r[[reg4]]]
0
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47 ; ARM: LoadIndirectSymbol
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48 ; ARM: ldr [[reg4:r[0-9]+]],
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49 ; ARM: ldr [[reg4]], [pc, [[reg4]]]
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50 ; ARMv7: LoadIndirectSymbol
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51 ; ARMv7: movw r[[reg5:[0-9]+]],
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52 ; ARMv7: movt r[[reg5]],
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53 ; ARMv7: add r[[reg5]], pc, r[[reg5]]
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54 ; ARMv7: ldr r[[reg5]], [r[[reg5]]]
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55 ; ARMv7-ELF: LoadIndirectSymbol
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56 ; ARMv7-ELF: ldr r[[reg5:[0-9]+]],
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57 ; ARMv7-ELF: .LPC
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58 ; ARMv7-ELF: ldr r[[reg6:[0-9]+]], [pc, r[[reg5]]]
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parents: 95
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59 ; ARMv7-ELF: ldr r0, [r[[reg5]]]
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parents: 0
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60 %tmp = load i32, i32* @i
0
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61 ret i32 %tmp
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62 }