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1 //===-- CoalesceBranches.cpp - Coalesce blocks with the same condition ---===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 ///
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10 /// \file
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11 /// Coalesce basic blocks guarded by the same branch condition into a single
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12 /// basic block.
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13 ///
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14 //===----------------------------------------------------------------------===//
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15
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16 #include "PPC.h"
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17 #include "llvm/ADT/BitVector.h"
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18 #include "llvm/ADT/Statistic.h"
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19 #include "llvm/CodeGen/MachineDominators.h"
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20 #include "llvm/CodeGen/MachineFunctionPass.h"
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21 #include "llvm/CodeGen/MachinePostDominators.h"
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22 #include "llvm/CodeGen/MachineRegisterInfo.h"
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23 #include "llvm/CodeGen/Passes.h"
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24 #include "llvm/Support/Debug.h"
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25 #include "llvm/Target/TargetFrameLowering.h"
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26 #include "llvm/Target/TargetInstrInfo.h"
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27 #include "llvm/Target/TargetSubtargetInfo.h"
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28
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29 using namespace llvm;
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30
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31 #define DEBUG_TYPE "ppc-branch-coalescing"
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32
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33 STATISTIC(NumBlocksCoalesced, "Number of blocks coalesced");
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34 STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged");
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35 STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced");
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36
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37 namespace llvm {
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38 void initializePPCBranchCoalescingPass(PassRegistry&);
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39 }
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40
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41 //===----------------------------------------------------------------------===//
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42 // PPCBranchCoalescing
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43 //===----------------------------------------------------------------------===//
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44 ///
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45 /// Improve scheduling by coalescing branches that depend on the same condition.
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46 /// This pass looks for blocks that are guarded by the same branch condition
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47 /// and attempts to merge the blocks together. Such opportunities arise from
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48 /// the expansion of select statements in the IR.
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49 ///
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50 /// This pass does not handle implicit operands on branch statements. In order
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51 /// to run on targets that use implicit operands, changes need to be made in the
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52 /// canCoalesceBranch and canMerge methods.
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53 ///
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54 /// Example: the following LLVM IR
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55 ///
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56 /// %test = icmp eq i32 %x 0
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57 /// %tmp1 = select i1 %test, double %a, double 2.000000e-03
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58 /// %tmp2 = select i1 %test, double %b, double 5.000000e-03
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59 ///
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60 /// expands to the following machine code:
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61 ///
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62 /// BB#0: derived from LLVM BB %entry
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63 /// Live Ins: %F1 %F3 %X6
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64 /// <SNIP1>
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65 /// %vreg0<def> = COPY %F1; F8RC:%vreg0
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66 /// %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4
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67 /// %vreg8<def> = LXSDX %ZERO8, %vreg7<kill>, %RM<imp-use>;
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68 /// mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7
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69 /// BCC 76, %vreg5, <BB#2>; CRRC:%vreg5
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70 /// Successors according to CFG: BB#1(?%) BB#2(?%)
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71 ///
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72 /// BB#1: derived from LLVM BB %entry
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73 /// Predecessors according to CFG: BB#0
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74 /// Successors according to CFG: BB#2(?%)
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75 ///
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76 /// BB#2: derived from LLVM BB %entry
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77 /// Predecessors according to CFG: BB#0 BB#1
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78 /// %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>;
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79 /// F8RC:%vreg9,%vreg8,%vreg0
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80 /// <SNIP2>
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81 /// BCC 76, %vreg5, <BB#4>; CRRC:%vreg5
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82 /// Successors according to CFG: BB#3(?%) BB#4(?%)
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83 ///
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84 /// BB#3: derived from LLVM BB %entry
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85 /// Predecessors according to CFG: BB#2
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86 /// Successors according to CFG: BB#4(?%)
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87 ///
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88 /// BB#4: derived from LLVM BB %entry
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89 /// Predecessors according to CFG: BB#2 BB#3
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90 /// %vreg13<def> = PHI %vreg12, <BB#3>, %vreg2, <BB#2>;
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91 /// F8RC:%vreg13,%vreg12,%vreg2
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92 /// <SNIP3>
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93 /// BLR8 %LR8<imp-use>, %RM<imp-use>, %F1<imp-use>
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94 ///
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95 /// When this pattern is detected, branch coalescing will try to collapse
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96 /// it by moving code in BB#2 to BB#0 and/or BB#4 and removing BB#3.
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97 ///
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98 /// If all conditions are meet, IR should collapse to:
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99 ///
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100 /// BB#0: derived from LLVM BB %entry
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101 /// Live Ins: %F1 %F3 %X6
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102 /// <SNIP1>
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103 /// %vreg0<def> = COPY %F1; F8RC:%vreg0
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104 /// %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4
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105 /// %vreg8<def> = LXSDX %ZERO8, %vreg7<kill>, %RM<imp-use>;
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106 /// mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7
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107 /// <SNIP2>
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108 /// BCC 76, %vreg5, <BB#4>; CRRC:%vreg5
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109 /// Successors according to CFG: BB#1(0x2aaaaaaa / 0x80000000 = 33.33%)
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110 /// BB#4(0x55555554 / 0x80000000 = 66.67%)
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111 ///
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112 /// BB#1: derived from LLVM BB %entry
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113 /// Predecessors according to CFG: BB#0
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114 /// Successors according to CFG: BB#4(0x40000000 / 0x80000000 = 50.00%)
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115 ///
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116 /// BB#4: derived from LLVM BB %entry
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117 /// Predecessors according to CFG: BB#0 BB#1
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118 /// %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>;
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119 /// F8RC:%vreg9,%vreg8,%vreg0
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120 /// %vreg13<def> = PHI %vreg12, <BB#1>, %vreg2, <BB#0>;
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121 /// F8RC:%vreg13,%vreg12,%vreg2
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122 /// <SNIP3>
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123 /// BLR8 %LR8<imp-use>, %RM<imp-use>, %F1<imp-use>
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124 ///
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125 /// Branch Coalescing does not split blocks, it moves everything in the same
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126 /// direction ensuring it does not break use/definition semantics.
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127 ///
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128 /// PHI nodes and its corresponding use instructions are moved to its successor
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129 /// block if there are no uses within the successor block PHI nodes. PHI
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130 /// node ordering cannot be assumed.
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131 ///
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132 /// Non-PHI can be moved up to the predecessor basic block or down to the
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133 /// successor basic block following any PHI instructions. Whether it moves
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134 /// up or down depends on whether the register(s) defined in the instructions
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135 /// are used in current block or in any PHI instructions at the beginning of
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136 /// the successor block.
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137
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138 namespace {
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139
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140 class PPCBranchCoalescing : public MachineFunctionPass {
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141 struct CoalescingCandidateInfo {
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142 MachineBasicBlock *BranchBlock; // Block containing the branch
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143 MachineBasicBlock *BranchTargetBlock; // Block branched to
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144 MachineBasicBlock *FallThroughBlock; // Fall-through if branch not taken
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145 SmallVector<MachineOperand, 4> Cond;
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146 bool MustMoveDown;
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147 bool MustMoveUp;
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148
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149 CoalescingCandidateInfo();
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150 void clear();
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151 };
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152
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153 MachineDominatorTree *MDT;
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154 MachinePostDominatorTree *MPDT;
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155 const TargetInstrInfo *TII;
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156 MachineRegisterInfo *MRI;
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157
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158 void initialize(MachineFunction &F);
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159 bool canCoalesceBranch(CoalescingCandidateInfo &Cand);
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160 bool identicalOperands(ArrayRef<MachineOperand> OperandList1,
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161 ArrayRef<MachineOperand> OperandList2) const;
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162 bool validateCandidates(CoalescingCandidateInfo &SourceRegion,
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163 CoalescingCandidateInfo &TargetRegion) const;
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164
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165 public:
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166 static char ID;
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167
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168 PPCBranchCoalescing() : MachineFunctionPass(ID) {
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169 initializePPCBranchCoalescingPass(*PassRegistry::getPassRegistry());
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170 }
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171
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172 void getAnalysisUsage(AnalysisUsage &AU) const override {
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173 AU.addRequired<MachineDominatorTree>();
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174 AU.addRequired<MachinePostDominatorTree>();
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175 MachineFunctionPass::getAnalysisUsage(AU);
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176 }
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177
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178 StringRef getPassName() const override { return "Branch Coalescing"; }
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179
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180 bool mergeCandidates(CoalescingCandidateInfo &SourceRegion,
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181 CoalescingCandidateInfo &TargetRegion);
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182 bool canMoveToBeginning(const MachineInstr &MI,
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183 const MachineBasicBlock &MBB) const;
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184 bool canMoveToEnd(const MachineInstr &MI,
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185 const MachineBasicBlock &MBB) const;
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186 bool canMerge(CoalescingCandidateInfo &SourceRegion,
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187 CoalescingCandidateInfo &TargetRegion) const;
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188 void moveAndUpdatePHIs(MachineBasicBlock *SourceRegionMBB,
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189 MachineBasicBlock *TargetRegionMBB);
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190 bool runOnMachineFunction(MachineFunction &MF) override;
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191 };
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192 } // End anonymous namespace.
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193
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194 char PPCBranchCoalescing::ID = 0;
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195 /// createPPCBranchCoalescingPass - returns an instance of the Branch Coalescing
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196 /// Pass
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197 FunctionPass *llvm::createPPCBranchCoalescingPass() {
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198 return new PPCBranchCoalescing();
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199 }
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200
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201 INITIALIZE_PASS_BEGIN(PPCBranchCoalescing, DEBUG_TYPE,
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202 "Branch Coalescing", false, false)
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203 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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204 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
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205 INITIALIZE_PASS_END(PPCBranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
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206 false, false)
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207
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208 PPCBranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
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209 : BranchBlock(nullptr), BranchTargetBlock(nullptr),
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210 FallThroughBlock(nullptr), MustMoveDown(false), MustMoveUp(false) {}
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211
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212 void PPCBranchCoalescing::CoalescingCandidateInfo::clear() {
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213 BranchBlock = nullptr;
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214 BranchTargetBlock = nullptr;
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215 FallThroughBlock = nullptr;
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216 Cond.clear();
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217 MustMoveDown = false;
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218 MustMoveUp = false;
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219 }
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220
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221 void PPCBranchCoalescing::initialize(MachineFunction &MF) {
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222 MDT = &getAnalysis<MachineDominatorTree>();
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223 MPDT = &getAnalysis<MachinePostDominatorTree>();
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224 TII = MF.getSubtarget().getInstrInfo();
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225 MRI = &MF.getRegInfo();
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226 }
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227
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228 ///
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229 /// Analyze the branch statement to determine if it can be coalesced. This
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230 /// method analyses the branch statement for the given candidate to determine
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231 /// if it can be coalesced. If the branch can be coalesced, then the
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232 /// BranchTargetBlock and the FallThroughBlock are recorded in the specified
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233 /// Candidate.
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234 ///
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235 ///\param[in,out] Cand The coalescing candidate to analyze
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236 ///\return true if and only if the branch can be coalesced, false otherwise
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237 ///
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238 bool PPCBranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) {
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239 DEBUG(dbgs() << "Determine if branch block " << Cand.BranchBlock->getNumber()
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240 << " can be coalesced:");
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241 MachineBasicBlock *FalseMBB = nullptr;
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242
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243 if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB,
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244 Cand.Cond)) {
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245 DEBUG(dbgs() << "TII unable to Analyze Branch - skip\n");
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246 return false;
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247 }
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248
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249 for (auto &I : Cand.BranchBlock->terminators()) {
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250 DEBUG(dbgs() << "Looking at terminator : " << I << "\n");
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251 if (!I.isBranch())
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252 continue;
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253
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254 // The analyzeBranch method does not include any implicit operands.
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255 // This is not an issue on PPC but must be handled on other targets.
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256 // For this pass to be made target-independent, the analyzeBranch API
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257 // need to be updated to support implicit operands and there would
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258 // need to be a way to verify that any implicit operands would not be
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259 // clobbered by merging blocks. This would include identifying the
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260 // implicit operands as well as the basic block they are defined in.
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261 // This could be done by changing the analyzeBranch API to have it also
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262 // record and return the implicit operands and the blocks where they are
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263 // defined. Alternatively, the BranchCoalescing code would need to be
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264 // extended to identify the implicit operands. The analysis in canMerge
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265 // must then be extended to prove that none of the implicit operands are
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266 // changed in the blocks that are combined during coalescing.
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267 if (I.getNumOperands() != I.getNumExplicitOperands()) {
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268 DEBUG(dbgs() << "Terminator contains implicit operands - skip : " << I
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269 << "\n");
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270 return false;
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271 }
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272 }
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273
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274 if (Cand.BranchBlock->isEHPad() || Cand.BranchBlock->hasEHPadSuccessor()) {
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275 DEBUG(dbgs() << "EH Pad - skip\n");
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276 return false;
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277 }
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278
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279 // For now only consider triangles (i.e, BranchTargetBlock is set,
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280 // FalseMBB is null, and BranchTargetBlock is a successor to BranchBlock)
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281 if (!Cand.BranchTargetBlock || FalseMBB ||
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282 !Cand.BranchBlock->isSuccessor(Cand.BranchTargetBlock)) {
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283 DEBUG(dbgs() << "Does not form a triangle - skip\n");
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284 return false;
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285 }
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286
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287 // Ensure there are only two successors
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288 if (Cand.BranchBlock->succ_size() != 2) {
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289 DEBUG(dbgs() << "Does not have 2 successors - skip\n");
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290 return false;
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291 }
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292
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293 // Sanity check - the block must be able to fall through
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294 assert(Cand.BranchBlock->canFallThrough() &&
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295 "Expecting the block to fall through!");
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296
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297 // We have already ensured there are exactly two successors to
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298 // BranchBlock and that BranchTargetBlock is a successor to BranchBlock.
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299 // Ensure the single fall though block is empty.
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300 MachineBasicBlock *Succ =
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301 (*Cand.BranchBlock->succ_begin() == Cand.BranchTargetBlock)
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302 ? *Cand.BranchBlock->succ_rbegin()
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303 : *Cand.BranchBlock->succ_begin();
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304
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305 assert(Succ && "Expecting a valid fall-through block\n");
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306
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307 if (!Succ->empty()) {
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308 DEBUG(dbgs() << "Fall-through block contains code -- skip\n");
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309 return false;
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310 }
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311
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312 if (!Succ->isSuccessor(Cand.BranchTargetBlock)) {
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313 DEBUG(dbgs()
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314 << "Successor of fall through block is not branch taken block\n");
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315 return false;
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316 }
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317
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318 Cand.FallThroughBlock = Succ;
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319 DEBUG(dbgs() << "Valid Candidate\n");
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320 return true;
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321 }
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322
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323 ///
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324 /// Determine if the two operand lists are identical
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325 ///
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326 /// \param[in] OpList1 operand list
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327 /// \param[in] OpList2 operand list
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328 /// \return true if and only if the operands lists are identical
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329 ///
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330 bool PPCBranchCoalescing::identicalOperands(
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331 ArrayRef<MachineOperand> OpList1, ArrayRef<MachineOperand> OpList2) const {
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332
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333 if (OpList1.size() != OpList2.size()) {
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334 DEBUG(dbgs() << "Operand list is different size\n");
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335 return false;
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336 }
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337
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338 for (unsigned i = 0; i < OpList1.size(); ++i) {
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339 const MachineOperand &Op1 = OpList1[i];
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340 const MachineOperand &Op2 = OpList2[i];
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341
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342 DEBUG(dbgs() << "Op1: " << Op1 << "\n"
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343 << "Op2: " << Op2 << "\n");
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344
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345 if (Op1.isIdenticalTo(Op2)) {
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346 // filter out instructions with physical-register uses
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347 if (Op1.isReg() && TargetRegisterInfo::isPhysicalRegister(Op1.getReg())
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348 // If the physical register is constant then we can assume the value
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349 // has not changed between uses.
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350 && !(Op1.isUse() && MRI->isConstantPhysReg(Op1.getReg()))) {
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351 DEBUG(dbgs() << "The operands are not provably identical.\n");
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352 return false;
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353 }
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354 DEBUG(dbgs() << "Op1 and Op2 are identical!\n");
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355 continue;
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356 }
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357
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358 // If the operands are not identical, but are registers, check to see if the
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359 // definition of the register produces the same value. If they produce the
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360 // same value, consider them to be identical.
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361 if (Op1.isReg() && Op2.isReg() &&
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362 TargetRegisterInfo::isVirtualRegister(Op1.getReg()) &&
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363 TargetRegisterInfo::isVirtualRegister(Op2.getReg())) {
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364 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
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365 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
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366 if (TII->produceSameValue(*Op1Def, *Op2Def, MRI)) {
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367 DEBUG(dbgs() << "Op1Def: " << *Op1Def << " and " << *Op2Def
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368 << " produce the same value!\n");
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369 } else {
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370 DEBUG(dbgs() << "Operands produce different values\n");
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371 return false;
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372 }
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373 } else {
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374 DEBUG(dbgs() << "The operands are not provably identical.\n");
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375 return false;
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376 }
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377 }
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378
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379 return true;
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380 }
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381
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382 ///
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383 /// Moves ALL PHI instructions in SourceMBB to beginning of TargetMBB
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384 /// and update them to refer to the new block. PHI node ordering
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385 /// cannot be assumed so it does not matter where the PHI instructions
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386 /// are moved to in TargetMBB.
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387 ///
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388 /// \param[in] SourceMBB block to move PHI instructions from
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389 /// \param[in] TargetMBB block to move PHI instructions to
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390 ///
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391 void PPCBranchCoalescing::moveAndUpdatePHIs(MachineBasicBlock *SourceMBB,
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392 MachineBasicBlock *TargetMBB) {
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393
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394 MachineBasicBlock::iterator MI = SourceMBB->begin();
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395 MachineBasicBlock::iterator ME = SourceMBB->getFirstNonPHI();
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396
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397 if (MI == ME) {
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398 DEBUG(dbgs() << "SourceMBB contains no PHI instructions.\n");
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399 return;
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400 }
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401
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402 // Update all PHI instructions in SourceMBB and move to top of TargetMBB
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403 for (MachineBasicBlock::iterator Iter = MI; Iter != ME; Iter++) {
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404 MachineInstr &PHIInst = *Iter;
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405 for (unsigned i = 2, e = PHIInst.getNumOperands() + 1; i != e; i += 2) {
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406 MachineOperand &MO = PHIInst.getOperand(i);
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407 if (MO.getMBB() == SourceMBB)
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408 MO.setMBB(TargetMBB);
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409 }
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410 }
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411 TargetMBB->splice(TargetMBB->begin(), SourceMBB, MI, ME);
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412 }
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413
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414 ///
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415 /// This function checks if MI can be moved to the beginning of the TargetMBB
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416 /// following PHI instructions. A MI instruction can be moved to beginning of
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417 /// the TargetMBB if there are no uses of it within the TargetMBB PHI nodes.
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418 ///
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419 /// \param[in] MI the machine instruction to move.
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420 /// \param[in] TargetMBB the machine basic block to move to
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421 /// \return true if it is safe to move MI to beginning of TargetMBB,
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422 /// false otherwise.
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423 ///
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424 bool PPCBranchCoalescing::canMoveToBeginning(const MachineInstr &MI,
|
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425 const MachineBasicBlock &TargetMBB
|
|
426 ) const {
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427
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428 DEBUG(dbgs() << "Checking if " << MI << " can move to beginning of "
|
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429 << TargetMBB.getNumber() << "\n");
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|
430
|
|
431 for (auto &Def : MI.defs()) { // Looking at Def
|
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432 for (auto &Use : MRI->use_instructions(Def.getReg())) {
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433 if (Use.isPHI() && Use.getParent() == &TargetMBB) {
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434 DEBUG(dbgs() << " *** used in a PHI -- cannot move ***\n");
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|
435 return false;
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|
436 }
|
|
437 }
|
|
438 }
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|
439
|
|
440 DEBUG(dbgs() << " Safe to move to the beginning.\n");
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|
441 return true;
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|
442 }
|
|
443
|
|
444 ///
|
|
445 /// This function checks if MI can be moved to the end of the TargetMBB,
|
|
446 /// immediately before the first terminator. A MI instruction can be moved
|
|
447 /// to then end of the TargetMBB if no PHI node defines what MI uses within
|
|
448 /// it's own MBB.
|
|
449 ///
|
|
450 /// \param[in] MI the machine instruction to move.
|
|
451 /// \param[in] TargetMBB the machine basic block to move to
|
|
452 /// \return true if it is safe to move MI to end of TargetMBB,
|
|
453 /// false otherwise.
|
|
454 ///
|
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455 bool PPCBranchCoalescing::canMoveToEnd(const MachineInstr &MI,
|
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456 const MachineBasicBlock &TargetMBB
|
|
457 ) const {
|
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458
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459 DEBUG(dbgs() << "Checking if " << MI << " can move to end of "
|
|
460 << TargetMBB.getNumber() << "\n");
|
|
461
|
|
462 for (auto &Use : MI.uses()) {
|
|
463 if (Use.isReg() && TargetRegisterInfo::isVirtualRegister(Use.getReg())) {
|
|
464 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
|
|
465 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) {
|
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466 DEBUG(dbgs() << " *** Cannot move this instruction ***\n");
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|
467 return false;
|
|
468 } else {
|
|
469 DEBUG(dbgs() << " *** def is in another block -- safe to move!\n");
|
|
470 }
|
|
471 }
|
|
472 }
|
|
473
|
|
474 DEBUG(dbgs() << " Safe to move to the end.\n");
|
|
475 return true;
|
|
476 }
|
|
477
|
|
478 ///
|
|
479 /// This method checks to ensure the two coalescing candidates follows the
|
|
480 /// expected pattern required for coalescing.
|
|
481 ///
|
|
482 /// \param[in] SourceRegion The candidate to move statements from
|
|
483 /// \param[in] TargetRegion The candidate to move statements to
|
|
484 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
|
|
485 /// into a block in TargetRegion; false otherwise.
|
|
486 ///
|
|
487 bool PPCBranchCoalescing::validateCandidates(
|
|
488 CoalescingCandidateInfo &SourceRegion,
|
|
489 CoalescingCandidateInfo &TargetRegion) const {
|
|
490
|
|
491 if (TargetRegion.BranchTargetBlock != SourceRegion.BranchBlock)
|
|
492 llvm_unreachable("Expecting SourceRegion to immediately follow TargetRegion");
|
|
493 else if (!MDT->dominates(TargetRegion.BranchBlock, SourceRegion.BranchBlock))
|
|
494 llvm_unreachable("Expecting TargetRegion to dominate SourceRegion");
|
|
495 else if (!MPDT->dominates(SourceRegion.BranchBlock, TargetRegion.BranchBlock))
|
|
496 llvm_unreachable("Expecting SourceRegion to post-dominate TargetRegion");
|
|
497 else if (!TargetRegion.FallThroughBlock->empty() ||
|
|
498 !SourceRegion.FallThroughBlock->empty())
|
|
499 llvm_unreachable("Expecting fall-through blocks to be empty");
|
|
500
|
|
501 return true;
|
|
502 }
|
|
503
|
|
504 ///
|
|
505 /// This method determines whether the two coalescing candidates can be merged.
|
|
506 /// In order to be merged, all instructions must be able to
|
|
507 /// 1. Move to the beginning of the SourceRegion.BranchTargetBlock;
|
|
508 /// 2. Move to the end of the TargetRegion.BranchBlock.
|
|
509 /// Merging involves moving the instructions in the
|
|
510 /// TargetRegion.BranchTargetBlock (also SourceRegion.BranchBlock).
|
|
511 ///
|
|
512 /// This function first try to move instructions from the
|
|
513 /// TargetRegion.BranchTargetBlock down, to the beginning of the
|
|
514 /// SourceRegion.BranchTargetBlock. This is not possible if any register defined
|
|
515 /// in TargetRegion.BranchTargetBlock is used in a PHI node in the
|
|
516 /// SourceRegion.BranchTargetBlock. In this case, check whether the statement
|
|
517 /// can be moved up, to the end of the TargetRegion.BranchBlock (immediately
|
|
518 /// before the branch statement). If it cannot move, then these blocks cannot
|
|
519 /// be merged.
|
|
520 ///
|
|
521 /// Note that there is no analysis for moving instructions past the fall-through
|
|
522 /// blocks because they are confirmed to be empty. An assert is thrown if they
|
|
523 /// are not.
|
|
524 ///
|
|
525 /// \param[in] SourceRegion The candidate to move statements from
|
|
526 /// \param[in] TargetRegion The candidate to move statements to
|
|
527 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
|
|
528 /// into a block in TargetRegion, false otherwise.
|
|
529 ///
|
|
530 bool PPCBranchCoalescing::canMerge(CoalescingCandidateInfo &SourceRegion,
|
|
531 CoalescingCandidateInfo &TargetRegion) const {
|
|
532 if (!validateCandidates(SourceRegion, TargetRegion))
|
|
533 return false;
|
|
534
|
|
535 // Walk through PHI nodes first and see if they force the merge into the
|
|
536 // SourceRegion.BranchTargetBlock.
|
|
537 for (MachineBasicBlock::iterator
|
|
538 I = SourceRegion.BranchBlock->instr_begin(),
|
|
539 E = SourceRegion.BranchBlock->getFirstNonPHI();
|
|
540 I != E; ++I) {
|
|
541 for (auto &Def : I->defs())
|
|
542 for (auto &Use : MRI->use_instructions(Def.getReg())) {
|
|
543 if (Use.isPHI() && Use.getParent() == SourceRegion.BranchTargetBlock) {
|
|
544 DEBUG(dbgs() << "PHI " << *I << " defines register used in another "
|
|
545 "PHI within branch target block -- can't merge\n");
|
|
546 NumPHINotMoved++;
|
|
547 return false;
|
|
548 }
|
|
549 if (Use.getParent() == SourceRegion.BranchBlock) {
|
|
550 DEBUG(dbgs() << "PHI " << *I
|
|
551 << " defines register used in this "
|
|
552 "block -- all must move down\n");
|
|
553 SourceRegion.MustMoveDown = true;
|
|
554 }
|
|
555 }
|
|
556 }
|
|
557
|
|
558 // Walk through the MI to see if they should be merged into
|
|
559 // TargetRegion.BranchBlock (up) or SourceRegion.BranchTargetBlock (down)
|
|
560 for (MachineBasicBlock::iterator
|
|
561 I = SourceRegion.BranchBlock->getFirstNonPHI(),
|
|
562 E = SourceRegion.BranchBlock->end();
|
|
563 I != E; ++I) {
|
|
564 if (!canMoveToBeginning(*I, *SourceRegion.BranchTargetBlock)) {
|
|
565 DEBUG(dbgs() << "Instruction " << *I
|
|
566 << " cannot move down - must move up!\n");
|
|
567 SourceRegion.MustMoveUp = true;
|
|
568 }
|
|
569 if (!canMoveToEnd(*I, *TargetRegion.BranchBlock)) {
|
|
570 DEBUG(dbgs() << "Instruction " << *I
|
|
571 << " cannot move up - must move down!\n");
|
|
572 SourceRegion.MustMoveDown = true;
|
|
573 }
|
|
574 }
|
|
575
|
|
576 return (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) ? false : true;
|
|
577 }
|
|
578
|
|
579 /// Merge the instructions from SourceRegion.BranchBlock,
|
|
580 /// SourceRegion.BranchTargetBlock, and SourceRegion.FallThroughBlock into
|
|
581 /// TargetRegion.BranchBlock, TargetRegion.BranchTargetBlock and
|
|
582 /// TargetRegion.FallThroughBlock respectively.
|
|
583 ///
|
|
584 /// The successors for blocks in TargetRegion will be updated to use the
|
|
585 /// successors from blocks in SourceRegion. Finally, the blocks in SourceRegion
|
|
586 /// will be removed from the function.
|
|
587 ///
|
|
588 /// A region consists of a BranchBlock, a FallThroughBlock, and a
|
|
589 /// BranchTargetBlock. Branch coalesce works on patterns where the
|
|
590 /// TargetRegion's BranchTargetBlock must also be the SourceRegions's
|
|
591 /// BranchBlock.
|
|
592 ///
|
|
593 /// Before mergeCandidates:
|
|
594 ///
|
|
595 /// +---------------------------+
|
|
596 /// | TargetRegion.BranchBlock |
|
|
597 /// +---------------------------+
|
|
598 /// / |
|
|
599 /// / +--------------------------------+
|
|
600 /// | | TargetRegion.FallThroughBlock |
|
|
601 /// \ +--------------------------------+
|
|
602 /// \ |
|
|
603 /// +----------------------------------+
|
|
604 /// | TargetRegion.BranchTargetBlock |
|
|
605 /// | SourceRegion.BranchBlock |
|
|
606 /// +----------------------------------+
|
|
607 /// / |
|
|
608 /// / +--------------------------------+
|
|
609 /// | | SourceRegion.FallThroughBlock |
|
|
610 /// \ +--------------------------------+
|
|
611 /// \ |
|
|
612 /// +----------------------------------+
|
|
613 /// | SourceRegion.BranchTargetBlock |
|
|
614 /// +----------------------------------+
|
|
615 ///
|
|
616 /// After mergeCandidates:
|
|
617 ///
|
|
618 /// +-----------------------------+
|
|
619 /// | TargetRegion.BranchBlock |
|
|
620 /// | SourceRegion.BranchBlock |
|
|
621 /// +-----------------------------+
|
|
622 /// / |
|
|
623 /// / +---------------------------------+
|
|
624 /// | | TargetRegion.FallThroughBlock |
|
|
625 /// | | SourceRegion.FallThroughBlock |
|
|
626 /// \ +---------------------------------+
|
|
627 /// \ |
|
|
628 /// +----------------------------------+
|
|
629 /// | SourceRegion.BranchTargetBlock |
|
|
630 /// +----------------------------------+
|
|
631 ///
|
|
632 /// \param[in] SourceRegion The candidate to move blocks from
|
|
633 /// \param[in] TargetRegion The candidate to move blocks to
|
|
634 ///
|
|
635 bool PPCBranchCoalescing::mergeCandidates(CoalescingCandidateInfo &SourceRegion,
|
|
636 CoalescingCandidateInfo &TargetRegion) {
|
|
637
|
|
638 if (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) {
|
|
639 llvm_unreachable("Cannot have both MustMoveDown and MustMoveUp set!");
|
|
640 return false;
|
|
641 }
|
|
642
|
|
643 if (!validateCandidates(SourceRegion, TargetRegion))
|
|
644 return false;
|
|
645
|
|
646 // Start the merging process by first handling the BranchBlock.
|
|
647 // Move any PHIs in SourceRegion.BranchBlock down to the branch-taken block
|
|
648 moveAndUpdatePHIs(SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
|
|
649
|
|
650 // Move remaining instructions in SourceRegion.BranchBlock into
|
|
651 // TargetRegion.BranchBlock
|
|
652 MachineBasicBlock::iterator firstInstr =
|
|
653 SourceRegion.BranchBlock->getFirstNonPHI();
|
|
654 MachineBasicBlock::iterator lastInstr =
|
|
655 SourceRegion.BranchBlock->getFirstTerminator();
|
|
656
|
|
657 MachineBasicBlock *Source = SourceRegion.MustMoveDown
|
|
658 ? SourceRegion.BranchTargetBlock
|
|
659 : TargetRegion.BranchBlock;
|
|
660
|
|
661 MachineBasicBlock::iterator Target =
|
|
662 SourceRegion.MustMoveDown
|
|
663 ? SourceRegion.BranchTargetBlock->getFirstNonPHI()
|
|
664 : TargetRegion.BranchBlock->getFirstTerminator();
|
|
665
|
|
666 Source->splice(Target, SourceRegion.BranchBlock, firstInstr, lastInstr);
|
|
667
|
|
668 // Once PHI and instructions have been moved we need to clean up the
|
|
669 // control flow.
|
|
670
|
|
671 // Remove SourceRegion.FallThroughBlock before transferring successors of
|
|
672 // SourceRegion.BranchBlock to TargetRegion.BranchBlock.
|
|
673 SourceRegion.BranchBlock->removeSuccessor(SourceRegion.FallThroughBlock);
|
|
674 TargetRegion.BranchBlock->transferSuccessorsAndUpdatePHIs(
|
|
675 SourceRegion.BranchBlock);
|
|
676 // Update branch in TargetRegion.BranchBlock to jump to
|
|
677 // SourceRegion.BranchTargetBlock
|
|
678 // In this case, TargetRegion.BranchTargetBlock == SourceRegion.BranchBlock.
|
|
679 TargetRegion.BranchBlock->ReplaceUsesOfBlockWith(
|
|
680 SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
|
|
681 // Remove the branch statement(s) in SourceRegion.BranchBlock
|
|
682 MachineBasicBlock::iterator I =
|
|
683 SourceRegion.BranchBlock->terminators().begin();
|
|
684 while (I != SourceRegion.BranchBlock->terminators().end()) {
|
|
685 MachineInstr &CurrInst = *I;
|
|
686 ++I;
|
|
687 if (CurrInst.isBranch())
|
|
688 CurrInst.eraseFromParent();
|
|
689 }
|
|
690
|
|
691 // Fall-through block should be empty since this is part of the condition
|
|
692 // to coalesce the branches.
|
|
693 assert(TargetRegion.FallThroughBlock->empty() &&
|
|
694 "FallThroughBlocks should be empty!");
|
|
695
|
|
696 // Transfer successor information and move PHIs down to the
|
|
697 // branch-taken block.
|
|
698 TargetRegion.FallThroughBlock->transferSuccessorsAndUpdatePHIs(
|
|
699 SourceRegion.FallThroughBlock);
|
|
700 TargetRegion.FallThroughBlock->removeSuccessor(SourceRegion.BranchBlock);
|
|
701
|
|
702 // Remove the blocks from the function.
|
|
703 assert(SourceRegion.BranchBlock->empty() &&
|
|
704 "Expecting branch block to be empty!");
|
|
705 SourceRegion.BranchBlock->eraseFromParent();
|
|
706
|
|
707 assert(SourceRegion.FallThroughBlock->empty() &&
|
|
708 "Expecting fall-through block to be empty!\n");
|
|
709 SourceRegion.FallThroughBlock->eraseFromParent();
|
|
710
|
|
711 NumBlocksCoalesced++;
|
|
712 return true;
|
|
713 }
|
|
714
|
|
715 bool PPCBranchCoalescing::runOnMachineFunction(MachineFunction &MF) {
|
|
716
|
|
717 if (skipFunction(*MF.getFunction()) || MF.empty())
|
|
718 return false;
|
|
719
|
|
720 bool didSomething = false;
|
|
721
|
|
722 DEBUG(dbgs() << "******** Branch Coalescing ********\n");
|
|
723 initialize(MF);
|
|
724
|
|
725 DEBUG(dbgs() << "Function: "; MF.dump(); dbgs() << "\n");
|
|
726
|
|
727 CoalescingCandidateInfo Cand1, Cand2;
|
|
728 // Walk over blocks and find candidates to merge
|
|
729 // Continue trying to merge with the first candidate found, as long as merging
|
|
730 // is successfull.
|
|
731 for (MachineBasicBlock &MBB : MF) {
|
|
732 bool MergedCandidates = false;
|
|
733 do {
|
|
734 MergedCandidates = false;
|
|
735 Cand1.clear();
|
|
736 Cand2.clear();
|
|
737
|
|
738 Cand1.BranchBlock = &MBB;
|
|
739
|
|
740 // If unable to coalesce the branch, then continue to next block
|
|
741 if (!canCoalesceBranch(Cand1))
|
|
742 break;
|
|
743
|
|
744 Cand2.BranchBlock = Cand1.BranchTargetBlock;
|
|
745 if (!canCoalesceBranch(Cand2))
|
|
746 break;
|
|
747
|
|
748 // Sanity check
|
|
749 // The branch-taken block of the second candidate should post-dominate the
|
|
750 // first candidate
|
|
751 assert(MPDT->dominates(Cand2.BranchTargetBlock, Cand1.BranchBlock) &&
|
|
752 "Branch-taken block should post-dominate first candidate");
|
|
753
|
|
754 if (!identicalOperands(Cand1.Cond, Cand2.Cond)) {
|
|
755 DEBUG(dbgs() << "Blocks " << Cand1.BranchBlock->getNumber() << " and "
|
|
756 << Cand2.BranchBlock->getNumber()
|
|
757 << " have different branches\n");
|
|
758 break;
|
|
759 }
|
|
760 if (!canMerge(Cand2, Cand1)) {
|
|
761 DEBUG(dbgs() << "Cannot merge blocks " << Cand1.BranchBlock->getNumber()
|
|
762 << " and " << Cand2.BranchBlock->getNumber() << "\n");
|
|
763 NumBlocksNotCoalesced++;
|
|
764 continue;
|
|
765 }
|
|
766 DEBUG(dbgs() << "Merging blocks " << Cand1.BranchBlock->getNumber()
|
|
767 << " and " << Cand1.BranchTargetBlock->getNumber() << "\n");
|
|
768 MergedCandidates = mergeCandidates(Cand2, Cand1);
|
|
769 if (MergedCandidates)
|
|
770 didSomething = true;
|
|
771
|
|
772 DEBUG(dbgs() << "Function after merging: "; MF.dump(); dbgs() << "\n");
|
|
773 } while (MergedCandidates);
|
|
774 }
|
|
775
|
|
776 #ifndef NDEBUG
|
|
777 // Verify MF is still valid after branch coalescing
|
|
778 if (didSomething)
|
|
779 MF.verify(nullptr, "Error in code produced by branch coalescing");
|
|
780 #endif // NDEBUG
|
|
781
|
|
782 DEBUG(dbgs() << "Finished Branch Coalescing\n");
|
|
783 return didSomething;
|
|
784 }
|