annotate lib/Target/PowerPC/PPCBranchCoalescing.cpp @ 121:803732b1fca8

LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
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1 //===-- CoalesceBranches.cpp - Coalesce blocks with the same condition ---===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 ///
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10 /// \file
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11 /// Coalesce basic blocks guarded by the same branch condition into a single
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12 /// basic block.
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13 ///
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14 //===----------------------------------------------------------------------===//
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15
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16 #include "PPC.h"
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17 #include "llvm/ADT/BitVector.h"
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18 #include "llvm/ADT/Statistic.h"
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19 #include "llvm/CodeGen/MachineDominators.h"
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20 #include "llvm/CodeGen/MachineFunctionPass.h"
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21 #include "llvm/CodeGen/MachinePostDominators.h"
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22 #include "llvm/CodeGen/MachineRegisterInfo.h"
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23 #include "llvm/CodeGen/Passes.h"
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24 #include "llvm/Support/Debug.h"
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25 #include "llvm/Target/TargetFrameLowering.h"
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26 #include "llvm/Target/TargetInstrInfo.h"
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27 #include "llvm/Target/TargetSubtargetInfo.h"
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28
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29 using namespace llvm;
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30
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31 #define DEBUG_TYPE "ppc-branch-coalescing"
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32
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33 STATISTIC(NumBlocksCoalesced, "Number of blocks coalesced");
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34 STATISTIC(NumPHINotMoved, "Number of PHI Nodes that cannot be merged");
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35 STATISTIC(NumBlocksNotCoalesced, "Number of blocks not coalesced");
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36
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37 namespace llvm {
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38 void initializePPCBranchCoalescingPass(PassRegistry&);
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39 }
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40
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41 //===----------------------------------------------------------------------===//
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42 // PPCBranchCoalescing
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43 //===----------------------------------------------------------------------===//
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44 ///
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45 /// Improve scheduling by coalescing branches that depend on the same condition.
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46 /// This pass looks for blocks that are guarded by the same branch condition
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47 /// and attempts to merge the blocks together. Such opportunities arise from
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48 /// the expansion of select statements in the IR.
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49 ///
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50 /// This pass does not handle implicit operands on branch statements. In order
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51 /// to run on targets that use implicit operands, changes need to be made in the
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52 /// canCoalesceBranch and canMerge methods.
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53 ///
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54 /// Example: the following LLVM IR
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55 ///
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56 /// %test = icmp eq i32 %x 0
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57 /// %tmp1 = select i1 %test, double %a, double 2.000000e-03
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58 /// %tmp2 = select i1 %test, double %b, double 5.000000e-03
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59 ///
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60 /// expands to the following machine code:
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61 ///
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62 /// BB#0: derived from LLVM BB %entry
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63 /// Live Ins: %F1 %F3 %X6
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64 /// <SNIP1>
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65 /// %vreg0<def> = COPY %F1; F8RC:%vreg0
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66 /// %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4
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67 /// %vreg8<def> = LXSDX %ZERO8, %vreg7<kill>, %RM<imp-use>;
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68 /// mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7
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69 /// BCC 76, %vreg5, <BB#2>; CRRC:%vreg5
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70 /// Successors according to CFG: BB#1(?%) BB#2(?%)
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71 ///
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72 /// BB#1: derived from LLVM BB %entry
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73 /// Predecessors according to CFG: BB#0
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74 /// Successors according to CFG: BB#2(?%)
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75 ///
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76 /// BB#2: derived from LLVM BB %entry
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77 /// Predecessors according to CFG: BB#0 BB#1
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78 /// %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>;
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79 /// F8RC:%vreg9,%vreg8,%vreg0
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80 /// <SNIP2>
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81 /// BCC 76, %vreg5, <BB#4>; CRRC:%vreg5
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82 /// Successors according to CFG: BB#3(?%) BB#4(?%)
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83 ///
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84 /// BB#3: derived from LLVM BB %entry
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85 /// Predecessors according to CFG: BB#2
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86 /// Successors according to CFG: BB#4(?%)
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87 ///
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88 /// BB#4: derived from LLVM BB %entry
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89 /// Predecessors according to CFG: BB#2 BB#3
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90 /// %vreg13<def> = PHI %vreg12, <BB#3>, %vreg2, <BB#2>;
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91 /// F8RC:%vreg13,%vreg12,%vreg2
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92 /// <SNIP3>
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93 /// BLR8 %LR8<imp-use>, %RM<imp-use>, %F1<imp-use>
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94 ///
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95 /// When this pattern is detected, branch coalescing will try to collapse
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96 /// it by moving code in BB#2 to BB#0 and/or BB#4 and removing BB#3.
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97 ///
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98 /// If all conditions are meet, IR should collapse to:
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99 ///
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100 /// BB#0: derived from LLVM BB %entry
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101 /// Live Ins: %F1 %F3 %X6
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102 /// <SNIP1>
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103 /// %vreg0<def> = COPY %F1; F8RC:%vreg0
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104 /// %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4
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105 /// %vreg8<def> = LXSDX %ZERO8, %vreg7<kill>, %RM<imp-use>;
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106 /// mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7
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107 /// <SNIP2>
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108 /// BCC 76, %vreg5, <BB#4>; CRRC:%vreg5
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109 /// Successors according to CFG: BB#1(0x2aaaaaaa / 0x80000000 = 33.33%)
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110 /// BB#4(0x55555554 / 0x80000000 = 66.67%)
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111 ///
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112 /// BB#1: derived from LLVM BB %entry
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113 /// Predecessors according to CFG: BB#0
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114 /// Successors according to CFG: BB#4(0x40000000 / 0x80000000 = 50.00%)
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115 ///
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116 /// BB#4: derived from LLVM BB %entry
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117 /// Predecessors according to CFG: BB#0 BB#1
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118 /// %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>;
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119 /// F8RC:%vreg9,%vreg8,%vreg0
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120 /// %vreg13<def> = PHI %vreg12, <BB#1>, %vreg2, <BB#0>;
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121 /// F8RC:%vreg13,%vreg12,%vreg2
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122 /// <SNIP3>
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123 /// BLR8 %LR8<imp-use>, %RM<imp-use>, %F1<imp-use>
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124 ///
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125 /// Branch Coalescing does not split blocks, it moves everything in the same
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126 /// direction ensuring it does not break use/definition semantics.
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127 ///
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128 /// PHI nodes and its corresponding use instructions are moved to its successor
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129 /// block if there are no uses within the successor block PHI nodes. PHI
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130 /// node ordering cannot be assumed.
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131 ///
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132 /// Non-PHI can be moved up to the predecessor basic block or down to the
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133 /// successor basic block following any PHI instructions. Whether it moves
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134 /// up or down depends on whether the register(s) defined in the instructions
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135 /// are used in current block or in any PHI instructions at the beginning of
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136 /// the successor block.
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137
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138 namespace {
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139
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140 class PPCBranchCoalescing : public MachineFunctionPass {
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141 struct CoalescingCandidateInfo {
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142 MachineBasicBlock *BranchBlock; // Block containing the branch
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143 MachineBasicBlock *BranchTargetBlock; // Block branched to
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144 MachineBasicBlock *FallThroughBlock; // Fall-through if branch not taken
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145 SmallVector<MachineOperand, 4> Cond;
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146 bool MustMoveDown;
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147 bool MustMoveUp;
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148
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149 CoalescingCandidateInfo();
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150 void clear();
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151 };
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152
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153 MachineDominatorTree *MDT;
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154 MachinePostDominatorTree *MPDT;
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155 const TargetInstrInfo *TII;
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156 MachineRegisterInfo *MRI;
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157
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158 void initialize(MachineFunction &F);
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159 bool canCoalesceBranch(CoalescingCandidateInfo &Cand);
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160 bool identicalOperands(ArrayRef<MachineOperand> OperandList1,
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161 ArrayRef<MachineOperand> OperandList2) const;
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162 bool validateCandidates(CoalescingCandidateInfo &SourceRegion,
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163 CoalescingCandidateInfo &TargetRegion) const;
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164
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165 public:
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166 static char ID;
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167
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168 PPCBranchCoalescing() : MachineFunctionPass(ID) {
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169 initializePPCBranchCoalescingPass(*PassRegistry::getPassRegistry());
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170 }
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171
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172 void getAnalysisUsage(AnalysisUsage &AU) const override {
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173 AU.addRequired<MachineDominatorTree>();
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174 AU.addRequired<MachinePostDominatorTree>();
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175 MachineFunctionPass::getAnalysisUsage(AU);
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176 }
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177
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178 StringRef getPassName() const override { return "Branch Coalescing"; }
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179
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180 bool mergeCandidates(CoalescingCandidateInfo &SourceRegion,
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181 CoalescingCandidateInfo &TargetRegion);
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182 bool canMoveToBeginning(const MachineInstr &MI,
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183 const MachineBasicBlock &MBB) const;
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184 bool canMoveToEnd(const MachineInstr &MI,
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185 const MachineBasicBlock &MBB) const;
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186 bool canMerge(CoalescingCandidateInfo &SourceRegion,
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187 CoalescingCandidateInfo &TargetRegion) const;
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188 void moveAndUpdatePHIs(MachineBasicBlock *SourceRegionMBB,
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189 MachineBasicBlock *TargetRegionMBB);
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190 bool runOnMachineFunction(MachineFunction &MF) override;
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191 };
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192 } // End anonymous namespace.
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193
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194 char PPCBranchCoalescing::ID = 0;
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195 /// createPPCBranchCoalescingPass - returns an instance of the Branch Coalescing
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196 /// Pass
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197 FunctionPass *llvm::createPPCBranchCoalescingPass() {
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diff changeset
198 return new PPCBranchCoalescing();
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199 }
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200
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201 INITIALIZE_PASS_BEGIN(PPCBranchCoalescing, DEBUG_TYPE,
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202 "Branch Coalescing", false, false)
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203 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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204 INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
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205 INITIALIZE_PASS_END(PPCBranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
803732b1fca8 LLVM 5.0
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206 false, false)
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diff changeset
207
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208 PPCBranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
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209 : BranchBlock(nullptr), BranchTargetBlock(nullptr),
803732b1fca8 LLVM 5.0
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diff changeset
210 FallThroughBlock(nullptr), MustMoveDown(false), MustMoveUp(false) {}
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211
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212 void PPCBranchCoalescing::CoalescingCandidateInfo::clear() {
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213 BranchBlock = nullptr;
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214 BranchTargetBlock = nullptr;
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215 FallThroughBlock = nullptr;
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216 Cond.clear();
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217 MustMoveDown = false;
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218 MustMoveUp = false;
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219 }
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220
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221 void PPCBranchCoalescing::initialize(MachineFunction &MF) {
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222 MDT = &getAnalysis<MachineDominatorTree>();
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223 MPDT = &getAnalysis<MachinePostDominatorTree>();
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224 TII = MF.getSubtarget().getInstrInfo();
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225 MRI = &MF.getRegInfo();
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226 }
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227
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228 ///
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229 /// Analyze the branch statement to determine if it can be coalesced. This
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230 /// method analyses the branch statement for the given candidate to determine
803732b1fca8 LLVM 5.0
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231 /// if it can be coalesced. If the branch can be coalesced, then the
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232 /// BranchTargetBlock and the FallThroughBlock are recorded in the specified
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233 /// Candidate.
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234 ///
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235 ///\param[in,out] Cand The coalescing candidate to analyze
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236 ///\return true if and only if the branch can be coalesced, false otherwise
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237 ///
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238 bool PPCBranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) {
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239 DEBUG(dbgs() << "Determine if branch block " << Cand.BranchBlock->getNumber()
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240 << " can be coalesced:");
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241 MachineBasicBlock *FalseMBB = nullptr;
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242
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243 if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB,
803732b1fca8 LLVM 5.0
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244 Cand.Cond)) {
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245 DEBUG(dbgs() << "TII unable to Analyze Branch - skip\n");
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246 return false;
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247 }
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248
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249 for (auto &I : Cand.BranchBlock->terminators()) {
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250 DEBUG(dbgs() << "Looking at terminator : " << I << "\n");
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251 if (!I.isBranch())
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252 continue;
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253
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254 // The analyzeBranch method does not include any implicit operands.
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255 // This is not an issue on PPC but must be handled on other targets.
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parents:
diff changeset
256 // For this pass to be made target-independent, the analyzeBranch API
803732b1fca8 LLVM 5.0
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parents:
diff changeset
257 // need to be updated to support implicit operands and there would
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parents:
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258 // need to be a way to verify that any implicit operands would not be
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259 // clobbered by merging blocks. This would include identifying the
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260 // implicit operands as well as the basic block they are defined in.
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parents:
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261 // This could be done by changing the analyzeBranch API to have it also
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262 // record and return the implicit operands and the blocks where they are
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263 // defined. Alternatively, the BranchCoalescing code would need to be
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parents:
diff changeset
264 // extended to identify the implicit operands. The analysis in canMerge
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parents:
diff changeset
265 // must then be extended to prove that none of the implicit operands are
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266 // changed in the blocks that are combined during coalescing.
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267 if (I.getNumOperands() != I.getNumExplicitOperands()) {
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268 DEBUG(dbgs() << "Terminator contains implicit operands - skip : " << I
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269 << "\n");
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270 return false;
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diff changeset
271 }
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diff changeset
272 }
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diff changeset
273
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diff changeset
274 if (Cand.BranchBlock->isEHPad() || Cand.BranchBlock->hasEHPadSuccessor()) {
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diff changeset
275 DEBUG(dbgs() << "EH Pad - skip\n");
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276 return false;
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diff changeset
277 }
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diff changeset
278
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diff changeset
279 // For now only consider triangles (i.e, BranchTargetBlock is set,
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diff changeset
280 // FalseMBB is null, and BranchTargetBlock is a successor to BranchBlock)
803732b1fca8 LLVM 5.0
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diff changeset
281 if (!Cand.BranchTargetBlock || FalseMBB ||
803732b1fca8 LLVM 5.0
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282 !Cand.BranchBlock->isSuccessor(Cand.BranchTargetBlock)) {
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diff changeset
283 DEBUG(dbgs() << "Does not form a triangle - skip\n");
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diff changeset
284 return false;
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diff changeset
285 }
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286
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parents:
diff changeset
287 // Ensure there are only two successors
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diff changeset
288 if (Cand.BranchBlock->succ_size() != 2) {
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diff changeset
289 DEBUG(dbgs() << "Does not have 2 successors - skip\n");
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diff changeset
290 return false;
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parents:
diff changeset
291 }
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diff changeset
292
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diff changeset
293 // Sanity check - the block must be able to fall through
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diff changeset
294 assert(Cand.BranchBlock->canFallThrough() &&
803732b1fca8 LLVM 5.0
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diff changeset
295 "Expecting the block to fall through!");
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diff changeset
296
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diff changeset
297 // We have already ensured there are exactly two successors to
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diff changeset
298 // BranchBlock and that BranchTargetBlock is a successor to BranchBlock.
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parents:
diff changeset
299 // Ensure the single fall though block is empty.
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diff changeset
300 MachineBasicBlock *Succ =
803732b1fca8 LLVM 5.0
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diff changeset
301 (*Cand.BranchBlock->succ_begin() == Cand.BranchTargetBlock)
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diff changeset
302 ? *Cand.BranchBlock->succ_rbegin()
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diff changeset
303 : *Cand.BranchBlock->succ_begin();
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diff changeset
304
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diff changeset
305 assert(Succ && "Expecting a valid fall-through block\n");
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diff changeset
306
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parents:
diff changeset
307 if (!Succ->empty()) {
803732b1fca8 LLVM 5.0
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parents:
diff changeset
308 DEBUG(dbgs() << "Fall-through block contains code -- skip\n");
803732b1fca8 LLVM 5.0
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parents:
diff changeset
309 return false;
803732b1fca8 LLVM 5.0
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parents:
diff changeset
310 }
803732b1fca8 LLVM 5.0
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parents:
diff changeset
311
803732b1fca8 LLVM 5.0
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parents:
diff changeset
312 if (!Succ->isSuccessor(Cand.BranchTargetBlock)) {
803732b1fca8 LLVM 5.0
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parents:
diff changeset
313 DEBUG(dbgs()
803732b1fca8 LLVM 5.0
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parents:
diff changeset
314 << "Successor of fall through block is not branch taken block\n");
803732b1fca8 LLVM 5.0
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parents:
diff changeset
315 return false;
803732b1fca8 LLVM 5.0
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parents:
diff changeset
316 }
803732b1fca8 LLVM 5.0
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parents:
diff changeset
317
803732b1fca8 LLVM 5.0
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parents:
diff changeset
318 Cand.FallThroughBlock = Succ;
803732b1fca8 LLVM 5.0
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parents:
diff changeset
319 DEBUG(dbgs() << "Valid Candidate\n");
803732b1fca8 LLVM 5.0
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diff changeset
320 return true;
803732b1fca8 LLVM 5.0
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parents:
diff changeset
321 }
803732b1fca8 LLVM 5.0
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parents:
diff changeset
322
803732b1fca8 LLVM 5.0
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diff changeset
323 ///
803732b1fca8 LLVM 5.0
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parents:
diff changeset
324 /// Determine if the two operand lists are identical
803732b1fca8 LLVM 5.0
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diff changeset
325 ///
803732b1fca8 LLVM 5.0
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parents:
diff changeset
326 /// \param[in] OpList1 operand list
803732b1fca8 LLVM 5.0
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parents:
diff changeset
327 /// \param[in] OpList2 operand list
803732b1fca8 LLVM 5.0
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parents:
diff changeset
328 /// \return true if and only if the operands lists are identical
803732b1fca8 LLVM 5.0
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diff changeset
329 ///
803732b1fca8 LLVM 5.0
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parents:
diff changeset
330 bool PPCBranchCoalescing::identicalOperands(
803732b1fca8 LLVM 5.0
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parents:
diff changeset
331 ArrayRef<MachineOperand> OpList1, ArrayRef<MachineOperand> OpList2) const {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
332
803732b1fca8 LLVM 5.0
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parents:
diff changeset
333 if (OpList1.size() != OpList2.size()) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
334 DEBUG(dbgs() << "Operand list is different size\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
335 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
336 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
337
803732b1fca8 LLVM 5.0
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parents:
diff changeset
338 for (unsigned i = 0; i < OpList1.size(); ++i) {
803732b1fca8 LLVM 5.0
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parents:
diff changeset
339 const MachineOperand &Op1 = OpList1[i];
803732b1fca8 LLVM 5.0
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parents:
diff changeset
340 const MachineOperand &Op2 = OpList2[i];
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
341
803732b1fca8 LLVM 5.0
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parents:
diff changeset
342 DEBUG(dbgs() << "Op1: " << Op1 << "\n"
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
343 << "Op2: " << Op2 << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
344
803732b1fca8 LLVM 5.0
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parents:
diff changeset
345 if (Op1.isIdenticalTo(Op2)) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
346 // filter out instructions with physical-register uses
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
347 if (Op1.isReg() && TargetRegisterInfo::isPhysicalRegister(Op1.getReg())
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
348 // If the physical register is constant then we can assume the value
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
349 // has not changed between uses.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
350 && !(Op1.isUse() && MRI->isConstantPhysReg(Op1.getReg()))) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
351 DEBUG(dbgs() << "The operands are not provably identical.\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
352 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
353 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
354 DEBUG(dbgs() << "Op1 and Op2 are identical!\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
355 continue;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
356 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
357
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
358 // If the operands are not identical, but are registers, check to see if the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
359 // definition of the register produces the same value. If they produce the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
360 // same value, consider them to be identical.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
361 if (Op1.isReg() && Op2.isReg() &&
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
362 TargetRegisterInfo::isVirtualRegister(Op1.getReg()) &&
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
363 TargetRegisterInfo::isVirtualRegister(Op2.getReg())) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
364 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg());
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
365 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg());
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
366 if (TII->produceSameValue(*Op1Def, *Op2Def, MRI)) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
367 DEBUG(dbgs() << "Op1Def: " << *Op1Def << " and " << *Op2Def
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
368 << " produce the same value!\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
369 } else {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
370 DEBUG(dbgs() << "Operands produce different values\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
371 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
372 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
373 } else {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
374 DEBUG(dbgs() << "The operands are not provably identical.\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
375 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
376 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
377 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
378
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
379 return true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
380 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
381
803732b1fca8 LLVM 5.0
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parents:
diff changeset
382 ///
803732b1fca8 LLVM 5.0
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parents:
diff changeset
383 /// Moves ALL PHI instructions in SourceMBB to beginning of TargetMBB
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
384 /// and update them to refer to the new block. PHI node ordering
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
385 /// cannot be assumed so it does not matter where the PHI instructions
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
386 /// are moved to in TargetMBB.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
387 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
388 /// \param[in] SourceMBB block to move PHI instructions from
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
389 /// \param[in] TargetMBB block to move PHI instructions to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
390 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
391 void PPCBranchCoalescing::moveAndUpdatePHIs(MachineBasicBlock *SourceMBB,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
392 MachineBasicBlock *TargetMBB) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
393
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
394 MachineBasicBlock::iterator MI = SourceMBB->begin();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
395 MachineBasicBlock::iterator ME = SourceMBB->getFirstNonPHI();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
396
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
397 if (MI == ME) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
398 DEBUG(dbgs() << "SourceMBB contains no PHI instructions.\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
399 return;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
400 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
401
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
402 // Update all PHI instructions in SourceMBB and move to top of TargetMBB
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
403 for (MachineBasicBlock::iterator Iter = MI; Iter != ME; Iter++) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
404 MachineInstr &PHIInst = *Iter;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
405 for (unsigned i = 2, e = PHIInst.getNumOperands() + 1; i != e; i += 2) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
406 MachineOperand &MO = PHIInst.getOperand(i);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
407 if (MO.getMBB() == SourceMBB)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
408 MO.setMBB(TargetMBB);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
409 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
410 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
411 TargetMBB->splice(TargetMBB->begin(), SourceMBB, MI, ME);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
412 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
413
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
414 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
415 /// This function checks if MI can be moved to the beginning of the TargetMBB
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
416 /// following PHI instructions. A MI instruction can be moved to beginning of
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
417 /// the TargetMBB if there are no uses of it within the TargetMBB PHI nodes.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
418 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
419 /// \param[in] MI the machine instruction to move.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
420 /// \param[in] TargetMBB the machine basic block to move to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
421 /// \return true if it is safe to move MI to beginning of TargetMBB,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
422 /// false otherwise.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
423 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
424 bool PPCBranchCoalescing::canMoveToBeginning(const MachineInstr &MI,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
425 const MachineBasicBlock &TargetMBB
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
426 ) const {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
427
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
428 DEBUG(dbgs() << "Checking if " << MI << " can move to beginning of "
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
429 << TargetMBB.getNumber() << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
430
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
431 for (auto &Def : MI.defs()) { // Looking at Def
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
432 for (auto &Use : MRI->use_instructions(Def.getReg())) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
433 if (Use.isPHI() && Use.getParent() == &TargetMBB) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
434 DEBUG(dbgs() << " *** used in a PHI -- cannot move ***\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
435 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
436 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
437 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
438 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
439
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
440 DEBUG(dbgs() << " Safe to move to the beginning.\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
441 return true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
442 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
443
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
444 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
445 /// This function checks if MI can be moved to the end of the TargetMBB,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
446 /// immediately before the first terminator. A MI instruction can be moved
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
447 /// to then end of the TargetMBB if no PHI node defines what MI uses within
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
448 /// it's own MBB.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
449 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
450 /// \param[in] MI the machine instruction to move.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
451 /// \param[in] TargetMBB the machine basic block to move to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
452 /// \return true if it is safe to move MI to end of TargetMBB,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
453 /// false otherwise.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
454 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
455 bool PPCBranchCoalescing::canMoveToEnd(const MachineInstr &MI,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
456 const MachineBasicBlock &TargetMBB
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
457 ) const {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
458
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
459 DEBUG(dbgs() << "Checking if " << MI << " can move to end of "
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
460 << TargetMBB.getNumber() << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
461
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
462 for (auto &Use : MI.uses()) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
463 if (Use.isReg() && TargetRegisterInfo::isVirtualRegister(Use.getReg())) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
464 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg());
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
465 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
466 DEBUG(dbgs() << " *** Cannot move this instruction ***\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
467 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
468 } else {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
469 DEBUG(dbgs() << " *** def is in another block -- safe to move!\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
470 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
471 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
472 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
473
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
474 DEBUG(dbgs() << " Safe to move to the end.\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
475 return true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
476 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
477
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
478 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
479 /// This method checks to ensure the two coalescing candidates follows the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
480 /// expected pattern required for coalescing.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
481 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
482 /// \param[in] SourceRegion The candidate to move statements from
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
483 /// \param[in] TargetRegion The candidate to move statements to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
484 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
485 /// into a block in TargetRegion; false otherwise.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
486 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
487 bool PPCBranchCoalescing::validateCandidates(
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
488 CoalescingCandidateInfo &SourceRegion,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
489 CoalescingCandidateInfo &TargetRegion) const {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
490
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
491 if (TargetRegion.BranchTargetBlock != SourceRegion.BranchBlock)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
492 llvm_unreachable("Expecting SourceRegion to immediately follow TargetRegion");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
493 else if (!MDT->dominates(TargetRegion.BranchBlock, SourceRegion.BranchBlock))
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
494 llvm_unreachable("Expecting TargetRegion to dominate SourceRegion");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
495 else if (!MPDT->dominates(SourceRegion.BranchBlock, TargetRegion.BranchBlock))
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
496 llvm_unreachable("Expecting SourceRegion to post-dominate TargetRegion");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
497 else if (!TargetRegion.FallThroughBlock->empty() ||
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
498 !SourceRegion.FallThroughBlock->empty())
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
499 llvm_unreachable("Expecting fall-through blocks to be empty");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
500
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
501 return true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
502 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
503
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
504 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
505 /// This method determines whether the two coalescing candidates can be merged.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
506 /// In order to be merged, all instructions must be able to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
507 /// 1. Move to the beginning of the SourceRegion.BranchTargetBlock;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
508 /// 2. Move to the end of the TargetRegion.BranchBlock.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
509 /// Merging involves moving the instructions in the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
510 /// TargetRegion.BranchTargetBlock (also SourceRegion.BranchBlock).
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
511 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
512 /// This function first try to move instructions from the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
513 /// TargetRegion.BranchTargetBlock down, to the beginning of the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
514 /// SourceRegion.BranchTargetBlock. This is not possible if any register defined
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
515 /// in TargetRegion.BranchTargetBlock is used in a PHI node in the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
516 /// SourceRegion.BranchTargetBlock. In this case, check whether the statement
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
517 /// can be moved up, to the end of the TargetRegion.BranchBlock (immediately
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
518 /// before the branch statement). If it cannot move, then these blocks cannot
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
519 /// be merged.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
520 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
521 /// Note that there is no analysis for moving instructions past the fall-through
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
522 /// blocks because they are confirmed to be empty. An assert is thrown if they
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
523 /// are not.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
524 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
525 /// \param[in] SourceRegion The candidate to move statements from
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
526 /// \param[in] TargetRegion The candidate to move statements to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
527 /// \return true if all instructions in SourceRegion.BranchBlock can be merged
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
528 /// into a block in TargetRegion, false otherwise.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
529 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
530 bool PPCBranchCoalescing::canMerge(CoalescingCandidateInfo &SourceRegion,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
531 CoalescingCandidateInfo &TargetRegion) const {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
532 if (!validateCandidates(SourceRegion, TargetRegion))
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
533 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
534
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
535 // Walk through PHI nodes first and see if they force the merge into the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
536 // SourceRegion.BranchTargetBlock.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
537 for (MachineBasicBlock::iterator
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
538 I = SourceRegion.BranchBlock->instr_begin(),
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
539 E = SourceRegion.BranchBlock->getFirstNonPHI();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
540 I != E; ++I) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
541 for (auto &Def : I->defs())
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
542 for (auto &Use : MRI->use_instructions(Def.getReg())) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
543 if (Use.isPHI() && Use.getParent() == SourceRegion.BranchTargetBlock) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
544 DEBUG(dbgs() << "PHI " << *I << " defines register used in another "
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
545 "PHI within branch target block -- can't merge\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
546 NumPHINotMoved++;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
547 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
548 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
549 if (Use.getParent() == SourceRegion.BranchBlock) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
550 DEBUG(dbgs() << "PHI " << *I
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
551 << " defines register used in this "
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
552 "block -- all must move down\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
553 SourceRegion.MustMoveDown = true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
554 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
555 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
556 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
557
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
558 // Walk through the MI to see if they should be merged into
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
559 // TargetRegion.BranchBlock (up) or SourceRegion.BranchTargetBlock (down)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
560 for (MachineBasicBlock::iterator
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
561 I = SourceRegion.BranchBlock->getFirstNonPHI(),
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
562 E = SourceRegion.BranchBlock->end();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
563 I != E; ++I) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
564 if (!canMoveToBeginning(*I, *SourceRegion.BranchTargetBlock)) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
565 DEBUG(dbgs() << "Instruction " << *I
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
566 << " cannot move down - must move up!\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
567 SourceRegion.MustMoveUp = true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
568 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
569 if (!canMoveToEnd(*I, *TargetRegion.BranchBlock)) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
570 DEBUG(dbgs() << "Instruction " << *I
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
571 << " cannot move up - must move down!\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
572 SourceRegion.MustMoveDown = true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
573 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
574 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
575
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
576 return (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) ? false : true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
577 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
578
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
579 /// Merge the instructions from SourceRegion.BranchBlock,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
580 /// SourceRegion.BranchTargetBlock, and SourceRegion.FallThroughBlock into
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
581 /// TargetRegion.BranchBlock, TargetRegion.BranchTargetBlock and
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
582 /// TargetRegion.FallThroughBlock respectively.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
583 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
584 /// The successors for blocks in TargetRegion will be updated to use the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
585 /// successors from blocks in SourceRegion. Finally, the blocks in SourceRegion
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
586 /// will be removed from the function.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
587 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
588 /// A region consists of a BranchBlock, a FallThroughBlock, and a
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
589 /// BranchTargetBlock. Branch coalesce works on patterns where the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
590 /// TargetRegion's BranchTargetBlock must also be the SourceRegions's
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
591 /// BranchBlock.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
592 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
593 /// Before mergeCandidates:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
594 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
595 /// +---------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
596 /// | TargetRegion.BranchBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
597 /// +---------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
598 /// / |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
599 /// / +--------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
600 /// | | TargetRegion.FallThroughBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
601 /// \ +--------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
602 /// \ |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
603 /// +----------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
604 /// | TargetRegion.BranchTargetBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
605 /// | SourceRegion.BranchBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
606 /// +----------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
607 /// / |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
608 /// / +--------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
609 /// | | SourceRegion.FallThroughBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
610 /// \ +--------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
611 /// \ |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
612 /// +----------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
613 /// | SourceRegion.BranchTargetBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
614 /// +----------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
615 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
616 /// After mergeCandidates:
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
617 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
618 /// +-----------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
619 /// | TargetRegion.BranchBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
620 /// | SourceRegion.BranchBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
621 /// +-----------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
622 /// / |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
623 /// / +---------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
624 /// | | TargetRegion.FallThroughBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
625 /// | | SourceRegion.FallThroughBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
626 /// \ +---------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
627 /// \ |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
628 /// +----------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
629 /// | SourceRegion.BranchTargetBlock |
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
630 /// +----------------------------------+
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
631 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
632 /// \param[in] SourceRegion The candidate to move blocks from
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
633 /// \param[in] TargetRegion The candidate to move blocks to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
634 ///
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
635 bool PPCBranchCoalescing::mergeCandidates(CoalescingCandidateInfo &SourceRegion,
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
636 CoalescingCandidateInfo &TargetRegion) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
637
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
638 if (SourceRegion.MustMoveUp && SourceRegion.MustMoveDown) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
639 llvm_unreachable("Cannot have both MustMoveDown and MustMoveUp set!");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
640 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
641 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
642
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
643 if (!validateCandidates(SourceRegion, TargetRegion))
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
644 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
645
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
646 // Start the merging process by first handling the BranchBlock.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
647 // Move any PHIs in SourceRegion.BranchBlock down to the branch-taken block
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
648 moveAndUpdatePHIs(SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
649
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
650 // Move remaining instructions in SourceRegion.BranchBlock into
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
651 // TargetRegion.BranchBlock
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
652 MachineBasicBlock::iterator firstInstr =
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
653 SourceRegion.BranchBlock->getFirstNonPHI();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
654 MachineBasicBlock::iterator lastInstr =
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
655 SourceRegion.BranchBlock->getFirstTerminator();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
656
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
657 MachineBasicBlock *Source = SourceRegion.MustMoveDown
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
658 ? SourceRegion.BranchTargetBlock
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
659 : TargetRegion.BranchBlock;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
660
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
661 MachineBasicBlock::iterator Target =
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
662 SourceRegion.MustMoveDown
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
663 ? SourceRegion.BranchTargetBlock->getFirstNonPHI()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
664 : TargetRegion.BranchBlock->getFirstTerminator();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
665
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
666 Source->splice(Target, SourceRegion.BranchBlock, firstInstr, lastInstr);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
667
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
668 // Once PHI and instructions have been moved we need to clean up the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
669 // control flow.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
670
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
671 // Remove SourceRegion.FallThroughBlock before transferring successors of
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
672 // SourceRegion.BranchBlock to TargetRegion.BranchBlock.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
673 SourceRegion.BranchBlock->removeSuccessor(SourceRegion.FallThroughBlock);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
674 TargetRegion.BranchBlock->transferSuccessorsAndUpdatePHIs(
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
675 SourceRegion.BranchBlock);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
676 // Update branch in TargetRegion.BranchBlock to jump to
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
677 // SourceRegion.BranchTargetBlock
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
678 // In this case, TargetRegion.BranchTargetBlock == SourceRegion.BranchBlock.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
679 TargetRegion.BranchBlock->ReplaceUsesOfBlockWith(
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
680 SourceRegion.BranchBlock, SourceRegion.BranchTargetBlock);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
681 // Remove the branch statement(s) in SourceRegion.BranchBlock
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
682 MachineBasicBlock::iterator I =
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
683 SourceRegion.BranchBlock->terminators().begin();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
684 while (I != SourceRegion.BranchBlock->terminators().end()) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
685 MachineInstr &CurrInst = *I;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
686 ++I;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
687 if (CurrInst.isBranch())
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
688 CurrInst.eraseFromParent();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
689 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
690
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
691 // Fall-through block should be empty since this is part of the condition
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
692 // to coalesce the branches.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
693 assert(TargetRegion.FallThroughBlock->empty() &&
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
694 "FallThroughBlocks should be empty!");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
695
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
696 // Transfer successor information and move PHIs down to the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
697 // branch-taken block.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
698 TargetRegion.FallThroughBlock->transferSuccessorsAndUpdatePHIs(
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
699 SourceRegion.FallThroughBlock);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
700 TargetRegion.FallThroughBlock->removeSuccessor(SourceRegion.BranchBlock);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
701
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
702 // Remove the blocks from the function.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
703 assert(SourceRegion.BranchBlock->empty() &&
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
704 "Expecting branch block to be empty!");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
705 SourceRegion.BranchBlock->eraseFromParent();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
706
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
707 assert(SourceRegion.FallThroughBlock->empty() &&
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
708 "Expecting fall-through block to be empty!\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
709 SourceRegion.FallThroughBlock->eraseFromParent();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
710
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
711 NumBlocksCoalesced++;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
712 return true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
713 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
714
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
715 bool PPCBranchCoalescing::runOnMachineFunction(MachineFunction &MF) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
716
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
717 if (skipFunction(*MF.getFunction()) || MF.empty())
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
718 return false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
719
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
720 bool didSomething = false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
721
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
722 DEBUG(dbgs() << "******** Branch Coalescing ********\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
723 initialize(MF);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
724
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
725 DEBUG(dbgs() << "Function: "; MF.dump(); dbgs() << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
726
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
727 CoalescingCandidateInfo Cand1, Cand2;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
728 // Walk over blocks and find candidates to merge
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
729 // Continue trying to merge with the first candidate found, as long as merging
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
730 // is successfull.
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
731 for (MachineBasicBlock &MBB : MF) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
732 bool MergedCandidates = false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
733 do {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
734 MergedCandidates = false;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
735 Cand1.clear();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
736 Cand2.clear();
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
737
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
738 Cand1.BranchBlock = &MBB;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
739
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
740 // If unable to coalesce the branch, then continue to next block
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
741 if (!canCoalesceBranch(Cand1))
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
742 break;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
743
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
744 Cand2.BranchBlock = Cand1.BranchTargetBlock;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
745 if (!canCoalesceBranch(Cand2))
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
746 break;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
747
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
748 // Sanity check
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
749 // The branch-taken block of the second candidate should post-dominate the
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
750 // first candidate
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
751 assert(MPDT->dominates(Cand2.BranchTargetBlock, Cand1.BranchBlock) &&
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
752 "Branch-taken block should post-dominate first candidate");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
753
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
754 if (!identicalOperands(Cand1.Cond, Cand2.Cond)) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
755 DEBUG(dbgs() << "Blocks " << Cand1.BranchBlock->getNumber() << " and "
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
756 << Cand2.BranchBlock->getNumber()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
757 << " have different branches\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
758 break;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
759 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
760 if (!canMerge(Cand2, Cand1)) {
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
761 DEBUG(dbgs() << "Cannot merge blocks " << Cand1.BranchBlock->getNumber()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
762 << " and " << Cand2.BranchBlock->getNumber() << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
763 NumBlocksNotCoalesced++;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
764 continue;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
765 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
766 DEBUG(dbgs() << "Merging blocks " << Cand1.BranchBlock->getNumber()
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
767 << " and " << Cand1.BranchTargetBlock->getNumber() << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
768 MergedCandidates = mergeCandidates(Cand2, Cand1);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
769 if (MergedCandidates)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
770 didSomething = true;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
771
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
772 DEBUG(dbgs() << "Function after merging: "; MF.dump(); dbgs() << "\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
773 } while (MergedCandidates);
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
774 }
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
775
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
776 #ifndef NDEBUG
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
777 // Verify MF is still valid after branch coalescing
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
778 if (didSomething)
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
779 MF.verify(nullptr, "Error in code produced by branch coalescing");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
780 #endif // NDEBUG
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
781
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
782 DEBUG(dbgs() << "Finished Branch Coalescing\n");
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
783 return didSomething;
803732b1fca8 LLVM 5.0
kono
parents:
diff changeset
784 }