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annotate lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 //===-- X86DisassemblerDecoderCommon.h - Disassembler decoder ---*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file is part of the X86 Disassembler.
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11 // It contains common definitions used by both the disassembler and the table
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12 // generator.
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13 // Documentation for the disassembler can be found in X86Disassembler.h.
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14 //
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15 //===----------------------------------------------------------------------===//
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16
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17 #ifndef LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODERCOMMON_H
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18 #define LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODERCOMMON_H
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19
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20 #include "llvm/Support/DataTypes.h"
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21
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22 namespace llvm {
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23 namespace X86Disassembler {
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24
0
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25 #define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers
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26 #define CONTEXTS_SYM x86DisassemblerContexts
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27 #define ONEBYTE_SYM x86DisassemblerOneByteOpcodes
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28 #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
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29 #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
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30 #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
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31 #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
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32 #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
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33 #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
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34
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35 #define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers"
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36 #define CONTEXTS_STR "x86DisassemblerContexts"
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37 #define ONEBYTE_STR "x86DisassemblerOneByteOpcodes"
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38 #define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes"
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39 #define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes"
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40 #define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
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41 #define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes"
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42 #define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes"
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43 #define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes"
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44
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45 // Attributes of an instruction that must be known before the opcode can be
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46 // processed correctly. Most of these indicate the presence of particular
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47 // prefixes, but ATTR_64BIT is simply an attribute of the decoding context.
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48 #define ATTRIBUTE_BITS \
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49 ENUM_ENTRY(ATTR_NONE, 0x00) \
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50 ENUM_ENTRY(ATTR_64BIT, (0x1 << 0)) \
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51 ENUM_ENTRY(ATTR_XS, (0x1 << 1)) \
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52 ENUM_ENTRY(ATTR_XD, (0x1 << 2)) \
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53 ENUM_ENTRY(ATTR_REXW, (0x1 << 3)) \
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54 ENUM_ENTRY(ATTR_OPSIZE, (0x1 << 4)) \
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55 ENUM_ENTRY(ATTR_ADSIZE, (0x1 << 5)) \
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56 ENUM_ENTRY(ATTR_VEX, (0x1 << 6)) \
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57 ENUM_ENTRY(ATTR_VEXL, (0x1 << 7)) \
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58 ENUM_ENTRY(ATTR_EVEX, (0x1 << 8)) \
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59 ENUM_ENTRY(ATTR_EVEXL, (0x1 << 9)) \
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60 ENUM_ENTRY(ATTR_EVEXL2, (0x1 << 10)) \
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61 ENUM_ENTRY(ATTR_EVEXK, (0x1 << 11)) \
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62 ENUM_ENTRY(ATTR_EVEXKZ, (0x1 << 12)) \
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63 ENUM_ENTRY(ATTR_EVEXB, (0x1 << 13))
0
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64
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65 #define ENUM_ENTRY(n, v) n = v,
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66 enum attributeBits {
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67 ATTRIBUTE_BITS
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68 ATTR_max
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69 };
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70 #undef ENUM_ENTRY
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71
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72 // Combinations of the above attributes that are relevant to instruction
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73 // decode. Although other combinations are possible, they can be reduced to
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74 // these without affecting the ultimately decoded instruction.
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76 // Class name Rank Rationale for rank assignment
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77 #define INSTRUCTION_CONTEXTS \
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78 ENUM_ENTRY(IC, 0, "says nothing about the instruction") \
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79 ENUM_ENTRY(IC_64BIT, 1, "says the instruction applies in " \
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80 "64-bit mode but no more") \
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81 ENUM_ENTRY(IC_OPSIZE, 3, "requires an OPSIZE prefix, so " \
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82 "operands change width") \
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83 ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \
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84 "operands change width") \
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85 ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \
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86 ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \
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87 "but not the operands") \
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88 ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \
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89 "but not the operands") \
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90 ENUM_ENTRY(IC_XD_OPSIZE, 3, "requires an OPSIZE prefix, so " \
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91 "operands change width") \
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92 ENUM_ENTRY(IC_XS_OPSIZE, 3, "requires an OPSIZE prefix, so " \
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93 "operands change width") \
83
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94 ENUM_ENTRY(IC_64BIT_REXW, 5, "requires a REX.W prefix, so operands "\
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95 "change width; overrides IC_OPSIZE") \
83
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96 ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \
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97 "prefix") \
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98 ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE") \
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99 ENUM_ENTRY(IC_64BIT_ADSIZE, 3, "Just as meaningful as IC_ADSIZE") \
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100 ENUM_ENTRY(IC_64BIT_OPSIZE_ADSIZE, 4, "Just as meaningful as IC_OPSIZE/" \
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101 "IC_ADSIZE") \
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102 ENUM_ENTRY(IC_64BIT_XD, 6, "XD instructions are SSE; REX.W is " \
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103 "secondary") \
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104 ENUM_ENTRY(IC_64BIT_XS, 6, "Just as meaningful as IC_64BIT_XD") \
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105 ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE") \
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106 ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE") \
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107 ENUM_ENTRY(IC_64BIT_REXW_XS, 7, "OPSIZE could mean a different " \
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108 "opcode") \
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109 ENUM_ENTRY(IC_64BIT_REXW_XD, 7, "Just as meaningful as " \
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110 "IC_64BIT_REXW_XS") \
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111 ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 8, "The Dynamic Duo! Prefer over all " \
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112 "else because this changes most " \
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113 "operands' meaning") \
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114 ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \
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115 ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
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116 ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
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117 ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
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diff changeset
118 ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
119 ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
120 ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
121 ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
122 ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
123 ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
124 ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
125 ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
126 ENUM_ENTRY(IC_VEX_L_W, 4, "requires VEX, L and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
127 ENUM_ENTRY(IC_VEX_L_W_XS, 5, "requires VEX, L, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
128 ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
129 ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130 ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132 ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 ENUM_ENTRY(IC_EVEX_L, 3, "requires EVEX and the L prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 ENUM_ENTRY(IC_EVEX_L_XS, 4, "requires EVEX and the L and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 ENUM_ENTRY(IC_EVEX_L_XD, 4, "requires EVEX and the L and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 ENUM_ENTRY(IC_EVEX_L_OPSIZE, 4, "requires EVEX, L, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 ENUM_ENTRY(IC_EVEX_L_W, 3, "requires EVEX, L and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 ENUM_ENTRY(IC_EVEX_L_W_XS, 4, "requires EVEX, L, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 ENUM_ENTRY(IC_EVEX_L_W_XD, 4, "requires EVEX, L, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE, 4, "requires EVEX, L, W and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 ENUM_ENTRY(IC_EVEX_L2, 3, "requires EVEX and the L2 prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 ENUM_ENTRY(IC_EVEX_L2_XS, 4, "requires EVEX and the L2 and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 ENUM_ENTRY(IC_EVEX_L2_XD, 4, "requires EVEX and the L2 and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 ENUM_ENTRY(IC_EVEX_L2_OPSIZE, 4, "requires EVEX, L2, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 ENUM_ENTRY(IC_EVEX_L2_W, 3, "requires EVEX, L2 and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 ENUM_ENTRY(IC_EVEX_L2_W_XS, 4, "requires EVEX, L2, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 ENUM_ENTRY(IC_EVEX_L2_W_XD, 4, "requires EVEX, L2, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE, 4, "requires EVEX, L2, W and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 ENUM_ENTRY(IC_EVEX_K, 1, "requires an EVEX_K prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 ENUM_ENTRY(IC_EVEX_XS_K, 2, "requires EVEX_K and the XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 ENUM_ENTRY(IC_EVEX_XD_K, 2, "requires EVEX_K and the XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 ENUM_ENTRY(IC_EVEX_OPSIZE_K, 2, "requires EVEX_K and the OpSize prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 ENUM_ENTRY(IC_EVEX_W_K, 3, "requires EVEX_K and the W prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 ENUM_ENTRY(IC_EVEX_W_XS_K, 4, "requires EVEX_K, W, and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 ENUM_ENTRY(IC_EVEX_W_XD_K, 4, "requires EVEX_K, W, and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 ENUM_ENTRY(IC_EVEX_W_OPSIZE_K, 4, "requires EVEX_K, W, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 ENUM_ENTRY(IC_EVEX_L_K, 3, "requires EVEX_K and the L prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 ENUM_ENTRY(IC_EVEX_L_XS_K, 4, "requires EVEX_K and the L and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 ENUM_ENTRY(IC_EVEX_L_XD_K, 4, "requires EVEX_K and the L and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 ENUM_ENTRY(IC_EVEX_L_OPSIZE_K, 4, "requires EVEX_K, L, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 ENUM_ENTRY(IC_EVEX_L_W_K, 3, "requires EVEX_K, L and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 ENUM_ENTRY(IC_EVEX_L_W_XS_K, 4, "requires EVEX_K, L, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 ENUM_ENTRY(IC_EVEX_L_W_XD_K, 4, "requires EVEX_K, L, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K, 4, "requires EVEX_K, L, W and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 ENUM_ENTRY(IC_EVEX_L2_K, 3, "requires EVEX_K and the L2 prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 ENUM_ENTRY(IC_EVEX_L2_XS_K, 4, "requires EVEX_K and the L2 and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 ENUM_ENTRY(IC_EVEX_L2_XD_K, 4, "requires EVEX_K and the L2 and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K, 4, "requires EVEX_K, L2, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 ENUM_ENTRY(IC_EVEX_L2_W_K, 3, "requires EVEX_K, L2 and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 ENUM_ENTRY(IC_EVEX_L2_W_XS_K, 4, "requires EVEX_K, L2, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178 ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 ENUM_ENTRY(IC_EVEX_L_B, 3, "requires EVEX_B and the L prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 ENUM_ENTRY(IC_EVEX_L_XS_B, 4, "requires EVEX_B and the L and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 ENUM_ENTRY(IC_EVEX_L_XD_B, 4, "requires EVEX_B and the L and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 ENUM_ENTRY(IC_EVEX_L_OPSIZE_B, 4, "requires EVEX_B, L, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 ENUM_ENTRY(IC_EVEX_L_W_B, 3, "requires EVEX_B, L and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 ENUM_ENTRY(IC_EVEX_L_W_XS_B, 4, "requires EVEX_B, L, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 ENUM_ENTRY(IC_EVEX_L_W_XD_B, 4, "requires EVEX_B, L, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B, 4, "requires EVEX_B, L, W and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 ENUM_ENTRY(IC_EVEX_L2_B, 3, "requires EVEX_B and the L2 prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 ENUM_ENTRY(IC_EVEX_L2_XS_B, 4, "requires EVEX_B and the L2 and XS prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 ENUM_ENTRY(IC_EVEX_L2_XD_B, 4, "requires EVEX_B and the L2 and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B, 4, "requires EVEX_B, L2, and OpSize") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 ENUM_ENTRY(IC_EVEX_L2_W_B, 3, "requires EVEX_B, L2 and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 ENUM_ENTRY(IC_EVEX_L2_W_XS_B, 4, "requires EVEX_B, L2, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 ENUM_ENTRY(IC_EVEX_L2_W_XD_B, 4, "requires EVEX_B, L2, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4, "requires EVEX_B, L2, W and OpSize") \
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
202 ENUM_ENTRY(IC_EVEX_K_B, 1, "requires EVEX_B and EVEX_K prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
203 ENUM_ENTRY(IC_EVEX_XS_K_B, 2, "requires EVEX_B, EVEX_K and the XS prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
204 ENUM_ENTRY(IC_EVEX_XD_K_B, 2, "requires EVEX_B, EVEX_K and the XD prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
205 ENUM_ENTRY(IC_EVEX_OPSIZE_K_B, 2, "requires EVEX_B, EVEX_K and the OpSize prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
206 ENUM_ENTRY(IC_EVEX_W_K_B, 3, "requires EVEX_B, EVEX_K and the W prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
207 ENUM_ENTRY(IC_EVEX_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, W, and XS prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
208 ENUM_ENTRY(IC_EVEX_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, W, and XD prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
209 ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, W, and OpSize") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
210 ENUM_ENTRY(IC_EVEX_L_K_B, 3, "requires EVEX_B, EVEX_K and the L prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
211 ENUM_ENTRY(IC_EVEX_L_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L and XS prefix")\
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
212 ENUM_ENTRY(IC_EVEX_L_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L and XD prefix")\
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
213 ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L, and OpSize") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
214 ENUM_ENTRY(IC_EVEX_L_W_K_B, 3, "requires EVEX_B, EVEX_K, L and W") \
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parents: 0
diff changeset
215 ENUM_ENTRY(IC_EVEX_L_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
216 ENUM_ENTRY(IC_EVEX_L_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XD prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
217 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L, W and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
218 ENUM_ENTRY(IC_EVEX_L2_K_B, 3, "requires EVEX_B, EVEX_K and the L2 prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
219 ENUM_ENTRY(IC_EVEX_L2_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XS prefix")\
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
220 ENUM_ENTRY(IC_EVEX_L2_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XD prefix")\
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
221 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L2, and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
222 ENUM_ENTRY(IC_EVEX_L2_W_K_B, 3, "requires EVEX_B, EVEX_K, L2 and W") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
223 ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
224 ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XD prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
225 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L2, W and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
226 ENUM_ENTRY(IC_EVEX_KZ_B, 1, "requires EVEX_B and EVEX_KZ prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
227 ENUM_ENTRY(IC_EVEX_XS_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
228 ENUM_ENTRY(IC_EVEX_XD_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XD prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
229 ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the OpSize prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
230 ENUM_ENTRY(IC_EVEX_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the W prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
231 ENUM_ENTRY(IC_EVEX_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
232 ENUM_ENTRY(IC_EVEX_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XD prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
233 ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and OpSize") \
0
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parents:
diff changeset
234 ENUM_ENTRY(IC_EVEX_L_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L prefix") \
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parents:
diff changeset
235 ENUM_ENTRY(IC_EVEX_L_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XS prefix")\
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 ENUM_ENTRY(IC_EVEX_L_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XD prefix")\
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 ENUM_ENTRY(IC_EVEX_L_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L and W") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XS prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XD prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 ENUM_ENTRY(IC_EVEX_L2_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L2 prefix") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\
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parents:
diff changeset
245 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 ENUM_ENTRY(IC_EVEX_L2_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L2 and W") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XD prefix") \
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parents:
diff changeset
249 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 ENUM_ENTRY(IC_EVEX_KZ, 1, "requires an EVEX_KZ prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 ENUM_ENTRY(IC_EVEX_XS_KZ, 2, "requires EVEX_KZ and the XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 ENUM_ENTRY(IC_EVEX_XD_KZ, 2, "requires EVEX_KZ and the XD prefix") \
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parents:
diff changeset
253 ENUM_ENTRY(IC_EVEX_OPSIZE_KZ, 2, "requires EVEX_KZ and the OpSize prefix") \
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parents:
diff changeset
254 ENUM_ENTRY(IC_EVEX_W_KZ, 3, "requires EVEX_KZ and the W prefix") \
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parents:
diff changeset
255 ENUM_ENTRY(IC_EVEX_W_XS_KZ, 4, "requires EVEX_KZ, W, and XS prefix") \
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parents:
diff changeset
256 ENUM_ENTRY(IC_EVEX_W_XD_KZ, 4, "requires EVEX_KZ, W, and XD prefix") \
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parents:
diff changeset
257 ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ, 4, "requires EVEX_KZ, W, and OpSize") \
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parents:
diff changeset
258 ENUM_ENTRY(IC_EVEX_L_KZ, 3, "requires EVEX_KZ and the L prefix") \
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parents:
diff changeset
259 ENUM_ENTRY(IC_EVEX_L_XS_KZ, 4, "requires EVEX_KZ and the L and XS prefix")\
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parents:
diff changeset
260 ENUM_ENTRY(IC_EVEX_L_XD_KZ, 4, "requires EVEX_KZ and the L and XD prefix")\
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parents:
diff changeset
261 ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ, 4, "requires EVEX_KZ, L, and OpSize") \
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parents:
diff changeset
262 ENUM_ENTRY(IC_EVEX_L_W_KZ, 3, "requires EVEX_KZ, L and W") \
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parents:
diff changeset
263 ENUM_ENTRY(IC_EVEX_L_W_XS_KZ, 4, "requires EVEX_KZ, L, W and XS prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 ENUM_ENTRY(IC_EVEX_L_W_XD_KZ, 4, "requires EVEX_KZ, L, W and XD prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
265 ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L, W and OpSize") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
266 ENUM_ENTRY(IC_EVEX_L2_KZ, 3, "requires EVEX_KZ and the L2 prefix") \
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 ENUM_ENTRY(IC_EVEX_L2_XS_KZ, 4, "requires EVEX_KZ and the L2 and XS prefix")\
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parents:
diff changeset
268 ENUM_ENTRY(IC_EVEX_L2_XD_KZ, 4, "requires EVEX_KZ and the L2 and XD prefix")\
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parents:
diff changeset
269 ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, and OpSize") \
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parents:
diff changeset
270 ENUM_ENTRY(IC_EVEX_L2_W_KZ, 3, "requires EVEX_KZ, L2 and W") \
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parents:
diff changeset
271 ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ, 4, "requires EVEX_KZ, L2, W and XS prefix") \
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parents:
diff changeset
272 ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ, 4, "requires EVEX_KZ, L2, W and XD prefix") \
77
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parents: 0
diff changeset
273 ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, W and OpSize")
0
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parents:
diff changeset
274
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parents:
diff changeset
275 #define ENUM_ENTRY(n, r, d) n,
77
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parents: 0
diff changeset
276 enum InstructionContext {
0
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parents:
diff changeset
277 INSTRUCTION_CONTEXTS
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parents:
diff changeset
278 IC_max
77
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parents: 0
diff changeset
279 };
0
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parents:
diff changeset
280 #undef ENUM_ENTRY
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diff changeset
281
77
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parents: 0
diff changeset
282 // Opcode types, which determine which decode table to use, both in the Intel
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parents: 0
diff changeset
283 // manual and also for the decoder.
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parents: 0
diff changeset
284 enum OpcodeType {
0
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parents:
diff changeset
285 ONEBYTE = 0,
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parents:
diff changeset
286 TWOBYTE = 1,
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parents:
diff changeset
287 THREEBYTE_38 = 2,
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parents:
diff changeset
288 THREEBYTE_3A = 3,
77
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parents: 0
diff changeset
289 XOP8_MAP = 4,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
290 XOP9_MAP = 5,
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parents: 0
diff changeset
291 XOPA_MAP = 6
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parents: 0
diff changeset
292 };
0
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parents:
diff changeset
293
77
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parents: 0
diff changeset
294 // The following structs are used for the hierarchical decode table. After
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parents: 0
diff changeset
295 // determining the instruction's class (i.e., which IC_* constant applies to
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parents: 0
diff changeset
296 // it), the decoder reads the opcode. Some instructions require specific
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
297 // values of the ModR/M byte, so the ModR/M byte indexes into the final table.
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parents: 0
diff changeset
298 //
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parents: 0
diff changeset
299 // If a ModR/M byte is not required, "required" is left unset, and the values
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
300 // for each instructionID are identical.
0
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parents:
diff changeset
301 typedef uint16_t InstrUID;
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parents:
diff changeset
302
77
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parents: 0
diff changeset
303 // ModRMDecisionType - describes the type of ModR/M decision, allowing the
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
304 // consumer to determine the number of entries in it.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
305 //
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parents: 0
diff changeset
306 // MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
307 // instruction is the same.
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parents: 0
diff changeset
308 // MODRM_SPLITRM - If the ModR/M byte is between 0x00 and 0xbf, the opcode
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
309 // corresponds to one instruction; otherwise, it corresponds to
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
310 // a different instruction.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
311 // MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
312 // divided by 8 is used to select instruction; otherwise, each
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
313 // value of the ModR/M byte could correspond to a different
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
314 // instruction.
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parents: 0
diff changeset
315 // MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
316 // corresponds to instructions that use reg field as opcode
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
317 // MODRM_FULL - Potentially, each value of the ModR/M byte could correspond
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
318 // to a different instruction.
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 #define MODRMTYPES \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 ENUM_ENTRY(MODRM_ONEENTRY) \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 ENUM_ENTRY(MODRM_SPLITRM) \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 ENUM_ENTRY(MODRM_SPLITMISC) \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
323 ENUM_ENTRY(MODRM_SPLITREG) \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 ENUM_ENTRY(MODRM_FULL)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
325
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 #define ENUM_ENTRY(n) n,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
327 enum ModRMDecisionType {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 MODRMTYPES
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
329 MODRM_max
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
330 };
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
331 #undef ENUM_ENTRY
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
332
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
333 #define CASE_ENCODING_RM \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
334 case ENCODING_RM: \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
335 case ENCODING_RM_CD2: \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
336 case ENCODING_RM_CD4: \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
337 case ENCODING_RM_CD8: \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
338 case ENCODING_RM_CD16: \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
339 case ENCODING_RM_CD32: \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
340 case ENCODING_RM_CD64
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
341
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
342 #define CASE_ENCODING_VSIB \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
343 case ENCODING_VSIB: \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
344 case ENCODING_VSIB_CD2: \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
345 case ENCODING_VSIB_CD4: \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
346 case ENCODING_VSIB_CD8: \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
347 case ENCODING_VSIB_CD16: \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
348 case ENCODING_VSIB_CD32: \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
349 case ENCODING_VSIB_CD64
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
350
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
351 // Physical encodings of instruction operands.
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
352 #define ENCODINGS \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
353 ENUM_ENTRY(ENCODING_NONE, "") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
354 ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.") \
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
356 ENUM_ENTRY(ENCODING_RM_CD2, "R/M operand with CDisp scaling of 2") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
357 ENUM_ENTRY(ENCODING_RM_CD4, "R/M operand with CDisp scaling of 4") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
358 ENUM_ENTRY(ENCODING_RM_CD8, "R/M operand with CDisp scaling of 8") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
359 ENUM_ENTRY(ENCODING_RM_CD16,"R/M operand with CDisp scaling of 16") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
360 ENUM_ENTRY(ENCODING_RM_CD32,"R/M operand with CDisp scaling of 32") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
361 ENUM_ENTRY(ENCODING_RM_CD64,"R/M operand with CDisp scaling of 64") \
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
362 ENUM_ENTRY(ENCODING_VSIB, "VSIB operand in ModR/M byte.") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
363 ENUM_ENTRY(ENCODING_VSIB_CD2, "VSIB operand with CDisp scaling of 2") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
364 ENUM_ENTRY(ENCODING_VSIB_CD4, "VSIB operand with CDisp scaling of 4") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
365 ENUM_ENTRY(ENCODING_VSIB_CD8, "VSIB operand with CDisp scaling of 8") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
366 ENUM_ENTRY(ENCODING_VSIB_CD16,"VSIB operand with CDisp scaling of 16") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
367 ENUM_ENTRY(ENCODING_VSIB_CD32,"VSIB operand with CDisp scaling of 32") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
368 ENUM_ENTRY(ENCODING_VSIB_CD64,"VSIB operand with CDisp scaling of 64") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
369 ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
370 ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
372 ENUM_ENTRY(ENCODING_IW, "2-byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
373 ENUM_ENTRY(ENCODING_ID, "4-byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
374 ENUM_ENTRY(ENCODING_IO, "8-byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 ENUM_ENTRY(ENCODING_RB, "(AL..DIL, R8L..R15L) Register code added to " \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
376 "the opcode byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
377 ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)") \
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
380 ENUM_ENTRY(ENCODING_FP, "Position on floating-point stack in ModR/M " \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
381 "byte.") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
384 ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
385 ENUM_ENTRY(ENCODING_IRC, "Immediate for static rounding control") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 ENUM_ENTRY(ENCODING_Rv, "Register code of operand size added to the " \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 "opcode byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
388 ENUM_ENTRY(ENCODING_DUP, "Duplicate of another operand; ID is encoded " \
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
389 "in type") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
390 ENUM_ENTRY(ENCODING_SI, "Source index; encoded in OpSize/Adsize prefix") \
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
391 ENUM_ENTRY(ENCODING_DI, "Destination index; encoded in prefixes")
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
392
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
393 #define ENUM_ENTRY(n, d) n,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
394 enum OperandEncoding {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
395 ENCODINGS
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
396 ENCODING_max
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
397 };
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 #undef ENUM_ENTRY
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
399
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
400 // Semantic interpretations of instruction operands.
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
401 #define TYPES \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 ENUM_ENTRY(TYPE_NONE, "") \
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
403 ENUM_ENTRY(TYPE_REL, "immediate address") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 ENUM_ENTRY(TYPE_R8, "1-byte register operand") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
405 ENUM_ENTRY(TYPE_R16, "2-byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 ENUM_ENTRY(TYPE_R32, "4-byte") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
407 ENUM_ENTRY(TYPE_R64, "8-byte") \
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
408 ENUM_ENTRY(TYPE_IMM, "immediate operand") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
409 ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
410 ENUM_ENTRY(TYPE_IMM5, "1-byte immediate operand between 0 and 31") \
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
411 ENUM_ENTRY(TYPE_AVX512ICC, "1-byte immediate operand for AVX512 icmp") \
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
412 ENUM_ENTRY(TYPE_UIMM8, "1-byte unsigned immediate operand") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
413 ENUM_ENTRY(TYPE_M, "Memory operand") \
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
414 ENUM_ENTRY(TYPE_MVSIBX, "Memory operand using XMM index") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
415 ENUM_ENTRY(TYPE_MVSIBY, "Memory operand using YMM index") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
416 ENUM_ENTRY(TYPE_MVSIBZ, "Memory operand using ZMM index") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
417 ENUM_ENTRY(TYPE_SRCIDX, "memory at source index") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
418 ENUM_ENTRY(TYPE_DSTIDX, "memory at destination index") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
419 ENUM_ENTRY(TYPE_MOFFS, "memory offset (relative to segment base)") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
420 ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack") \
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
421 ENUM_ENTRY(TYPE_MM64, "8-byte MMX register") \
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
422 ENUM_ENTRY(TYPE_XMM, "16-byte") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
423 ENUM_ENTRY(TYPE_YMM, "32-byte") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
424 ENUM_ENTRY(TYPE_ZMM, "64-byte") \
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
425 ENUM_ENTRY(TYPE_VK, "mask register") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
426 ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
427 ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand") \
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
429 ENUM_ENTRY(TYPE_BNDR, "MPX bounds register") \
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 ENUM_ENTRY(TYPE_Rv, "Register operand of operand size") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 ENUM_ENTRY(TYPE_DUP1, "operand 1") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 ENUM_ENTRY(TYPE_DUP2, "operand 2") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 ENUM_ENTRY(TYPE_DUP3, "operand 3") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 ENUM_ENTRY(TYPE_DUP4, "operand 4") \
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
438
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 #define ENUM_ENTRY(n, d) n,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
440 enum OperandType {
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 TYPES
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
442 TYPE_max
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
443 };
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 #undef ENUM_ENTRY
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
445
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
446 /// \brief The specification for how to extract and interpret one operand.
0
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447 struct OperandSpecifier {
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448 uint8_t encoding;
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449 uint8_t type;
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450 };
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451
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452 static const unsigned X86_MAX_OPERANDS = 6;
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453
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454 /// Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode
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455 /// are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
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456 /// respectively.
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457 enum DisassemblerMode {
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458 MODE_16BIT,
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459 MODE_32BIT,
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460 MODE_64BIT
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461 };
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462
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463 } // namespace X86Disassembler
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464 } // namespace llvm
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465
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466 #endif