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annotate test/CodeGen/ARM/cmpxchg-weak.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s
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2
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3 define void @test_cmpxchg_weak(i32 *%addr, i32 %desired, i32 %new) {
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4 ; CHECK-LABEL: test_cmpxchg_weak:
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6 %pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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7 %oldval = extractvalue { i32, i1 } %pair, 0
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8 ; CHECK-NEXT: BB#0:
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9 ; CHECK-NEXT: ldrex [[LOADED:r[0-9]+]], [r0]
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10 ; CHECK-NEXT: cmp [[LOADED]], r1
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11 ; CHECK-NEXT: bne [[LDFAILBB:LBB[0-9]+_[0-9]+]]
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12 ; CHECK-NEXT: BB#1:
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13 ; CHECK-NEXT: dmb ish
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14 ; CHECK-NEXT: strex [[SUCCESS:r[0-9]+]], r2, [r0]
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15 ; CHECK-NEXT: cmp [[SUCCESS]], #0
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16 ; CHECK-NEXT: beq [[SUCCESSBB:LBB[0-9]+_[0-9]+]]
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17 ; CHECK-NEXT: BB#2:
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18 ; CHECK-NEXT: str r3, [r0]
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19 ; CHECK-NEXT: bx lr
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20 ; CHECK-NEXT: [[LDFAILBB]]:
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21 ; CHECK-NEXT: clrex
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22 ; CHECK-NEXT: str r3, [r0]
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23 ; CHECK-NEXT: bx lr
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24 ; CHECK-NEXT: [[SUCCESSBB]]:
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25 ; CHECK-NEXT: dmb ish
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26 ; CHECK-NEXT: str r3, [r0]
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27 ; CHECK-NEXT: bx lr
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29 store i32 %oldval, i32* %addr
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30 ret void
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31 }
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34 define i1 @test_cmpxchg_weak_to_bool(i32, i32 *%addr, i32 %desired, i32 %new) {
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35 ; CHECK-LABEL: test_cmpxchg_weak_to_bool:
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37 %pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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38 %success = extractvalue { i32, i1 } %pair, 1
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39
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40 ; CHECK-NEXT: BB#0:
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41 ; CHECK-NEXT: ldrex [[LOADED:r[0-9]+]], [r1]
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42 ; CHECK-NEXT: cmp [[LOADED]], r2
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43 ; CHECK-NEXT: bne [[LDFAILBB:LBB[0-9]+_[0-9]+]]
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44 ; CHECK-NEXT: BB#1:
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45 ; CHECK-NEXT: dmb ish
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46 ; CHECK-NEXT: mov r0, #0
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47 ; CHECK-NEXT: strex [[SUCCESS:r[0-9]+]], r3, [r1]
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48 ; CHECK-NEXT: cmp [[SUCCESS]], #0
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49 ; CHECK-NEXT: bxne lr
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50 ; CHECK-NEXT: mov r0, #1
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51 ; CHECK-NEXT: dmb ish
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52 ; CHECK-NEXT: bx lr
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53 ; CHECK-NEXT: [[LDFAILBB]]:
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54 ; CHECK-NEXT: mov r0, #0
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55 ; CHECK-NEXT: clrex
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56 ; CHECK-NEXT: bx lr
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58 ret i1 %success
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59 }