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121
|
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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77
|
2 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
4 define <8 x i8> @vuzpi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
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95
|
5 ; CHECK-LABEL: vuzpi8:
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6 ; CHECK: @ BB#0:
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7 ; CHECK-NEXT: vldr d16, [r1]
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8 ; CHECK-NEXT: vldr d17, [r0]
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9 ; CHECK-NEXT: vuzp.8 d17, d16
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121
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10 ; CHECK-NEXT: vmul.i8 d16, d17, d16
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95
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11 ; CHECK-NEXT: vmov r0, r1, d16
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12 ; CHECK-NEXT: mov pc, lr
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13 %tmp1 = load <8 x i8>, <8 x i8>* %A
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14 %tmp2 = load <8 x i8>, <8 x i8>* %B
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
15 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
16 %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
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|
121
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17 %tmp5 = mul <8 x i8> %tmp3, %tmp4
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
18 ret <8 x i8> %tmp5
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
19 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
20
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95
|
21 define <16 x i8> @vuzpi8_Qres(<8 x i8>* %A, <8 x i8>* %B) nounwind {
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22 ; CHECK-LABEL: vuzpi8_Qres:
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23 ; CHECK: @ BB#0:
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121
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24 ; CHECK-NEXT: vldr d17, [r1]
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25 ; CHECK-NEXT: vldr d16, [r0]
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26 ; CHECK-NEXT: vuzp.8 d16, d17
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27 ; CHECK-NEXT: vmov r0, r1, d16
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28 ; CHECK-NEXT: vmov r2, r3, d17
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95
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29 ; CHECK-NEXT: mov pc, lr
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30 %tmp1 = load <8 x i8>, <8 x i8>* %A
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31 %tmp2 = load <8 x i8>, <8 x i8>* %B
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32 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
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33 ret <16 x i8> %tmp3
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34 }
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35
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
36 define <4 x i16> @vuzpi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
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95
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37 ; CHECK-LABEL: vuzpi16:
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38 ; CHECK: @ BB#0:
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39 ; CHECK-NEXT: vldr d16, [r1]
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40 ; CHECK-NEXT: vldr d17, [r0]
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41 ; CHECK-NEXT: vuzp.16 d17, d16
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121
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42 ; CHECK-NEXT: vmul.i16 d16, d17, d16
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95
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43 ; CHECK-NEXT: vmov r0, r1, d16
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44 ; CHECK-NEXT: mov pc, lr
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45 %tmp1 = load <4 x i16>, <4 x i16>* %A
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46 %tmp2 = load <4 x i16>, <4 x i16>* %B
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
47 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
48 %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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121
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49 %tmp5 = mul <4 x i16> %tmp3, %tmp4
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
50 ret <4 x i16> %tmp5
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
51 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
52
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95
|
53 define <8 x i16> @vuzpi16_Qres(<4 x i16>* %A, <4 x i16>* %B) nounwind {
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54 ; CHECK-LABEL: vuzpi16_Qres:
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55 ; CHECK: @ BB#0:
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121
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56 ; CHECK-NEXT: vldr d17, [r1]
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57 ; CHECK-NEXT: vldr d16, [r0]
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58 ; CHECK-NEXT: vuzp.16 d16, d17
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59 ; CHECK-NEXT: vmov r0, r1, d16
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60 ; CHECK-NEXT: vmov r2, r3, d17
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95
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61 ; CHECK-NEXT: mov pc, lr
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62 %tmp1 = load <4 x i16>, <4 x i16>* %A
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63 %tmp2 = load <4 x i16>, <4 x i16>* %B
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64 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 1, i32 3, i32 5, i32 7>
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65 ret <8 x i16> %tmp3
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66 }
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67
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
68 ; VUZP.32 is equivalent to VTRN.32 for 64-bit vectors.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
69
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
70 define <16 x i8> @vuzpQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
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95
|
71 ; CHECK-LABEL: vuzpQi8:
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72 ; CHECK: @ BB#0:
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73 ; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
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74 ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
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75 ; CHECK-NEXT: vuzp.8 q9, q8
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76 ; CHECK-NEXT: vadd.i8 q8, q9, q8
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77 ; CHECK-NEXT: vmov r0, r1, d16
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78 ; CHECK-NEXT: vmov r2, r3, d17
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79 ; CHECK-NEXT: mov pc, lr
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80 %tmp1 = load <16 x i8>, <16 x i8>* %A
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81 %tmp2 = load <16 x i8>, <16 x i8>* %B
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
82 %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
83 %tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
84 %tmp5 = add <16 x i8> %tmp3, %tmp4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
85 ret <16 x i8> %tmp5
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
86 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
87
|
|
95
|
88 define <32 x i8> @vuzpQi8_QQres(<16 x i8>* %A, <16 x i8>* %B) nounwind {
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89 ; CHECK-LABEL: vuzpQi8_QQres:
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|
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90 ; CHECK: @ BB#0:
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91 ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
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92 ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
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93 ; CHECK-NEXT: vuzp.8 q9, q8
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94 ; CHECK-NEXT: vst1.8 {d18, d19}, [r0:128]!
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95 ; CHECK-NEXT: vst1.64 {d16, d17}, [r0:128]
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96 ; CHECK-NEXT: mov pc, lr
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97 %tmp1 = load <16 x i8>, <16 x i8>* %A
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98 %tmp2 = load <16 x i8>, <16 x i8>* %B
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99 %tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <32 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
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100 ret <32 x i8> %tmp3
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|
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101 }
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102
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
103 define <8 x i16> @vuzpQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
|
|
95
|
104 ; CHECK-LABEL: vuzpQi16:
|
|
|
105 ; CHECK: @ BB#0:
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|
|
106 ; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
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|
107 ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
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108 ; CHECK-NEXT: vuzp.16 q9, q8
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|
109 ; CHECK-NEXT: vadd.i16 q8, q9, q8
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|
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110 ; CHECK-NEXT: vmov r0, r1, d16
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|
|
111 ; CHECK-NEXT: vmov r2, r3, d17
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|
|
112 ; CHECK-NEXT: mov pc, lr
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|
|
113 %tmp1 = load <8 x i16>, <8 x i16>* %A
|
|
|
114 %tmp2 = load <8 x i16>, <8 x i16>* %B
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
115 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
116 %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
117 %tmp5 = add <8 x i16> %tmp3, %tmp4
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
118 ret <8 x i16> %tmp5
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
119 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
120
|
|
95
|
121 define <16 x i16> @vuzpQi16_QQres(<8 x i16>* %A, <8 x i16>* %B) nounwind {
|
|
|
122 ; CHECK-LABEL: vuzpQi16_QQres:
|
|
|
123 ; CHECK: @ BB#0:
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|
|
124 ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
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|
125 ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
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|
126 ; CHECK-NEXT: vuzp.16 q9, q8
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127 ; CHECK-NEXT: vst1.16 {d18, d19}, [r0:128]!
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|
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128 ; CHECK-NEXT: vst1.64 {d16, d17}, [r0:128]
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129 ; CHECK-NEXT: mov pc, lr
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|
130 %tmp1 = load <8 x i16>, <8 x i16>* %A
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|
|
131 %tmp2 = load <8 x i16>, <8 x i16>* %B
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|
|
132 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
|
|
|
133 ret <16 x i16> %tmp3
|
|
|
134 }
|
|
|
135
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
136 define <4 x i32> @vuzpQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
|
|
95
|
137 ; CHECK-LABEL: vuzpQi32:
|
|
|
138 ; CHECK: @ BB#0:
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|
|
139 ; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
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|
|
140 ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
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|
141 ; CHECK-NEXT: vuzp.32 q9, q8
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|
|
142 ; CHECK-NEXT: vadd.i32 q8, q9, q8
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|
143 ; CHECK-NEXT: vmov r0, r1, d16
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|
|
144 ; CHECK-NEXT: vmov r2, r3, d17
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|
|
145 ; CHECK-NEXT: mov pc, lr
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|
|
146 %tmp1 = load <4 x i32>, <4 x i32>* %A
|
|
|
147 %tmp2 = load <4 x i32>, <4 x i32>* %B
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
148 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
149 %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
150 %tmp5 = add <4 x i32> %tmp3, %tmp4
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
151 ret <4 x i32> %tmp5
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
152 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
153
|
|
95
|
154 define <8 x i32> @vuzpQi32_QQres(<4 x i32>* %A, <4 x i32>* %B) nounwind {
|
|
|
155 ; CHECK-LABEL: vuzpQi32_QQres:
|
|
|
156 ; CHECK: @ BB#0:
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|
|
157 ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
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|
|
158 ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
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159 ; CHECK-NEXT: vuzp.32 q9, q8
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|
|
160 ; CHECK-NEXT: vst1.32 {d18, d19}, [r0:128]!
|
|
|
161 ; CHECK-NEXT: vst1.64 {d16, d17}, [r0:128]
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|
|
162 ; CHECK-NEXT: mov pc, lr
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|
163 %tmp1 = load <4 x i32>, <4 x i32>* %A
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|
|
164 %tmp2 = load <4 x i32>, <4 x i32>* %B
|
|
|
165 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 1, i32 3, i32 5, i32 7>
|
|
|
166 ret <8 x i32> %tmp3
|
|
|
167 }
|
|
|
168
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
169 define <4 x float> @vuzpQf(<4 x float>* %A, <4 x float>* %B) nounwind {
|
|
95
|
170 ; CHECK-LABEL: vuzpQf:
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|
|
171 ; CHECK: @ BB#0:
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|
|
172 ; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
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|
173 ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
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|
|
174 ; CHECK-NEXT: vuzp.32 q9, q8
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|
175 ; CHECK-NEXT: vadd.f32 q8, q9, q8
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|
|
176 ; CHECK-NEXT: vmov r0, r1, d16
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|
|
177 ; CHECK-NEXT: vmov r2, r3, d17
|
|
|
178 ; CHECK-NEXT: mov pc, lr
|
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|
179 %tmp1 = load <4 x float>, <4 x float>* %A
|
|
|
180 %tmp2 = load <4 x float>, <4 x float>* %B
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
181 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
182 %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
183 %tmp5 = fadd <4 x float> %tmp3, %tmp4
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
184 ret <4 x float> %tmp5
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
185 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
186
|
|
95
|
187 define <8 x float> @vuzpQf_QQres(<4 x float>* %A, <4 x float>* %B) nounwind {
|
|
|
188 ; CHECK-LABEL: vuzpQf_QQres:
|
|
|
189 ; CHECK: @ BB#0:
|
|
|
190 ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
|
|
|
191 ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
|
|
|
192 ; CHECK-NEXT: vuzp.32 q9, q8
|
|
|
193 ; CHECK-NEXT: vst1.32 {d18, d19}, [r0:128]!
|
|
|
194 ; CHECK-NEXT: vst1.64 {d16, d17}, [r0:128]
|
|
|
195 ; CHECK-NEXT: mov pc, lr
|
|
|
196 %tmp1 = load <4 x float>, <4 x float>* %A
|
|
|
197 %tmp2 = load <4 x float>, <4 x float>* %B
|
|
|
198 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 1, i32 3, i32 5, i32 7>
|
|
|
199 ret <8 x float> %tmp3
|
|
|
200 }
|
|
|
201
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
202 ; Undef shuffle indices should not prevent matching to VUZP:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
203
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
204 define <8 x i8> @vuzpi8_undef(<8 x i8>* %A, <8 x i8>* %B) nounwind {
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95
|
205 ; CHECK-LABEL: vuzpi8_undef:
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206 ; CHECK: @ BB#0:
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207 ; CHECK-NEXT: vldr d16, [r1]
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208 ; CHECK-NEXT: vldr d17, [r0]
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209 ; CHECK-NEXT: vuzp.8 d17, d16
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121
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210 ; CHECK-NEXT: vmul.i8 d16, d17, d16
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|
95
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211 ; CHECK-NEXT: vmov r0, r1, d16
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212 ; CHECK-NEXT: mov pc, lr
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213 %tmp1 = load <8 x i8>, <8 x i8>* %A
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214 %tmp2 = load <8 x i8>, <8 x i8>* %B
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0
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parents:
diff
changeset
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215 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 8, i32 10, i32 12, i32 14>
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diff
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216 %tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 13, i32 15>
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121
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217 %tmp5 = mul <8 x i8> %tmp3, %tmp4
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parents:
diff
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218 ret <8 x i8> %tmp5
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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219 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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220
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95
|
221 define <16 x i8> @vuzpi8_undef_Qres(<8 x i8>* %A, <8 x i8>* %B) nounwind {
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222 ; CHECK-LABEL: vuzpi8_undef_Qres:
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223 ; CHECK: @ BB#0:
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|
121
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224 ; CHECK-NEXT: vldr d17, [r1]
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225 ; CHECK-NEXT: vldr d16, [r0]
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226 ; CHECK-NEXT: vuzp.8 d16, d17
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227 ; CHECK-NEXT: vmov r0, r1, d16
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228 ; CHECK-NEXT: vmov r2, r3, d17
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95
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229 ; CHECK-NEXT: mov pc, lr
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230 %tmp1 = load <8 x i8>, <8 x i8>* %A
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231 %tmp2 = load <8 x i8>, <8 x i8>* %B
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232 %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 8, i32 10, i32 12, i32 14, i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 13, i32 15>
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233 ret <16 x i8> %tmp3
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234 }
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235
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parents:
diff
changeset
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236 define <8 x i16> @vuzpQi16_undef(<8 x i16>* %A, <8 x i16>* %B) nounwind {
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95
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237 ; CHECK-LABEL: vuzpQi16_undef:
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238 ; CHECK: @ BB#0:
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239 ; CHECK-NEXT: vld1.64 {d16, d17}, [r1]
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240 ; CHECK-NEXT: vld1.64 {d18, d19}, [r0]
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241 ; CHECK-NEXT: vuzp.16 q9, q8
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242 ; CHECK-NEXT: vadd.i16 q8, q9, q8
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243 ; CHECK-NEXT: vmov r0, r1, d16
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244 ; CHECK-NEXT: vmov r2, r3, d17
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245 ; CHECK-NEXT: mov pc, lr
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246 %tmp1 = load <8 x i16>, <8 x i16>* %A
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247 %tmp2 = load <8 x i16>, <8 x i16>* %B
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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248 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 undef, i32 4, i32 undef, i32 8, i32 10, i32 12, i32 14>
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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249 %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 undef, i32 undef, i32 11, i32 13, i32 15>
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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250 %tmp5 = add <8 x i16> %tmp3, %tmp4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
251 ret <8 x i16> %tmp5
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
252 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
253
|
|
95
|
254 define <16 x i16> @vuzpQi16_undef_QQres(<8 x i16>* %A, <8 x i16>* %B) nounwind {
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|
|
255 ; CHECK-LABEL: vuzpQi16_undef_QQres:
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|
|
256 ; CHECK: @ BB#0:
|
|
|
257 ; CHECK-NEXT: vld1.64 {d16, d17}, [r2]
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|
|
258 ; CHECK-NEXT: vld1.64 {d18, d19}, [r1]
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259 ; CHECK-NEXT: vuzp.16 q9, q8
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260 ; CHECK-NEXT: vst1.16 {d18, d19}, [r0:128]!
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|
261 ; CHECK-NEXT: vst1.64 {d16, d17}, [r0:128]
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|
|
262 ; CHECK-NEXT: mov pc, lr
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|
|
263 %tmp1 = load <8 x i16>, <8 x i16>* %A
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264 %tmp2 = load <8 x i16>, <8 x i16>* %B
|
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265 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <16 x i32> <i32 0, i32 undef, i32 4, i32 undef, i32 8, i32 10, i32 12, i32 14, i32 1, i32 3, i32 5, i32 undef, i32 undef, i32 11, i32 13, i32 15>
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|
|
266 ret <16 x i16> %tmp3
|
|
|
267 }
|
|
|
268
|
|
|
269 define <8 x i16> @vuzp_lower_shufflemask_undef(<4 x i16>* %A, <4 x i16>* %B) {
|
|
121
|
270 ; CHECK-LABEL: vuzp_lower_shufflemask_undef:
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|
|
271 ; CHECK: @ BB#0: @ %entry
|
|
|
272 ; CHECK-NEXT: vldr d17, [r1]
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|
|
273 ; CHECK-NEXT: vldr d16, [r0]
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|
|
274 ; CHECK-NEXT: vorr q9, q8, q8
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|
275 ; CHECK-NEXT: vuzp.16 q8, q9
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|
|
276 ; CHECK-NEXT: vmov r0, r1, d18
|
|
|
277 ; CHECK-NEXT: vmov r2, r3, d19
|
|
|
278 ; CHECK-NEXT: mov pc, lr
|
|
95
|
279 entry:
|
|
|
280 %tmp1 = load <4 x i16>, <4 x i16>* %A
|
|
|
281 %tmp2 = load <4 x i16>, <4 x i16>* %B
|
|
|
282 %0 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 3, i32 5, i32 7>
|
|
|
283 ret <8 x i16> %0
|
|
|
284 }
|
|
|
285
|
|
|
286 define <4 x i32> @vuzp_lower_shufflemask_zeroed(<2 x i32>* %A, <2 x i32>* %B) {
|
|
121
|
287 ; CHECK-LABEL: vuzp_lower_shufflemask_zeroed:
|
|
|
288 ; CHECK: @ BB#0: @ %entry
|
|
|
289 ; CHECK-NEXT: vldr d17, [r1]
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|
|
290 ; CHECK-NEXT: vldr d16, [r0]
|
|
|
291 ; CHECK-NEXT: vdup.32 q9, d16[0]
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|
|
292 ; CHECK-NEXT: vuzp.32 q8, q9
|
|
|
293 ; CHECK-NEXT: vext.32 q8, q9, q9, #2
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|
|
294 ; CHECK-NEXT: vmov r0, r1, d16
|
|
|
295 ; CHECK-NEXT: vmov r2, r3, d17
|
|
|
296 ; CHECK-NEXT: mov pc, lr
|
|
95
|
297 entry:
|
|
|
298 %tmp1 = load <2 x i32>, <2 x i32>* %A
|
|
|
299 %tmp2 = load <2 x i32>, <2 x i32>* %B
|
|
|
300 %0 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> <i32 0, i32 0, i32 1, i32 3>
|
|
|
301 ret <4 x i32> %0
|
|
|
302 }
|
|
|
303
|
|
|
304 define void @vuzp_rev_shufflemask_vtrn(<2 x i32>* %A, <2 x i32>* %B, <4 x i32>* %C) {
|
|
121
|
305 ; CHECK-LABEL: vuzp_rev_shufflemask_vtrn:
|
|
|
306 ; CHECK: @ BB#0: @ %entry
|
|
|
307 ; CHECK-NEXT: vldr d17, [r1]
|
|
|
308 ; CHECK-NEXT: vldr d16, [r0]
|
|
|
309 ; CHECK-NEXT: vrev64.32 q9, q8
|
|
|
310 ; CHECK-NEXT: vuzp.32 q8, q9
|
|
|
311 ; CHECK-NEXT: vst1.64 {d18, d19}, [r2]
|
|
|
312 ; CHECK-NEXT: mov pc, lr
|
|
95
|
313 entry:
|
|
|
314 %tmp1 = load <2 x i32>, <2 x i32>* %A
|
|
|
315 %tmp2 = load <2 x i32>, <2 x i32>* %B
|
|
|
316 %0 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
|
|
|
317 store <4 x i32> %0, <4 x i32>* %C
|
|
|
318 ret void
|
|
|
319 }
|
|
|
320
|
|
121
|
321 define <8 x i8> @cmpsel_trunc(<8 x i8> %in0, <8 x i8> %in1, <8 x i32> %cmp0, <8 x i32> %cmp1) {
|
|
95
|
322 ; In order to create the select we need to truncate the vcgt result from a vector of i32 to a vector of i8.
|
|
|
323 ; This results in a build_vector with mismatched types. We will generate two vmovn.i32 instructions to
|
|
121
|
324 ; truncate from i32 to i16 and one vmovn.i16 to perform the final truncation for i8.
|
|
|
325 ; CHECK-LABEL: cmpsel_trunc:
|
|
|
326 ; CHECK: @ BB#0:
|
|
|
327 ; CHECK-NEXT: add r12, sp, #16
|
|
|
328 ; CHECK-NEXT: vld1.64 {d16, d17}, [r12]
|
|
|
329 ; CHECK-NEXT: mov r12, sp
|
|
|
330 ; CHECK-NEXT: vld1.64 {d18, d19}, [r12]
|
|
|
331 ; CHECK-NEXT: add r12, sp, #48
|
|
|
332 ; CHECK-NEXT: vld1.64 {d20, d21}, [r12]
|
|
|
333 ; CHECK-NEXT: add r12, sp, #32
|
|
|
334 ; CHECK-NEXT: vcgt.u32 q8, q10, q8
|
|
|
335 ; CHECK-NEXT: vld1.64 {d20, d21}, [r12]
|
|
|
336 ; CHECK-NEXT: vcgt.u32 q9, q10, q9
|
|
|
337 ; CHECK-NEXT: vmov d20, r2, r3
|
|
|
338 ; CHECK-NEXT: vmovn.i32 d17, q8
|
|
|
339 ; CHECK-NEXT: vmovn.i32 d16, q9
|
|
|
340 ; CHECK-NEXT: vmov d18, r0, r1
|
|
|
341 ; CHECK-NEXT: vmovn.i16 d16, q8
|
|
|
342 ; CHECK-NEXT: vbsl d16, d18, d20
|
|
|
343 ; CHECK-NEXT: vmov r0, r1, d16
|
|
|
344 ; CHECK-NEXT: mov pc, lr
|
|
95
|
345 %c = icmp ult <8 x i32> %cmp0, %cmp1
|
|
|
346 %res = select <8 x i1> %c, <8 x i8> %in0, <8 x i8> %in1
|
|
|
347 ret <8 x i8> %res
|
|
|
348 }
|
|
|
349
|
|
|
350 ; Shuffle the result from the compare with a <4 x i8>.
|
|
|
351 ; We need to extend the loaded <4 x i8> to <4 x i16>. Otherwise we wouldn't be able
|
|
|
352 ; to perform the vuzp and get the vbsl mask.
|
|
|
353 define <8 x i8> @vuzp_trunc_and_shuffle(<8 x i8> %tr0, <8 x i8> %tr1,
|
|
121
|
354 ; CHECK-LABEL: vuzp_trunc_and_shuffle:
|
|
|
355 ; CHECK: @ BB#0:
|
|
|
356 ; CHECK-NEXT: .save {r11, lr}
|
|
|
357 ; CHECK-NEXT: push {r11, lr}
|
|
|
358 ; CHECK-NEXT: add r12, sp, #8
|
|
|
359 ; CHECK-NEXT: add lr, sp, #24
|
|
|
360 ; CHECK-NEXT: vld1.64 {d16, d17}, [r12]
|
|
|
361 ; CHECK-NEXT: ldr r12, [sp, #40]
|
|
|
362 ; CHECK-NEXT: vld1.64 {d18, d19}, [lr]
|
|
|
363 ; CHECK-NEXT: vcgt.u32 q8, q9, q8
|
|
|
364 ; CHECK-NEXT: vld1.32 {d18[0]}, [r12:32]
|
|
|
365 ; CHECK-NEXT: vmov.i8 d19, #0x7
|
|
|
366 ; CHECK-NEXT: vmovl.u8 q10, d18
|
|
|
367 ; CHECK-NEXT: vmovn.i32 d16, q8
|
|
|
368 ; CHECK-NEXT: vneg.s8 d17, d19
|
|
|
369 ; CHECK-NEXT: vmov d18, r2, r3
|
|
|
370 ; CHECK-NEXT: vuzp.8 d16, d20
|
|
|
371 ; CHECK-NEXT: vshl.i8 d16, d16, #7
|
|
|
372 ; CHECK-NEXT: vshl.s8 d16, d16, d17
|
|
|
373 ; CHECK-NEXT: vmov d17, r0, r1
|
|
|
374 ; CHECK-NEXT: vbsl d16, d17, d18
|
|
|
375 ; CHECK-NEXT: vmov r0, r1, d16
|
|
|
376 ; CHECK-NEXT: pop {r11, lr}
|
|
|
377 ; CHECK-NEXT: mov pc, lr
|
|
95
|
378 <4 x i32> %cmp0, <4 x i32> %cmp1, <4 x i8> *%cmp2_ptr) {
|
|
|
379 %cmp2_load = load <4 x i8>, <4 x i8> * %cmp2_ptr, align 4
|
|
|
380 %cmp2 = trunc <4 x i8> %cmp2_load to <4 x i1>
|
|
|
381 %c0 = icmp ult <4 x i32> %cmp0, %cmp1
|
|
|
382 %c = shufflevector <4 x i1> %c0, <4 x i1> %cmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
|
383 %rv = select <8 x i1> %c, <8 x i8> %tr0, <8 x i8> %tr1
|
|
|
384 ret <8 x i8> %rv
|
|
|
385 }
|
|
|
386
|
|
|
387 ; Use an undef value for the <4 x i8> that is being shuffled with the compare result.
|
|
|
388 ; This produces a build_vector with some of the operands undefs.
|
|
|
389 define <8 x i8> @vuzp_trunc_and_shuffle_undef_right(<8 x i8> %tr0, <8 x i8> %tr1,
|
|
121
|
390 ; CHECK-LABEL: vuzp_trunc_and_shuffle_undef_right:
|
|
|
391 ; CHECK: @ BB#0:
|
|
|
392 ; CHECK-NEXT: mov r12, sp
|
|
|
393 ; CHECK-NEXT: vld1.64 {d16, d17}, [r12]
|
|
|
394 ; CHECK-NEXT: add r12, sp, #16
|
|
|
395 ; CHECK-NEXT: vld1.64 {d18, d19}, [r12]
|
|
|
396 ; CHECK-NEXT: vcgt.u32 q8, q9, q8
|
|
|
397 ; CHECK-NEXT: vmov.i8 d18, #0x7
|
|
|
398 ; CHECK-NEXT: vmovn.i32 d16, q8
|
|
|
399 ; CHECK-NEXT: vuzp.8 d16, d17
|
|
|
400 ; CHECK-NEXT: vneg.s8 d17, d18
|
|
|
401 ; CHECK-NEXT: vshl.i8 d16, d16, #7
|
|
|
402 ; CHECK-NEXT: vmov d18, r2, r3
|
|
|
403 ; CHECK-NEXT: vshl.s8 d16, d16, d17
|
|
|
404 ; CHECK-NEXT: vmov d17, r0, r1
|
|
|
405 ; CHECK-NEXT: vbsl d16, d17, d18
|
|
|
406 ; CHECK-NEXT: vmov r0, r1, d16
|
|
|
407 ; CHECK-NEXT: mov pc, lr
|
|
95
|
408 <4 x i32> %cmp0, <4 x i32> %cmp1, <4 x i8> *%cmp2_ptr) {
|
|
|
409 %cmp2_load = load <4 x i8>, <4 x i8> * %cmp2_ptr, align 4
|
|
|
410 %cmp2 = trunc <4 x i8> %cmp2_load to <4 x i1>
|
|
|
411 %c0 = icmp ult <4 x i32> %cmp0, %cmp1
|
|
|
412 %c = shufflevector <4 x i1> %c0, <4 x i1> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
|
413 %rv = select <8 x i1> %c, <8 x i8> %tr0, <8 x i8> %tr1
|
|
|
414 ret <8 x i8> %rv
|
|
|
415 }
|
|
|
416
|
|
|
417 define <8 x i8> @vuzp_trunc_and_shuffle_undef_left(<8 x i8> %tr0, <8 x i8> %tr1,
|
|
121
|
418 ; CHECK-LABEL: vuzp_trunc_and_shuffle_undef_left:
|
|
|
419 ; CHECK: @ BB#0:
|
|
|
420 ; CHECK-NEXT: mov r12, sp
|
|
|
421 ; CHECK-NEXT: vld1.64 {d16, d17}, [r12]
|
|
|
422 ; CHECK-NEXT: add r12, sp, #16
|
|
|
423 ; CHECK-NEXT: vld1.64 {d18, d19}, [r12]
|
|
|
424 ; CHECK-NEXT: vcgt.u32 q8, q9, q8
|
|
|
425 ; CHECK-NEXT: vldr d18, .LCPI22_0
|
|
|
426 ; CHECK-NEXT: vmov.i8 d19, #0x7
|
|
|
427 ; CHECK-NEXT: vmovn.i32 d16, q8
|
|
|
428 ; CHECK-NEXT: vtbl.8 d16, {d16}, d18
|
|
|
429 ; CHECK-NEXT: vneg.s8 d17, d19
|
|
|
430 ; CHECK-NEXT: vmov d18, r2, r3
|
|
|
431 ; CHECK-NEXT: vshl.i8 d16, d16, #7
|
|
|
432 ; CHECK-NEXT: vshl.s8 d16, d16, d17
|
|
|
433 ; CHECK-NEXT: vmov d17, r0, r1
|
|
|
434 ; CHECK-NEXT: vbsl d16, d17, d18
|
|
|
435 ; CHECK-NEXT: vmov r0, r1, d16
|
|
|
436 ; CHECK-NEXT: mov pc, lr
|
|
|
437 ; CHECK-NEXT: .p2align 3
|
|
|
438 ; CHECK-NEXT: @ BB#1:
|
|
|
439 ; CHECK-NEXT: .LCPI22_0:
|
|
|
440 ; CHECK-NEXT: .byte 255 @ 0xff
|
|
|
441 ; CHECK-NEXT: .byte 255 @ 0xff
|
|
|
442 ; CHECK-NEXT: .byte 255 @ 0xff
|
|
|
443 ; CHECK-NEXT: .byte 255 @ 0xff
|
|
|
444 ; CHECK-NEXT: .byte 0 @ 0x0
|
|
|
445 ; CHECK-NEXT: .byte 2 @ 0x2
|
|
|
446 ; CHECK-NEXT: .byte 4 @ 0x4
|
|
|
447 ; CHECK-NEXT: .byte 6 @ 0x6
|
|
95
|
448 <4 x i32> %cmp0, <4 x i32> %cmp1, <4 x i8> *%cmp2_ptr) {
|
|
|
449 %cmp2_load = load <4 x i8>, <4 x i8> * %cmp2_ptr, align 4
|
|
|
450 %cmp2 = trunc <4 x i8> %cmp2_load to <4 x i1>
|
|
|
451 %c0 = icmp ult <4 x i32> %cmp0, %cmp1
|
|
|
452 %c = shufflevector <4 x i1> undef, <4 x i1> %c0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
|
453 %rv = select <8 x i1> %c, <8 x i8> %tr0, <8 x i8> %tr1
|
|
|
454 ret <8 x i8> %rv
|
|
|
455 }
|
|
|
456
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457 ; We're using large data types here, and we have to fill with undef values until we
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458 ; get some vector size that we can represent.
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459 define <10 x i8> @vuzp_wide_type(<10 x i8> %tr0, <10 x i8> %tr1,
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121
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460 ; CHECK-LABEL: vuzp_wide_type:
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461 ; CHECK: @ BB#0:
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462 ; CHECK-NEXT: .save {r4, r10, r11, lr}
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463 ; CHECK-NEXT: push {r4, r10, r11, lr}
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464 ; CHECK-NEXT: .setfp r11, sp, #8
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465 ; CHECK-NEXT: add r11, sp, #8
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466 ; CHECK-NEXT: bic sp, sp, #15
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467 ; CHECK-NEXT: add r12, r11, #32
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468 ; CHECK-NEXT: add lr, r11, #60
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469 ; CHECK-NEXT: vld1.32 {d17[0]}, [r12:32]
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470 ; CHECK-NEXT: add r12, r11, #24
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471 ; CHECK-NEXT: vld1.32 {d22[0]}, [lr:32]
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472 ; CHECK-NEXT: add lr, r11, #36
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473 ; CHECK-NEXT: vld1.32 {d16[0]}, [r12:32]
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474 ; CHECK-NEXT: add r12, r11, #52
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475 ; CHECK-NEXT: vld1.32 {d19[0]}, [r12:32]
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476 ; CHECK-NEXT: add r12, r11, #44
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477 ; CHECK-NEXT: vld1.32 {d17[1]}, [lr:32]
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478 ; CHECK-NEXT: vld1.32 {d18[0]}, [r12:32]
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479 ; CHECK-NEXT: add r12, r11, #40
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480 ; CHECK-NEXT: vld1.32 {d20[0]}, [r12:32]
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481 ; CHECK-NEXT: ldr r12, [r11, #64]
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482 ; CHECK-NEXT: vcgt.u32 q10, q11, q10
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483 ; CHECK-NEXT: ldr r4, [r12]
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484 ; CHECK-NEXT: vmov.32 d25[0], r4
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485 ; CHECK-NEXT: add r4, r11, #28
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486 ; CHECK-NEXT: vld1.32 {d16[1]}, [r4:32]
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487 ; CHECK-NEXT: add r4, r11, #56
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488 ; CHECK-NEXT: vld1.32 {d19[1]}, [r4:32]
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489 ; CHECK-NEXT: add r4, r11, #48
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490 ; CHECK-NEXT: vmov.u8 lr, d25[3]
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491 ; CHECK-NEXT: vld1.32 {d18[1]}, [r4:32]
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492 ; CHECK-NEXT: add r4, r12, #4
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493 ; CHECK-NEXT: vcgt.u32 q8, q9, q8
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494 ; CHECK-NEXT: vmovn.i32 d19, q10
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495 ; CHECK-NEXT: vldr d20, .LCPI23_0
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496 ; CHECK-NEXT: vmov.i8 d18, #0x7
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497 ; CHECK-NEXT: vmovn.i32 d16, q8
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498 ; CHECK-NEXT: vneg.s8 d17, d18
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499 ; CHECK-NEXT: vuzp.8 d16, d19
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500 ; CHECK-NEXT: vmov.i8 q9, #0x7
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501 ; CHECK-NEXT: vshl.i8 d16, d16, #7
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502 ; CHECK-NEXT: vneg.s8 q9, q9
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503 ; CHECK-NEXT: vshl.s8 d24, d16, d17
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504 ; CHECK-NEXT: vmov.8 d17[0], lr
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505 ; CHECK-NEXT: vtbl.8 d16, {d24, d25}, d20
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506 ; CHECK-NEXT: vld1.8 {d17[1]}, [r4]
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507 ; CHECK-NEXT: add r4, r11, #8
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508 ; CHECK-NEXT: vshl.i8 q8, q8, #7
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509 ; CHECK-NEXT: vld1.64 {d20, d21}, [r4]
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510 ; CHECK-NEXT: vshl.s8 q8, q8, q9
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511 ; CHECK-NEXT: vmov d19, r2, r3
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512 ; CHECK-NEXT: vmov d18, r0, r1
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513 ; CHECK-NEXT: vbsl q8, q9, q10
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514 ; CHECK-NEXT: vmov r0, r1, d16
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515 ; CHECK-NEXT: vmov r2, r3, d17
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516 ; CHECK-NEXT: sub sp, r11, #8
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517 ; CHECK-NEXT: pop {r4, r10, r11, lr}
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518 ; CHECK-NEXT: mov pc, lr
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519 ; CHECK-NEXT: .p2align 3
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520 ; CHECK-NEXT: @ BB#1:
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521 ; CHECK-NEXT: .LCPI23_0:
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522 ; CHECK-NEXT: .byte 0 @ 0x0
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523 ; CHECK-NEXT: .byte 1 @ 0x1
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524 ; CHECK-NEXT: .byte 2 @ 0x2
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525 ; CHECK-NEXT: .byte 3 @ 0x3
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526 ; CHECK-NEXT: .byte 4 @ 0x4
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527 ; CHECK-NEXT: .byte 8 @ 0x8
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528 ; CHECK-NEXT: .byte 9 @ 0x9
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529 ; CHECK-NEXT: .byte 10 @ 0xa
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95
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530 <5 x i32> %cmp0, <5 x i32> %cmp1, <5 x i8> *%cmp2_ptr) {
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531 %cmp2_load = load <5 x i8>, <5 x i8> * %cmp2_ptr, align 4
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532 %cmp2 = trunc <5 x i8> %cmp2_load to <5 x i1>
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533 %c0 = icmp ult <5 x i32> %cmp0, %cmp1
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534 %c = shufflevector <5 x i1> %c0, <5 x i1> %cmp2, <10 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
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535 %rv = select <10 x i1> %c, <10 x i8> %tr0, <10 x i8> %tr1
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536 ret <10 x i8> %rv
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537 }
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121
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538
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539 %struct.uint8x8x2_t = type { [2 x <8 x i8>] }
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540 define %struct.uint8x8x2_t @vuzp_extract_subvector(<16 x i8> %t) #0 {
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541 ; CHECK-LABEL: vuzp_extract_subvector:
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542 ; CHECK: @ BB#0:
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543 ; CHECK-NEXT: vmov d17, r2, r3
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544 ; CHECK-NEXT: vmov d16, r0, r1
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545 ; CHECK-NEXT: vorr d18, d17, d17
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546 ; CHECK-NEXT: vuzp.8 d16, d18
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547 ; CHECK-NEXT: vmov r0, r1, d16
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548 ; CHECK-NEXT: vmov r2, r3, d18
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549 ; CHECK-NEXT: mov pc, lr
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550
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551 %vuzp.i = shufflevector <16 x i8> %t, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
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552 %vuzp1.i = shufflevector <16 x i8> %t, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
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553 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
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554 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
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555 ret %struct.uint8x8x2_t %.fca.0.1.insert
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556 }
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