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annotate test/CodeGen/AArch64/tail-call.ll @ 0:95c75e76d11b

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
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children 54457678186b
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95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -tailcallopt | FileCheck %s
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2
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3 declare fastcc void @callee_stack0()
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4 declare fastcc void @callee_stack8([8 x i32], i64)
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5 declare fastcc void @callee_stack16([8 x i32], i64, i64)
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6
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7 define fastcc void @caller_to0_from0() nounwind {
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8 ; CHECK-LABEL: caller_to0_from0:
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9 ; CHECK-NEXT: // BB
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10 tail call fastcc void @callee_stack0()
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11 ret void
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12 ; CHECK-NEXT: b callee_stack0
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13 }
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14
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15 define fastcc void @caller_to0_from8([8 x i32], i64) {
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16 ; CHECK-LABEL: caller_to0_from8:
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17
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18 tail call fastcc void @callee_stack0()
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19 ret void
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20 ; CHECK: add sp, sp, #16
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21 ; CHECK-NEXT: b callee_stack0
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22 }
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23
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24 define fastcc void @caller_to8_from0() {
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25 ; CHECK-LABEL: caller_to8_from0:
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26 ; CHECK: sub sp, sp, #32
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27
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28 ; Key point is that the "42" should go #16 below incoming stack
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29 ; pointer (we didn't have arg space to reuse).
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30 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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31 ret void
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32 ; CHECK: str {{x[0-9]+}}, [sp, #16]
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33 ; CHECK-NEXT: add sp, sp, #16
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34 ; CHECK-NEXT: b callee_stack8
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35 }
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36
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37 define fastcc void @caller_to8_from8([8 x i32], i64 %a) {
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38 ; CHECK-LABEL: caller_to8_from8:
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39 ; CHECK: sub sp, sp, #16
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40
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41 ; Key point is that the "%a" should go where at SP on entry.
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42 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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43 ret void
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44 ; CHECK: str {{x[0-9]+}}, [sp, #16]
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45 ; CHECK-NEXT: add sp, sp, #16
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46 ; CHECK-NEXT: b callee_stack8
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47 }
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48
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49 define fastcc void @caller_to16_from8([8 x i32], i64 %a) {
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50 ; CHECK-LABEL: caller_to16_from8:
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51 ; CHECK: sub sp, sp, #16
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52
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53 ; Important point is that the call reuses the "dead" argument space
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54 ; above %a on the stack. If it tries to go below incoming-SP then the
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55 ; callee will not deallocate the space, even in fastcc.
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56 tail call fastcc void @callee_stack16([8 x i32] undef, i64 42, i64 2)
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57 ; CHECK: str {{x[0-9]+}}, [sp, #24]
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58 ; CHECK: str {{x[0-9]+}}, [sp, #16]
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59 ; CHECK: add sp, sp, #16
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60 ; CHECK: b callee_stack16
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61 ret void
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62 }
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63
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64
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65 define fastcc void @caller_to8_from24([8 x i32], i64 %a, i64 %b, i64 %c) {
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66 ; CHECK-LABEL: caller_to8_from24:
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67 ; CHECK: sub sp, sp, #16
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68
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69 ; Key point is that the "%a" should go where at #16 above SP on entry.
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70 tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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71 ret void
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72 ; CHECK: str {{x[0-9]+}}, [sp, #32]
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73 ; CHECK-NEXT: add sp, sp, #32
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74 ; CHECK-NEXT: b callee_stack8
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75 }
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76
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77
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78 define fastcc void @caller_to16_from16([8 x i32], i64 %a, i64 %b) {
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79 ; CHECK-LABEL: caller_to16_from16:
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80 ; CHECK: sub sp, sp, #16
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81
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82 ; Here we want to make sure that both loads happen before the stores:
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83 ; otherwise either %a or %b will be wrongly clobbered.
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84 tail call fastcc void @callee_stack16([8 x i32] undef, i64 %b, i64 %a)
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85 ret void
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86
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87 ; CHECK: ldr x0,
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88 ; CHECK: ldr x1,
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89 ; CHECK: str x1,
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90 ; CHECK: str x0,
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91
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92 ; CHECK: add sp, sp, #16
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93 ; CHECK: b callee_stack16
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94 }