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annotate test/CodeGen/AMDGPU/array-ptr-calc-i32.ll @ 95:afa8332a0e37

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
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children 7d135dc70f03
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s
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2 ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI -mattr=+promote-alloca < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s
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4 declare i32 @llvm.SI.tid() nounwind readnone
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5 declare void @llvm.AMDGPU.barrier.local() nounwind noduplicate
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7 ; The required pointer calculations for the alloca'd actually requires
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8 ; an add and won't be folded into the addressing, which fails with a
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9 ; 64-bit pointer add. This should work since private pointers should
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10 ; be 32-bits.
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12 ; SI-LABEL: {{^}}test_private_array_ptr_calc:
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14 ; FIXME: We end up with zero argument for ADD, because
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15 ; SIRegisterInfo::eliminateFrameIndex() blindly replaces the frame index
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16 ; with the appropriate offset. We should fold this into the store.
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17 ; SI-ALLOCA: v_add_i32_e32 [[PTRREG:v[0-9]+]], vcc, 0, v{{[0-9]+}}
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18 ; SI-ALLOCA: buffer_store_dword {{v[0-9]+}}, [[PTRREG]], s[{{[0-9]+:[0-9]+}}]
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19 ;
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20 ; FIXME: The AMDGPUPromoteAlloca pass should be able to convert this
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21 ; alloca to a vector. It currently fails because it does not know how
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22 ; to interpret:
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23 ; getelementptr [4 x i32], [4 x i32]* %alloca, i32 1, i32 %b
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25 ; SI-PROMOTE: v_add_i32_e32 [[PTRREG:v[0-9]+]], vcc, 16
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26 ; SI-PROMOTE: ds_write_b32 [[PTRREG]]
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27 define void @test_private_array_ptr_calc(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) {
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28 %alloca = alloca [4 x i32], i32 4, align 16
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29 %tid = call i32 @llvm.SI.tid() readnone
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30 %a_ptr = getelementptr i32, i32 addrspace(1)* %inA, i32 %tid
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31 %b_ptr = getelementptr i32, i32 addrspace(1)* %inB, i32 %tid
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32 %a = load i32, i32 addrspace(1)* %a_ptr
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33 %b = load i32, i32 addrspace(1)* %b_ptr
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34 %result = add i32 %a, %b
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35 %alloca_ptr = getelementptr [4 x i32], [4 x i32]* %alloca, i32 1, i32 %b
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36 store i32 %result, i32* %alloca_ptr, align 4
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37 ; Dummy call
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38 call void @llvm.AMDGPU.barrier.local() nounwind noduplicate
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39 %reload = load i32, i32* %alloca_ptr, align 4
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40 %out_ptr = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
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41 store i32 %reload, i32 addrspace(1)* %out_ptr, align 4
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42 ret void
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43 }
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